OV - attention-aocc-znver5-512 - Loop 47 - attention-aocc-znver5-512

	Loop Id: 47	Module: attention-aocc-znver5-512	Source: attention_v2.cpp:43-61	Coverage: 0.35%

0x6880 MOV	0x178(%RSP),%RAX

0x6888 MOV	0x238(%RSP),%RDI

0x6890 INC	%RSI

0x6893 MOV	%R12,%R9

0x6896 VMOVSS	%XMM2,(%RAX,%RCX,4)

0x689b MOV	0x378(%RSP),%RCX

0x68a3 ADD	%RCX,0x2f0(%RSP)

0x68ab ADD	%RCX,%R8

0x68ae ADD	%RCX,%RDI

0x68b1 CMP	0x78(%RSP),%R12

0x68b6 MOV	0x130(%RSP),%R12

0x68be JE	7da0

0x68c4 MOV	%RSI,%R10

0x68c7 MOV	%RSI,%R11

0x68ca AND	$-0x8,%R10

0x68ce AND	$-0x40,%R11

0x68d2 CMP	$0x8,%RSI

0x68d6 JAE	68f0

0x68d8 VMOVSS	-0x5a30(%RIP),%XMM1

0x68e0 MOV	0x2f0(%RSP),%R12

0x68e8 XOR	%EAX,%EAX

0x68ea JMP	6a00

0x68f0 MOV	0x2f0(%RSP),%R12

0x68f8 CMP	$0x40,%RSI

0x68fc JAE	6910

0x68fe VMOVSS	-0x5a56(%RIP),%XMM1

0x6906 XOR	%EAX,%EAX

0x6908 JMP	69ad

0x6910 VBROADCASTSS	-0x5a6a(%RIP),%ZMM0

0x691a MOV	$0x7ffffffffffffff8,%RAX

0x6924 XOR	%ECX,%ECX

0x6926 ADD	$-0x38,%RAX

0x692a AND	%RSI,%RAX

0x692d VMOVAPS	%ZMM0,%ZMM1

0x6933 VMOVAPS	%ZMM0,%ZMM2

0x6939 VMOVAPS	%ZMM0,%ZMM3

0x693f NOP

  (37) 0x6940 VMAXPS	-0xc0(%R12,%RCX,4),%ZMM0,%ZMM0

  (37) 0x6948 VMAXPS	-0x80(%R12,%RCX,4),%ZMM1,%ZMM1

  (37) 0x6950 VMAXPS	-0x40(%R12,%RCX,4),%ZMM2,%ZMM2

  (37) 0x6958 VMAXPS	(%R12,%RCX,4),%ZMM3,%ZMM3

  (37) 0x695f ADD	$0x40,%RCX

  (37) 0x6963 CMP	%RCX,%R11

  (37) 0x6966 JNE	6940

0x6968 VMAXPS	%ZMM1,%ZMM0,%ZMM0

0x696e VMAXPS	%ZMM3,%ZMM2,%ZMM2

0x6974 VMAXPS	%ZMM2,%ZMM0,%ZMM0

0x697a VEXTRACTF64X4	$0x1,%ZMM0,%YMM1

0x6981 VMAXPS	%ZMM1,%ZMM0,%ZMM0

0x6987 VEXTRACTF128	$0x1,%YMM0,%XMM1

0x698d VMAXPS	%XMM1,%XMM0,%XMM0

0x6991 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

0x6996 VMAXPS	%XMM1,%XMM0,%XMM0

0x699a VMOVSHDUP	%XMM0,%XMM1

0x699e VMAXSS	%XMM1,%XMM0,%XMM1

0x69a2 CMP	%RAX,%RSI

0x69a5 JE	6a0e

0x69a7 TEST	$0x38,%SIL

0x69ab JE	6a00

0x69ad MOV	$0x7ffffffffffffff8,%RDX

0x69b7 VBROADCASTSS	%XMM1,%YMM0

0x69bc MOV	%RAX,%RCX

0x69bf MOV	%RSI,%RAX

0x69c2 AND	%RDX,%RAX

0x69c5 NOPW	%CS:(%RAX,%RAX,1)

  (52) 0x69d0 VMAXPS	(%R8,%RCX,4),%YMM0,%YMM0

  (52) 0x69d6 ADD	$0x8,%RCX

  (52) 0x69da CMP	%RCX,%R10

  (52) 0x69dd JNE	69d0

0x69df VEXTRACTF128	$0x1,%YMM0,%XMM1

0x69e5 VMAXPS	%XMM1,%XMM0,%XMM0

0x69e9 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

0x69ee VMAXPS	%XMM1,%XMM0,%XMM0

0x69f2 VMOVSHDUP	%XMM0,%XMM1

0x69f6 VMAXSS	%XMM1,%XMM0,%XMM1

0x69fa JMP	6a09

  (51) 0x6a00 VMAXSS	(%R8,%RAX,4),%XMM1,%XMM1

  (51) 0x6a06 INC	%RAX

  (51) 0x6a09 CMP	%RAX,%RSI

  (51) 0x6a0c JNE	6a00

0x6a0e MOV	%RSI,0x138(%RSP)

0x6a16 MOV	%RDI,0x238(%RSP)

0x6a1e MOV	%R8,0x18(%RSP)

0x6a23 MOV	%R9,0x380(%RSP)

0x6a2b VMOVAPS	%XMM1,0x280(%RSP)

0x6a34 MOV	%R10,0x398(%RSP)

0x6a3c CMP	$0x8,%RSI

0x6a40 JAE	6a50

0x6a42 VXORPS	%XMM2,%XMM2,%XMM2

0x6a46 XOR	%R12D,%R12D

0x6a49 JMP	7790

0x6a50 CMP	$0x40,%RSI

0x6a54 JAE	6a70

0x6a56 VXORPS	%XMM2,%XMM2,%XMM2

0x6a5a XOR	%R12D,%R12D

0x6a5d JMP	75b3

0x6a70 MOV	$0x7ffffffffffffff8,%RAX

0x6a7a VBROADCASTSS	%XMM1,%ZMM0

0x6a80 VXORPS	%XMM1,%XMM1,%XMM1

0x6a84 MOV	%R11,0x3f0(%RSP)

0x6a8c ADD	$-0x38,%RAX

0x6a90 AND	%RSI,%RAX

0x6a93 VMOVAPS	%ZMM0,0x4c0(%RSP)

0x6a9b VXORPS	%XMM0,%XMM0,%XMM0

0x6a9f MOV	%RAX,0x2e8(%RSP)

0x6aa7 XOR	%EAX,%EAX

0x6aa9 VMOVAPS	%ZMM0,0x300(%RSP)

0x6ab1 VMOVAPS	%ZMM0,0x400(%RSP)

0x6ab9 VMOVAPS	%ZMM0,0x440(%RSP)

0x6ac1 NOPW	%CS:(%RAX,%RAX,1)

  (38) 0x6ad0 VMOVUPS	-0xc0(%R12,%RAX,4),%ZMM0

  (38) 0x6ad8 VMOVAPS	0x4c0(%RSP),%ZMM4

  (38) 0x6ae0 VMOVUPS	(%R12,%RAX,4),%ZMM3

  (38) 0x6ae7 VMOVAPS	%ZMM1,0x500(%RSP)

  (38) 0x6aef VMOVUPS	-0x80(%R12,%RAX,4),%ZMM1

  (38) 0x6af7 VMOVUPS	-0x40(%R12,%RAX,4),%ZMM2

  (38) 0x6aff MOV	%RAX,0x480(%RSP)

  (38) 0x6b07 VSUBPS	%ZMM4,%ZMM0,%ZMM5

  (38) 0x6b0d VSUBPS	%ZMM4,%ZMM3,%ZMM0

  (38) 0x6b13 VSUBPS	%ZMM4,%ZMM1,%ZMM6

  (38) 0x6b19 VSUBPS	%ZMM4,%ZMM2,%ZMM1

  (38) 0x6b1f VMOVAPS	%ZMM0,0x240(%RSP)

  (38) 0x6b27 VEXTRACTF32X4	$0x3,%ZMM5,%XMM0

  (38) 0x6b2e VMOVAPS	%ZMM5,0xc0(%RSP)

  (38) 0x6b36 VMOVAPS	%ZMM6,0x180(%RSP)

  (38) 0x6b3e VMOVAPS	%ZMM1,0x1c0(%RSP)

  (38) 0x6b46 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6b4c VZEROUPPER

  (38) 0x6b4f CALL	8830 <@plt_start@+0x20>

  (38) 0x6b54 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6b5d VMOVSHDUP	0x20(%RSP),%XMM0

  (38) 0x6b63 CALL	8830 <@plt_start@+0x20>

  (38) 0x6b68 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6b71 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6b77 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6b80 VPERMILPD	$0x1,0x20(%RSP),%XMM0

  (38) 0x6b88 CALL	8830 <@plt_start@+0x20>

  (38) 0x6b8d VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6b96 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6b9c VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6ba5 VPERMILPS	$-0x1,0x20(%RSP),%XMM0

  (38) 0x6bad CALL	8830 <@plt_start@+0x20>

  (38) 0x6bb2 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6bbb VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6bc1 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6bca VMOVAPS	0xc0(%RSP),%ZMM0

  (38) 0x6bd2 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

  (38) 0x6bd9 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6bdf VZEROUPPER

  (38) 0x6be2 CALL	8830 <@plt_start@+0x20>

  (38) 0x6be7 VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6bf0 VMOVSHDUP	0x20(%RSP),%XMM0

  (38) 0x6bf6 CALL	8830 <@plt_start@+0x20>

  (38) 0x6bfb VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6c04 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6c0a VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6c13 VPERMILPD	$0x1,0x20(%RSP),%XMM0

  (38) 0x6c1b CALL	8830 <@plt_start@+0x20>

  (38) 0x6c20 VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6c29 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6c2f VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6c38 VPERMILPS	$-0x1,0x20(%RSP),%XMM0

  (38) 0x6c40 CALL	8830 <@plt_start@+0x20>

  (38) 0x6c45 VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6c4e VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6c54 VINSERTF128	$0x1,0x140(%RSP),%YMM0,%YMM0

  (38) 0x6c5f VMOVAPS	%YMM0,0x140(%RSP)

  (38) 0x6c68 VMOVAPS	0xc0(%RSP),%ZMM0

  (38) 0x6c70 VEXTRACTF128	$0x1,%YMM0,%XMM0

  (38) 0x6c76 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6c7c VZEROUPPER

  (38) 0x6c7f CALL	8830 <@plt_start@+0x20>

  (38) 0x6c84 VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6c8d VMOVSHDUP	0x20(%RSP),%XMM0

  (38) 0x6c93 CALL	8830 <@plt_start@+0x20>

  (38) 0x6c98 VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6ca1 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6ca7 VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6cb0 VPERMILPD	$0x1,0x20(%RSP),%XMM0

  (38) 0x6cb8 CALL	8830 <@plt_start@+0x20>

  (38) 0x6cbd VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6cc6 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6ccc VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6cd5 VPERMILPS	$-0x1,0x20(%RSP),%XMM0

  (38) 0x6cdd CALL	8830 <@plt_start@+0x20>

  (38) 0x6ce2 VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6ceb VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6cf1 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6cf7 VMOVAPS	0xc0(%RSP),%ZMM0

  (38) 0x6cff VZEROUPPER

  (38) 0x6d02 CALL	8830 <@plt_start@+0x20>

  (38) 0x6d07 VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6d10 VMOVSHDUP	0xc0(%RSP),%XMM0

  (38) 0x6d19 CALL	8830 <@plt_start@+0x20>

  (38) 0x6d1e VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6d27 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6d2d VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6d36 VPERMILPD	$0x1,0xc0(%RSP),%XMM0

  (38) 0x6d41 CALL	8830 <@plt_start@+0x20>

  (38) 0x6d46 VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6d4f VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6d55 VMOVAPS	%XMM0,0x90(%RSP)

  (38) 0x6d5e VPERMILPS	$-0x1,0xc0(%RSP),%XMM0

  (38) 0x6d69 CALL	8830 <@plt_start@+0x20>

  (38) 0x6d6e VMOVAPS	0x90(%RSP),%XMM1

  (38) 0x6d77 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6d7d VINSERTF128	$0x1,0x20(%RSP),%YMM0,%YMM0

  (38) 0x6d85 VMOVAPS	0x300(%RSP),%ZMM1

  (38) 0x6d8d VINSERTF64X4	$0x1,0x140(%RSP),%ZMM0,%ZMM0

  (38) 0x6d96 VADDPS	%ZMM1,%ZMM0,%ZMM1

  (38) 0x6d9c VMOVAPS	0x180(%RSP),%ZMM0

  (38) 0x6da4 VMOVAPS	%ZMM1,0x300(%RSP)

  (38) 0x6dac VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

  (38) 0x6db3 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x6dbc VZEROUPPER

  (38) 0x6dbf CALL	8830 <@plt_start@+0x20>

  (38) 0x6dc4 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6dca VMOVSHDUP	0xc0(%RSP),%XMM0

  (38) 0x6dd3 CALL	8830 <@plt_start@+0x20>

  (38) 0x6dd8 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x6dde VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6de4 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6dea VPERMILPD	$0x1,0xc0(%RSP),%XMM0

  (38) 0x6df5 CALL	8830 <@plt_start@+0x20>

  (38) 0x6dfa VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x6e00 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6e06 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6e0c VPERMILPS	$-0x1,0xc0(%RSP),%XMM0

  (38) 0x6e17 CALL	8830 <@plt_start@+0x20>

  (38) 0x6e1c VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x6e22 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6e28 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x6e2e VMOVAPS	0x180(%RSP),%ZMM0

  (38) 0x6e36 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

  (38) 0x6e3d VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x6e46 VZEROUPPER

  (38) 0x6e49 CALL	8830 <@plt_start@+0x20>

  (38) 0x6e4e VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6e57 VMOVSHDUP	0xc0(%RSP),%XMM0

  (38) 0x6e60 CALL	8830 <@plt_start@+0x20>

  (38) 0x6e65 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6e6e VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6e74 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6e7d VPERMILPD	$0x1,0xc0(%RSP),%XMM0

  (38) 0x6e88 CALL	8830 <@plt_start@+0x20>

  (38) 0x6e8d VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6e96 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6e9c VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6ea5 VPERMILPS	$-0x1,0xc0(%RSP),%XMM0

  (38) 0x6eb0 CALL	8830 <@plt_start@+0x20>

  (38) 0x6eb5 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6ebe VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6ec4 VINSERTF128	$0x1,0x20(%RSP),%YMM0,%YMM0

  (38) 0x6ecc VMOVAPS	%YMM0,0x20(%RSP)

  (38) 0x6ed2 VMOVAPS	0x180(%RSP),%ZMM0

  (38) 0x6eda VEXTRACTF128	$0x1,%YMM0,%XMM0

  (38) 0x6ee0 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x6ee9 VZEROUPPER

  (38) 0x6eec CALL	8830 <@plt_start@+0x20>

  (38) 0x6ef1 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6efa VMOVSHDUP	0xc0(%RSP),%XMM0

  (38) 0x6f03 CALL	8830 <@plt_start@+0x20>

  (38) 0x6f08 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6f11 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6f17 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6f20 VPERMILPD	$0x1,0xc0(%RSP),%XMM0

  (38) 0x6f2b CALL	8830 <@plt_start@+0x20>

  (38) 0x6f30 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6f39 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6f3f VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6f48 VPERMILPS	$-0x1,0xc0(%RSP),%XMM0

  (38) 0x6f53 CALL	8830 <@plt_start@+0x20>

  (38) 0x6f58 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6f61 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6f67 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x6f70 VMOVAPS	0x180(%RSP),%ZMM0

  (38) 0x6f78 VZEROUPPER

  (38) 0x6f7b CALL	8830 <@plt_start@+0x20>

  (38) 0x6f80 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6f89 VMOVSHDUP	0x180(%RSP),%XMM0

  (38) 0x6f92 CALL	8830 <@plt_start@+0x20>

  (38) 0x6f97 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6fa0 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x6fa6 VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6faf VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (38) 0x6fba CALL	8830 <@plt_start@+0x20>

  (38) 0x6fbf VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6fc8 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x6fce VMOVAPS	%XMM0,0x140(%RSP)

  (38) 0x6fd7 VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (38) 0x6fe2 CALL	8830 <@plt_start@+0x20>

  (38) 0x6fe7 VMOVAPS	0x140(%RSP),%XMM1

  (38) 0x6ff0 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x6ff6 VINSERTF128	$0x1,0xc0(%RSP),%YMM0,%YMM0

  (38) 0x7001 VMOVAPS	0x400(%RSP),%ZMM1

  (38) 0x7009 VINSERTF64X4	$0x1,0x20(%RSP),%ZMM0,%ZMM0

  (38) 0x7012 VADDPS	%ZMM1,%ZMM0,%ZMM1

  (38) 0x7018 VMOVAPS	0x1c0(%RSP),%ZMM0

  (38) 0x7020 VMOVAPS	%ZMM1,0x400(%RSP)

  (38) 0x7028 VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

  (38) 0x702f VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x7038 VZEROUPPER

  (38) 0x703b CALL	8830 <@plt_start@+0x20>

  (38) 0x7040 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7049 VMOVSHDUP	0x180(%RSP),%XMM0

  (38) 0x7052 CALL	8830 <@plt_start@+0x20>

  (38) 0x7057 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7060 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x7066 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x706f VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (38) 0x707a CALL	8830 <@plt_start@+0x20>

  (38) 0x707f VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7088 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x708e VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7097 VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (38) 0x70a2 CALL	8830 <@plt_start@+0x20>

  (38) 0x70a7 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x70b0 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x70b6 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x70bf VMOVAPS	0x1c0(%RSP),%ZMM0

  (38) 0x70c7 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

  (38) 0x70ce VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x70d7 VZEROUPPER

  (38) 0x70da CALL	8830 <@plt_start@+0x20>

  (38) 0x70df VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x70e5 VMOVSHDUP	0x180(%RSP),%XMM0

  (38) 0x70ee CALL	8830 <@plt_start@+0x20>

  (38) 0x70f3 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x70f9 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x70ff VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x7105 VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (38) 0x7110 CALL	8830 <@plt_start@+0x20>

  (38) 0x7115 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x711b VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x7121 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x7127 VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (38) 0x7132 CALL	8830 <@plt_start@+0x20>

  (38) 0x7137 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x713d VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x7143 VINSERTF128	$0x1,0xc0(%RSP),%YMM0,%YMM0

  (38) 0x714e VMOVAPS	%YMM0,0xc0(%RSP)

  (38) 0x7157 VMOVAPS	0x1c0(%RSP),%ZMM0

  (38) 0x715f VEXTRACTF128	$0x1,%YMM0,%XMM0

  (38) 0x7165 VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x716e VZEROUPPER

  (38) 0x7171 CALL	8830 <@plt_start@+0x20>

  (38) 0x7176 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x717c VMOVSHDUP	0x180(%RSP),%XMM0

  (38) 0x7185 CALL	8830 <@plt_start@+0x20>

  (38) 0x718a VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x7190 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x7196 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x719c VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (38) 0x71a7 CALL	8830 <@plt_start@+0x20>

  (38) 0x71ac VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x71b2 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x71b8 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x71be VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (38) 0x71c9 CALL	8830 <@plt_start@+0x20>

  (38) 0x71ce VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x71d4 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x71da VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x71e3 VMOVAPS	0x1c0(%RSP),%ZMM0

  (38) 0x71eb VZEROUPPER

  (38) 0x71ee CALL	8830 <@plt_start@+0x20>

  (38) 0x71f3 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x71f9 VMOVSHDUP	0x1c0(%RSP),%XMM0

  (38) 0x7202 CALL	8830 <@plt_start@+0x20>

  (38) 0x7207 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x720d VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x7213 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x7219 VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (38) 0x7224 CALL	8830 <@plt_start@+0x20>

  (38) 0x7229 VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x722f VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x7235 VMOVAPS	%XMM0,0x20(%RSP)

  (38) 0x723b VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (38) 0x7246 CALL	8830 <@plt_start@+0x20>

  (38) 0x724b VMOVAPS	0x20(%RSP),%XMM1

  (38) 0x7251 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x7257 VINSERTF128	$0x1,0x180(%RSP),%YMM0,%YMM0

  (38) 0x7262 VMOVAPS	0x440(%RSP),%ZMM1

  (38) 0x726a VINSERTF64X4	$0x1,0xc0(%RSP),%ZMM0,%ZMM0

  (38) 0x7273 VADDPS	%ZMM1,%ZMM0,%ZMM1

  (38) 0x7279 VMOVAPS	0x240(%RSP),%ZMM0

  (38) 0x7281 VMOVAPS	%ZMM1,0x440(%RSP)

  (38) 0x7289 VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

  (38) 0x7290 VMOVAPS	%XMM0,0x1c0(%RSP)

  (38) 0x7299 VZEROUPPER

  (38) 0x729c CALL	8830 <@plt_start@+0x20>

  (38) 0x72a1 VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x72aa VMOVSHDUP	0x1c0(%RSP),%XMM0

  (38) 0x72b3 CALL	8830 <@plt_start@+0x20>

  (38) 0x72b8 VMOVAPS	0x180(%RSP),%XMM1

  (38) 0x72c1 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x72c7 VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x72d0 VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (38) 0x72db CALL	8830 <@plt_start@+0x20>

  (38) 0x72e0 VMOVAPS	0x180(%RSP),%XMM1

  (38) 0x72e9 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x72ef VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x72f8 VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (38) 0x7303 CALL	8830 <@plt_start@+0x20>

  (38) 0x7308 VMOVAPS	0x180(%RSP),%XMM1

  (38) 0x7311 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x7317 VMOVAPS	%XMM0,0x180(%RSP)

  (38) 0x7320 VMOVAPS	0x240(%RSP),%ZMM0

  (38) 0x7328 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

  (38) 0x732f VMOVAPS	%XMM0,0x1c0(%RSP)

  (38) 0x7338 VZEROUPPER

  (38) 0x733b CALL	8830 <@plt_start@+0x20>

  (38) 0x7340 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7349 VMOVSHDUP	0x1c0(%RSP),%XMM0

  (38) 0x7352 CALL	8830 <@plt_start@+0x20>

  (38) 0x7357 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7360 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x7366 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x736f VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (38) 0x737a CALL	8830 <@plt_start@+0x20>

  (38) 0x737f VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7388 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x738e VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7397 VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (38) 0x73a2 CALL	8830 <@plt_start@+0x20>

  (38) 0x73a7 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x73b0 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x73b6 VINSERTF128	$0x1,0x180(%RSP),%YMM0,%YMM0

  (38) 0x73c1 VMOVAPS	%YMM0,0x180(%RSP)

  (38) 0x73ca VMOVAPS	0x240(%RSP),%ZMM0

  (38) 0x73d2 VEXTRACTF128	$0x1,%YMM0,%XMM0

  (38) 0x73d8 VMOVAPS	%XMM0,0x1c0(%RSP)

  (38) 0x73e1 VZEROUPPER

  (38) 0x73e4 CALL	8830 <@plt_start@+0x20>

  (38) 0x73e9 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x73f2 VMOVSHDUP	0x1c0(%RSP),%XMM0

  (38) 0x73fb CALL	8830 <@plt_start@+0x20>

  (38) 0x7400 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7409 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x740f VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7418 VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (38) 0x7423 CALL	8830 <@plt_start@+0x20>

  (38) 0x7428 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7431 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x7437 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7440 VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (38) 0x744b CALL	8830 <@plt_start@+0x20>

  (38) 0x7450 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7459 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (38) 0x745f VMOVAPS	%XMM0,0x1c0(%RSP)

  (38) 0x7468 VMOVAPS	0x240(%RSP),%ZMM0

  (38) 0x7470 VZEROUPPER

  (38) 0x7473 CALL	8830 <@plt_start@+0x20>

  (38) 0x7478 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x7481 VMOVSHDUP	0x240(%RSP),%XMM0

  (38) 0x748a CALL	8830 <@plt_start@+0x20>

  (38) 0x748f VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x7498 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (38) 0x749e VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x74a7 VPERMILPD	$0x1,0x240(%RSP),%XMM0

  (38) 0x74b2 CALL	8830 <@plt_start@+0x20>

  (38) 0x74b7 VMOVAPS	0xc0(%RSP),%XMM1

  (38) 0x74c0 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (38) 0x74c6 VMOVAPS	%XMM0,0xc0(%RSP)

  (38) 0x74cf VPERMILPS	$-0x1,0x240(%RSP),%XMM0

  (38) 0x74da CALL	8830 <@plt_start@+0x20>

  (38) 0x74df VMOVAPS	0xc0(%RSP),%XMM2

  (38) 0x74e8 VMOVAPS	0x500(%RSP),%ZMM1

  (38) 0x74f0 MOV	0x480(%RSP),%RAX

  (38) 0x74f8 MOV	0x3f0(%RSP),%R11

  (38) 0x7500 ADD	$0x40,%RAX

  (38) 0x7504 VINSERTPS	$0x30,%XMM0,%XMM2,%XMM0

  (38) 0x750a VINSERTF128	$0x1,0x1c0(%RSP),%YMM0,%YMM0

  (38) 0x7515 VINSERTF64X4	$0x1,0x180(%RSP),%ZMM0,%ZMM0

  (38) 0x751e VADDPS	%ZMM1,%ZMM0,%ZMM1

  (38) 0x7524 CMP	%RAX,%R11

  (38) 0x7527 JNE	6ad0

0x752d VMOVAPS	0x400(%RSP),%ZMM0

0x7535 MOV	0x138(%RSP),%RSI

0x753d MOV	0x2e8(%RSP),%R12

0x7545 VADDPS	0x300(%RSP),%ZMM0,%ZMM0

0x754d VADDPS	0x440(%RSP),%ZMM0,%ZMM0

0x7555 VADDPS	%ZMM0,%ZMM1,%ZMM0

0x755b VEXTRACTF64X4	$0x1,%ZMM0,%YMM1

0x7562 VADDPS	%ZMM1,%ZMM0,%ZMM0

0x7568 VEXTRACTF128	$0x1,%YMM0,%XMM1

0x756e VADDPS	%XMM1,%XMM0,%XMM0

0x7572 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

0x7577 VADDPS	%XMM1,%XMM0,%XMM0

0x757b VMOVSHDUP	%XMM0,%XMM1

0x757f VADDSS	%XMM1,%XMM0,%XMM2

0x7583 CMP	%R12,%RSI

0x7586 JNE	759b

0x7588 VMOVAPS	0x280(%RSP),%XMM1

0x7591 MOV	0x18(%RSP),%R8

0x7596 JMP	77d6

0x759b VMOVAPS	0x280(%RSP),%XMM1

0x75a4 MOV	0x18(%RSP),%R8

0x75a9 TEST	$0x38,%SIL

0x75ad JE	7790

0x75b3 VXORPS	%XMM0,%XMM0,%XMM0

0x75b7 VBLENDPS	$0x1,%XMM2,%XMM0,%XMM2

0x75bd MOV	$0x7ffffffffffffff8,%RAX

0x75c7 VBROADCASTSS	%XMM1,%YMM0

0x75cc AND	%RAX,%RSI

0x75cf MOV	%RSI,0x2e8(%RSP)

0x75d7 VMOVAPS	%YMM0,0x20(%RSP)

0x75dd NOPL	(%RAX)

  (50) 0x75e0 VMOVUPS	(%R8,%R12,4),%YMM0

  (50) 0x75e6 VMOVAPS	%YMM2,0x180(%RSP)

  (50) 0x75ef VSUBPS	0x20(%RSP),%YMM0,%YMM0

  (50) 0x75f5 VMOVAPS	%YMM0,0x240(%RSP)

  (50) 0x75fe VEXTRACTF128	$0x1,%YMM0,%XMM0

  (50) 0x7604 VMOVAPS	%XMM0,0x1c0(%RSP)

  (50) 0x760d VZEROUPPER

  (50) 0x7610 CALL	8830 <@plt_start@+0x20>

  (50) 0x7615 VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x761e VMOVSHDUP	0x1c0(%RSP),%XMM0

  (50) 0x7627 CALL	8830 <@plt_start@+0x20>

  (50) 0x762c VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x7635 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (50) 0x763b VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x7644 VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (50) 0x764f CALL	8830 <@plt_start@+0x20>

  (50) 0x7654 VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x765d VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (50) 0x7663 VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x766c VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (50) 0x7677 CALL	8830 <@plt_start@+0x20>

  (50) 0x767c VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x7685 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (50) 0x768b VMOVAPS	%XMM0,0x1c0(%RSP)

  (50) 0x7694 VMOVAPS	0x240(%RSP),%YMM0

  (50) 0x769d VZEROUPPER

  (50) 0x76a0 CALL	8830 <@plt_start@+0x20>

  (50) 0x76a5 VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x76ae VMOVSHDUP	0x240(%RSP),%XMM0

  (50) 0x76b7 CALL	8830 <@plt_start@+0x20>

  (50) 0x76bc VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x76c5 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (50) 0x76cb VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x76d4 VPERMILPD	$0x1,0x240(%RSP),%XMM0

  (50) 0x76df CALL	8830 <@plt_start@+0x20>

  (50) 0x76e4 VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x76ed VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (50) 0x76f3 VMOVAPS	%XMM0,0xc0(%RSP)

  (50) 0x76fc VPERMILPS	$-0x1,0x240(%RSP),%XMM0

  (50) 0x7707 CALL	8830 <@plt_start@+0x20>

  (50) 0x770c VMOVAPS	0xc0(%RSP),%XMM1

  (50) 0x7715 VMOVAPS	0x180(%RSP),%YMM2

  (50) 0x771e MOV	0x18(%RSP),%R8

  (50) 0x7723 ADD	$0x8,%R12

  (50) 0x7727 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (50) 0x772d VINSERTF128	$0x1,0x1c0(%RSP),%YMM0,%YMM0

  (50) 0x7738 VADDPS	%YMM2,%YMM0,%YMM2

  (50) 0x773c CMP	%R12,0x398(%RSP)

  (50) 0x7744 JNE	75e0

0x774a VEXTRACTF128	$0x1,%YMM2,%XMM0

0x7750 MOV	0x138(%RSP),%RSI

0x7758 MOV	0x2e8(%RSP),%R12

0x7760 VADDPS	%XMM0,%XMM2,%XMM0

0x7764 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

0x7769 VADDPS	%XMM1,%XMM0,%XMM0

0x776d VMOVSHDUP	%XMM0,%XMM1

0x7771 VADDSS	%XMM1,%XMM0,%XMM2

0x7775 VMOVAPS	0x280(%RSP),%XMM1

0x777e CMP	%R12,%RSI

0x7781 JE	77d6

0x7783 NOPW	%CS:(%RAX,%RAX,1)

  (39) 0x7790 VMOVSS	(%R8,%R12,4),%XMM0

  (39) 0x7796 VMOVAPS	%XMM2,0x240(%RSP)

  (39) 0x779f VSUBSS	%XMM1,%XMM0,%XMM0

  (39) 0x77a3 VZEROUPPER

  (39) 0x77a6 CALL	8830 <@plt_start@+0x20>

  (39) 0x77ab VMOVAPS	0x240(%RSP),%XMM2

  (39) 0x77b4 VMOVAPS	0x280(%RSP),%XMM1

  (39) 0x77bd MOV	0x18(%RSP),%R8

  (39) 0x77c2 MOV	0x138(%RSP),%RSI

  (39) 0x77ca INC	%R12

  (39) 0x77cd VADDSS	%XMM2,%XMM0,%XMM2

  (39) 0x77d1 CMP	%R12,%RSI

  (39) 0x77d4 JNE	7790

0x77d6 VMOVAPS	%XMM2,0x240(%RSP)

0x77df CMP	$0x8,%RSI

0x77e3 JAE	77f0

0x77e5 XOR	%R12D,%R12D

0x77e8 JMP	7ce0

0x77f0 CMP	$0x10,%RSI

0x77f4 JAE	79c0

0x77fa XOR	%R12D,%R12D

0x77fd VBROADCASTSS	%XMM1,%YMM0

0x7802 VBROADCASTSS	%XMM2,%YMM1

0x7807 MOV	$0x7ffffffffffffff8,%RAX

0x7811 MOV	%R12,%RDX

0x7814 MOV	%RSI,%R12

0x7817 AND	%RAX,%R12

0x781a VMOVAPS	%YMM0,0x300(%RSP)

0x7823 VMOVAPS	%YMM1,0x400(%RSP)

0x782c NOPL	(%RAX)

  (48) 0x7830 VMOVUPS	(%R8,%RDX,4),%YMM0

  (48) 0x7836 MOV	%RDX,0xc0(%RSP)

  (48) 0x783e VSUBPS	0x300(%RSP),%YMM0,%YMM0

  (48) 0x7847 VMOVAPS	%YMM0,0x1c0(%RSP)

  (48) 0x7850 VEXTRACTF128	$0x1,%YMM0,%XMM0

  (48) 0x7856 VMOVAPS	%XMM0,0x180(%RSP)

  (48) 0x785f VZEROUPPER

  (48) 0x7862 CALL	8830 <@plt_start@+0x20>

  (48) 0x7867 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x786d VMOVSHDUP	0x180(%RSP),%XMM0

  (48) 0x7876 CALL	8830 <@plt_start@+0x20>

  (48) 0x787b VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x7881 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (48) 0x7887 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x788d VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (48) 0x7898 CALL	8830 <@plt_start@+0x20>

  (48) 0x789d VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x78a3 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (48) 0x78a9 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x78af VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (48) 0x78ba CALL	8830 <@plt_start@+0x20>

  (48) 0x78bf VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x78c5 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (48) 0x78cb VMOVAPS	%XMM0,0x180(%RSP)

  (48) 0x78d4 VMOVAPS	0x1c0(%RSP),%YMM0

  (48) 0x78dd VZEROUPPER

  (48) 0x78e0 CALL	8830 <@plt_start@+0x20>

  (48) 0x78e5 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x78eb VMOVSHDUP	0x1c0(%RSP),%XMM0

  (48) 0x78f4 CALL	8830 <@plt_start@+0x20>

  (48) 0x78f9 VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x78ff VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (48) 0x7905 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x790b VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (48) 0x7916 CALL	8830 <@plt_start@+0x20>

  (48) 0x791b VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x7921 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (48) 0x7927 VMOVAPS	%XMM0,0x20(%RSP)

  (48) 0x792d VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (48) 0x7938 CALL	8830 <@plt_start@+0x20>

  (48) 0x793d VMOVAPS	0x20(%RSP),%XMM1

  (48) 0x7943 MOV	0xc0(%RSP),%RDX

  (48) 0x794b MOV	0x238(%RSP),%RCX

  (48) 0x7953 MOV	0x18(%RSP),%R8

  (48) 0x7958 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (48) 0x795e VINSERTF128	$0x1,0x180(%RSP),%YMM0,%YMM0

  (48) 0x7969 VDIVPS	0x400(%RSP),%YMM0,%YMM0

  (48) 0x7972 VMOVUPS	%YMM0,(%RCX,%RDX,4)

  (48) 0x7977 ADD	$0x8,%RDX

  (48) 0x797b CMP	%RDX,0x398(%RSP)

  (48) 0x7983 JNE	7830

0x7989 VMOVAPS	0x280(%RSP),%XMM1

0x7992 VMOVAPS	0x240(%RSP),%XMM2

0x799b MOV	0x138(%RSP),%RSI

0x79a3 CMP	%R12,%RSI

0x79a6 JNE	7ce0

0x79ac JMP	7d2b

0x79c0 MOV	%RSI,%RAX

0x79c3 AND	$-0x10,%RAX

0x79c7 VBROADCASTSS	%XMM1,%ZMM0

0x79cd VBROADCASTSS	%XMM2,%ZMM1

0x79d3 MOV	%RAX,0x400(%RSP)

0x79db MOV	$0x7ffffffffffffff8,%RAX

0x79e5 LEA	-0x8(%RAX),%R12

0x79e9 VMOVAPS	%ZMM0,0x440(%RSP)

0x79f1 VMOVAPS	%ZMM1,0x480(%RSP)

0x79f9 XOR	%EAX,%EAX

0x79fb AND	%RSI,%R12

0x79fe XCHG	%AX,%AX

  (40) 0x7a00 VMOVUPS	(%R8,%RAX,4),%ZMM0

  (40) 0x7a07 MOV	%RAX,0xc0(%RSP)

  (40) 0x7a0f VSUBPS	0x440(%RSP),%ZMM0,%ZMM0

  (40) 0x7a17 VMOVAPS	%ZMM0,0x1c0(%RSP)

  (40) 0x7a1f VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

  (40) 0x7a26 VMOVAPS	%XMM0,0x180(%RSP)

  (40) 0x7a2f VZEROUPPER

  (40) 0x7a32 CALL	8830 <@plt_start@+0x20>

  (40) 0x7a37 VMOVAPS	%XMM0,0x20(%RSP)

  (40) 0x7a3d VMOVSHDUP	0x180(%RSP),%XMM0

  (40) 0x7a46 CALL	8830 <@plt_start@+0x20>

  (40) 0x7a4b VMOVAPS	0x20(%RSP),%XMM1

  (40) 0x7a51 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (40) 0x7a57 VMOVAPS	%XMM0,0x20(%RSP)

  (40) 0x7a5d VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (40) 0x7a68 CALL	8830 <@plt_start@+0x20>

  (40) 0x7a6d VMOVAPS	0x20(%RSP),%XMM1

  (40) 0x7a73 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (40) 0x7a79 VMOVAPS	%XMM0,0x20(%RSP)

  (40) 0x7a7f VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (40) 0x7a8a CALL	8830 <@plt_start@+0x20>

  (40) 0x7a8f VMOVAPS	0x20(%RSP),%XMM1

  (40) 0x7a95 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (40) 0x7a9b VMOVAPS	%XMM0,0x20(%RSP)

  (40) 0x7aa1 VMOVAPS	0x1c0(%RSP),%ZMM0

  (40) 0x7aa9 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

  (40) 0x7ab0 VMOVAPS	%XMM0,0x180(%RSP)

  (40) 0x7ab9 VZEROUPPER

  (40) 0x7abc CALL	8830 <@plt_start@+0x20>

  (40) 0x7ac1 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7aca VMOVSHDUP	0x180(%RSP),%XMM0

  (40) 0x7ad3 CALL	8830 <@plt_start@+0x20>

  (40) 0x7ad8 VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7ae1 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (40) 0x7ae7 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7af0 VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (40) 0x7afb CALL	8830 <@plt_start@+0x20>

  (40) 0x7b00 VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7b09 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (40) 0x7b0f VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7b18 VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (40) 0x7b23 CALL	8830 <@plt_start@+0x20>

  (40) 0x7b28 VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7b31 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (40) 0x7b37 VINSERTF128	$0x1,0x20(%RSP),%YMM0,%YMM0

  (40) 0x7b3f VMOVAPS	%YMM0,0x20(%RSP)

  (40) 0x7b45 VMOVAPS	0x1c0(%RSP),%ZMM0

  (40) 0x7b4d VEXTRACTF128	$0x1,%YMM0,%XMM0

  (40) 0x7b53 VMOVAPS	%XMM0,0x180(%RSP)

  (40) 0x7b5c VZEROUPPER

  (40) 0x7b5f CALL	8830 <@plt_start@+0x20>

  (40) 0x7b64 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7b6d VMOVSHDUP	0x180(%RSP),%XMM0

  (40) 0x7b76 CALL	8830 <@plt_start@+0x20>

  (40) 0x7b7b VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7b84 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (40) 0x7b8a VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7b93 VPERMILPD	$0x1,0x180(%RSP),%XMM0

  (40) 0x7b9e CALL	8830 <@plt_start@+0x20>

  (40) 0x7ba3 VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7bac VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (40) 0x7bb2 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7bbb VPERMILPS	$-0x1,0x180(%RSP),%XMM0

  (40) 0x7bc6 CALL	8830 <@plt_start@+0x20>

  (40) 0x7bcb VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7bd4 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (40) 0x7bda VMOVAPS	%XMM0,0x180(%RSP)

  (40) 0x7be3 VMOVAPS	0x1c0(%RSP),%ZMM0

  (40) 0x7beb VZEROUPPER

  (40) 0x7bee CALL	8830 <@plt_start@+0x20>

  (40) 0x7bf3 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7bfc VMOVSHDUP	0x1c0(%RSP),%XMM0

  (40) 0x7c05 CALL	8830 <@plt_start@+0x20>

  (40) 0x7c0a VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7c13 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

  (40) 0x7c19 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7c22 VPERMILPD	$0x1,0x1c0(%RSP),%XMM0

  (40) 0x7c2d CALL	8830 <@plt_start@+0x20>

  (40) 0x7c32 VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7c3b VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

  (40) 0x7c41 VMOVAPS	%XMM0,0x300(%RSP)

  (40) 0x7c4a VPERMILPS	$-0x1,0x1c0(%RSP),%XMM0

  (40) 0x7c55 CALL	8830 <@plt_start@+0x20>

  (40) 0x7c5a VMOVAPS	0x300(%RSP),%XMM1

  (40) 0x7c63 MOV	0xc0(%RSP),%RAX

  (40) 0x7c6b MOV	0x238(%RSP),%RCX

  (40) 0x7c73 MOV	0x18(%RSP),%R8

  (40) 0x7c78 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

  (40) 0x7c7e VINSERTF128	$0x1,0x180(%RSP),%YMM0,%YMM0

  (40) 0x7c89 VINSERTF64X4	$0x1,0x20(%RSP),%ZMM0,%ZMM0

  (40) 0x7c92 VDIVPS	0x480(%RSP),%ZMM0,%ZMM0

  (40) 0x7c9a VMOVUPS	%ZMM0,(%RCX,%RAX,4)

  (40) 0x7ca1 ADD	$0x10,%RAX

  (40) 0x7ca5 CMP	%RAX,0x400(%RSP)

  (40) 0x7cad JNE	7a00

0x7cb3 VMOVAPS	0x280(%RSP),%XMM1

0x7cbc VMOVAPS	0x240(%RSP),%XMM2

0x7cc5 MOV	0x138(%RSP),%RSI

0x7ccd CMP	%R12,%RSI

0x7cd0 JE	7d2b

0x7cd2 TEST	$0x8,%SIL

0x7cd6 JNE	77fd

0x7cdc NOPL	(%RAX)

  (49) 0x7ce0 VMOVSS	(%R8,%R12,4),%XMM0

  (49) 0x7ce6 VSUBSS	%XMM1,%XMM0,%XMM0

  (49) 0x7cea VZEROUPPER

  (49) 0x7ced CALL	8830 <@plt_start@+0x20>

  (49) 0x7cf2 VMOVAPS	0x240(%RSP),%XMM2

  (49) 0x7cfb VMOVAPS	0x280(%RSP),%XMM1

  (49) 0x7d04 MOV	0x238(%RSP),%RCX

  (49) 0x7d0c MOV	0x18(%RSP),%R8

  (49) 0x7d11 MOV	0x138(%RSP),%RSI

  (49) 0x7d19 VDIVSS	%XMM2,%XMM0,%XMM0

  (49) 0x7d1d VMOVSS	%XMM0,(%RCX,%R12,4)

  (49) 0x7d23 INC	%R12

  (49) 0x7d26 CMP	%R12,%RSI

  (49) 0x7d29 JNE	7ce0

0x7d2b MOV	0x380(%RSP),%RCX

0x7d33 LEA	0x1(%RCX),%R12

0x7d37 CMP	0x78(%RSP),%R12

0x7d3c JAE	6880

0x7d42 MOV	%RCX,%RDI

0x7d45 IMUL	0x3c8(%RSP),%RDI

0x7d4e MOV	0x370(%RSP),%RDX

0x7d56 LEA	(,%RCX,4),%RAX

0x7d5e XOR	%ESI,%ESI

0x7d60 SUB	%RAX,%RDX

0x7d63 ADD	$0x4,%RDI

0x7d67 ADD	%R13,%RDI

0x7d6a VZEROUPPER

0x7d6d CALL	8840 <@plt_start@+0x30>

0x7d72 VMOVAPS	0x240(%RSP),%XMM2

0x7d7b MOV	0x380(%RSP),%RCX

0x7d83 MOV	0x18(%RSP),%R8

0x7d88 MOV	0x138(%RSP),%RSI

0x7d90 JMP	6880

/home/eoseret/llm-attention/attention_v2.cpp: 43 - 61

--------------------------------------------------------------------------------

43:    for (int row = 0; row < N; ++row) {

44:       const float *S_row = &S[row * N];

45:

46:       float max_val = -FLT_MAX;

47:       for (int idx = 0; idx <= row; ++idx) // vectorised

48:          if (S_row[idx] > max_val) max_val = S_row[idx];

49:

50:       float sum = 0.0f;

51: #pragma clang loop vectorize(enable)

52:       for (int idx = 0; idx <= row; ++idx) // vectorised

53:          sum += expf(S_row[idx] - max_val);

54:

55:       for (int idx = 0; idx <= row; ++idx)  //vectorised

56:          P[row * N + idx] = expf(S_row[idx] - max_val) / sum;

57:

58:       for (int idx = row + 1; idx < N; ++idx)

59:          P[row * N + idx] = 0.0f;

60:

61:       D[row] = sum;

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	2.01
CQA speedup if FP arith vectorized	1.02
CQA speedup if fully vectorized	1.63
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.78
Bottlenecks	micro-operation queue,
Function	main
Source	attention_v2.cpp:43-44,attention_v2.cpp:47-47,attention_v2.cpp:52-52,attention_v2.cpp:55-55,attention_v2.cpp:58-61
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.88
CQA cycles if no scalar integer	12.88
CQA cycles if FP arith vectorized	25.24
CQA cycles if fully vectorized	15.92
Front-end cycles	25.88
P0 cycles	11.50
P1 cycles	11.50
P2 cycles	11.50
P3 cycles	11.50
P4 cycles	11.50
P5 cycles	11.50
P6 cycles	14.50
P7 cycles	14.50
P8 cycles	14.50
P9 cycles	14.50
P10 cycles	10.50
P11 cycles	10.50
P12 cycles	10.50
P13 cycles	10.50
P14 cycles	9.00
P15 cycles	9.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	200.00
Nb uops	207.00
Nb loads	37.00
Nb stores	22.00
Nb stack references	22.00
FLOP/cycle	3.17
Nb FLOP add-sub	82.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	42.98
Bytes prefetched	0.00
Bytes loaded	516.00
Bytes stored	596.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	45.80
Vectorization ratio load	35.48
Vectorization ratio store	50.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	61.54
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	45.07
Vector-efficiency ratio all	28.15
Vector-efficiency ratio load	23.59
Vector-efficiency ratio store	42.33
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	42.31
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	24.21

Metric	Value
CQA speedup if no scalar integer	2.01
CQA speedup if FP arith vectorized	1.02
CQA speedup if fully vectorized	1.63
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.78
Bottlenecks	micro-operation queue,
Function	main
Source	attention_v2.cpp:43-44,attention_v2.cpp:47-47,attention_v2.cpp:52-52,attention_v2.cpp:55-55,attention_v2.cpp:58-61
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	25.88
CQA cycles if no scalar integer	12.88
CQA cycles if FP arith vectorized	25.24
CQA cycles if fully vectorized	15.92
Front-end cycles	25.88
P0 cycles	11.50
P1 cycles	11.50
P2 cycles	11.50
P3 cycles	11.50
P4 cycles	11.50
P5 cycles	11.50
P6 cycles	14.50
P7 cycles	14.50
P8 cycles	14.50
P9 cycles	14.50
P10 cycles	10.50
P11 cycles	10.50
P12 cycles	10.50
P13 cycles	10.50
P14 cycles	9.00
P15 cycles	9.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	200.00
Nb uops	207.00
Nb loads	37.00
Nb stores	22.00
Nb stack references	22.00
FLOP/cycle	3.17
Nb FLOP add-sub	82.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	42.98
Bytes prefetched	0.00
Bytes loaded	516.00
Bytes stored	596.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	45.80
Vectorization ratio load	35.48
Vectorization ratio store	50.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	61.54
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	45.07
Vector-efficiency ratio all	28.15
Vector-efficiency ratio load	23.59
Vector-efficiency ratio store	42.33
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	42.31
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	24.21

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	main
Source file and lines	attention_v2.cpp:43-61
Module	attention-aocc-znver5-512

The loop is defined in /home/eoseret/llm-attention/attention_v2.cpp:43-61.

Analyzed code is defined in /home/eoseret/llm-attention/attention_v2.cpp:43-44,47,52,55,58-61.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 490 paths individually, rerun with max-paths=490
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 490 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.88 to 12.88 cycles (2.01x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 28% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 25.88 to 15.92 cycles (1.63x speedup).

Details

45% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

35% of SSE/AVX loads are used in vector version.
50% of SSE/AVX stores are used in vector version.
61% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 1 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:59

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VMOVAPS: 6 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:55
- /home/eoseret/llm-attention/attention_v2.cpp:55

Vector unaligned load/store instructions

Detected 6 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 4 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
VEXTRACTF64X4: 2 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:52

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

4 SSE or AVX instructions are processing arithmetic or math operations on single precision FP elements in scalar mode (one at a time). 8 SSE or AVX instructions are processing arithmetic or math operations on single precision FP elements in vector mode (four at a time). 8 AVX-512 instructions are processing arithmetic or math operations on single precision FP elements in vector mode (sixteen at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 82 FP arithmetical operations:

82: addition or subtraction

The binary loop is loading 516 bytes (129 single precision FP elements). The binary loop is storing 596 bytes (149 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	200
nb uops	207
loop length	1090
used x86 registers	12
used mmx registers	0
used xmm registers	3
used ymm registers	3
used zmm registers	4
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.88 cycles
front end	25.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	11.50	11.50	11.50	11.50	11.50	11.50	14.50	14.50	14.50	14.50	10.50	10.50	10.50	10.50	9.00	9.00
cycles	11.50	11.50	11.50	11.50	11.50	11.50	14.50	14.50	14.50	14.50	10.50	10.50	10.50	10.50	9.00	9.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.88
Dispatch	14.50
Overall L1	25.88

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	3%

all	79%
load	78%
store	91%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	80%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	75%

INT+FP

all	45%
load	35%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	61%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	40%
load	37%
store	67%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	51%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	28%
load	23%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	42%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	24%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.88 cycles. At this rate:

7% of peak load performance is reached (19.94 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
17% of peak store performance is reached (23.03 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 25.88 to 14.50 cycles (1.78x speedup).

ASM code

In the binary file, the address of the loop is: 68c4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV 0x178(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x238(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
VMOVSS %XMM2,(%RAX,%RCX,4)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (6.3%)
MOV 0x378(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,0x2f0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %RCX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP 0x78(%RSP),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x130(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JE 7da0 <main+0x3440>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
MOV %RSI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
AND $-0x8,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
AND $-0x40,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 68f0 <main+0x1f90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVSS -0x5a30(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (6.3%)
MOV 0x2f0(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 6a00 <main+0x20a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV 0x2f0(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP $0x40,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6910 <main+0x1fb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVSS -0x5a56(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 69ad <main+0x204d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
VBROADCASTSS -0x5a6a(%RIP),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1-2	0.50	scal (6.3%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $-0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVAPS %ZMM0,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVAPS %ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMAXPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPS %ZMM3,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPS %ZMM2,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM0,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.25	vect (50.0%)
VMAXPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VMAXSS %XMM1,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
CMP %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 6a0e <main+0x20ae>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
TEST $0x38,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 6a00 <main+0x20a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV $0x7ffffffffffffff8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
AND %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VMAXSS %XMM1,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
JMP 6a09 <main+0x20a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV %RSI,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x238(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x380(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPS %XMM1,0x280(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,0x398(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6a50 <main+0x20f0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 7790 <main+0x2e30>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
CMP $0x40,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6a70 <main+0x2110>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 75b3 <main+0x2c53>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VBROADCASTSS %XMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VXORPS %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R11,0x3f0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $-0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,0x4c0(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %RAX,0x2e8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVAPS %ZMM0,0x300(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM0,0x400(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM0,0x440(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x400(%RSP),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x2e8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VADDPS 0x300(%RSP),%ZMM0,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPS 0x440(%RSP),%ZMM0,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPS %ZMM0,%ZMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM0,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.25	vect (50.0%)
VADDPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VADDSS %XMM1,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 759b <main+0x2c3b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 77d6 <main+0x2e76>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
TEST $0x38,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 7790 <main+0x2e30>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VBLENDPS $0x1,%XMM2,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
AND %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,0x2e8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPS %YMM0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VEXTRACTF128 $0x1,%YMM2,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x2e8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VADDPS %XMM0,%XMM2,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VADDSS %XMM1,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 77d6 <main+0x2e76>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS %XMM2,0x240(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 77f0 <main+0x2e90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 7ce0 <main+0x3380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
CMP $0x10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 79c0 <main+0x3060>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VBROADCASTSS %XMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
AND %RAX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VMOVAPS %YMM0,0x300(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VMOVAPS %YMM1,0x400(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 7ce0 <main+0x3380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
JMP 7d2b <main+0x33cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
AND $-0x10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSS %XMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VBROADCASTSS %XMM2,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV %RAX,0x400(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%RAX),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,0x440(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM1,0x480(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 7d2b <main+0x33cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
TEST $0x8,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 77fd <main+0x2e9d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV 0x380(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1(%RCX),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP 0x78(%RSP),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JAE 6880 <main+0x1f20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
IMUL 0x3c8(%RSP),%RDI	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV 0x370(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
LEA (,%RCX,4),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 8840 <@plt_start@+0x30>	2	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x380(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 6880 <main+0x1f20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A

Function	main
Source file and lines	attention_v2.cpp:43-61
Module	attention-aocc-znver5-512

The loop is defined in /home/eoseret/llm-attention/attention_v2.cpp:43-61.

Analyzed code is defined in /home/eoseret/llm-attention/attention_v2.cpp:43-44,47,52,55,58-61.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 490 paths individually, rerun with max-paths=490
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

45% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

35% of SSE/AVX loads are used in vector version.
50% of SSE/AVX stores are used in vector version.
61% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 1 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:59

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VMOVAPS: 6 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:55
- /home/eoseret/llm-attention/attention_v2.cpp:55

Vector unaligned load/store instructions

Detected 6 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 4 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:52
- /home/eoseret/llm-attention/attention_v2.cpp:52
VEXTRACTF64X4: 2 occurrences►
- /home/eoseret/llm-attention/attention_v2.cpp:47
- /home/eoseret/llm-attention/attention_v2.cpp:52

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 82 FP arithmetical operations:

82: addition or subtraction

The binary loop is loading 516 bytes (129 single precision FP elements). The binary loop is storing 596 bytes (149 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.07 FP operations per loaded or stored byte.

General properties

nb instructions	200
nb uops	207
loop length	1090
used x86 registers	12
used mmx registers	0
used xmm registers	3
used ymm registers	3
used zmm registers	4
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	25.88 cycles
front end	25.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	11.50	11.50	11.50	11.50	11.50	11.50	14.50	14.50	14.50	14.50	10.50	10.50	10.50	10.50	9.00	9.00
cycles	11.50	11.50	11.50	11.50	11.50	11.50	14.50	14.50	14.50	14.50	10.50	10.50	10.50	10.50	9.00	9.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	25.88
Dispatch	14.50
Overall L1	25.88

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	3%

all	79%
load	78%
store	91%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	80%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	75%

INT+FP

all	45%
load	35%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	61%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

INT

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	40%
load	37%
store	67%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	51%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	33%

INT+FP

all	28%
load	23%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	42%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	24%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 25.88 cycles. At this rate:

7% of peak load performance is reached (19.94 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
17% of peak store performance is reached (23.03 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 68c4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
MOV 0x178(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x238(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
VMOVSS %XMM2,(%RAX,%RCX,4)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (6.3%)
MOV 0x378(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %RCX,0x2f0(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %RCX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP 0x78(%RSP),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x130(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JE 7da0 <main+0x3440>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
MOV %RSI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
AND $-0x8,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
AND $-0x40,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 68f0 <main+0x1f90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVSS -0x5a30(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (6.3%)
MOV 0x2f0(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 6a00 <main+0x20a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV 0x2f0(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP $0x40,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6910 <main+0x1fb0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVSS -0x5a56(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (6.3%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 69ad <main+0x204d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
VBROADCASTSS -0x5a6a(%RIP),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1-2	0.50	scal (6.3%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
XOR %ECX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $-0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVAPS %ZMM0,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMOVAPS %ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMAXPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPS %ZMM3,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPS %ZMM2,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM0,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.25	vect (50.0%)
VMAXPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VMAXSS %XMM1,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
CMP %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 6a0e <main+0x20ae>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
TEST $0x38,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 6a00 <main+0x20a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV $0x7ffffffffffffff8,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
AND %RDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VMAXPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VMAXSS %XMM1,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
JMP 6a09 <main+0x20a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV %RSI,0x138(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x238(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x380(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPS %XMM1,0x280(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,0x398(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6a50 <main+0x20f0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 7790 <main+0x2e30>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
CMP $0x40,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 6a70 <main+0x2110>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 75b3 <main+0x2c53>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VBROADCASTSS %XMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VXORPS %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R11,0x3f0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
ADD $-0x38,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,0x4c0(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %RAX,0x2e8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVAPS %ZMM0,0x300(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM0,0x400(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM0,0x440(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x400(%RSP),%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x2e8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VADDPS 0x300(%RSP),%ZMM0,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPS 0x440(%RSP),%ZMM0,%ZMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPS %ZMM0,%ZMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF64X4 $0x1,%ZMM0,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	4	0.25	vect (50.0%)
VADDPS %ZMM1,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VADDSS %XMM1,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 759b <main+0x2c3b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 77d6 <main+0x2e76>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
TEST $0x38,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 7790 <main+0x2e30>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
VXORPS %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VBLENDPS $0x1,%XMM2,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
AND %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,0x2e8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVAPS %YMM0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VEXTRACTF128 $0x1,%YMM2,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	2	0.25	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x2e8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VADDPS %XMM0,%XMM2,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1-2	0.25	vect (25.0%)
VADDPS %XMM1,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VMOVSHDUP %XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (12.5%)
VADDSS %XMM1,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (6.3%)
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 77d6 <main+0x2e76>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS %XMM2,0x240(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
CMP $0x8,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 77f0 <main+0x2e90>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 7ce0 <main+0x3380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
CMP $0x10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JAE 79c0 <main+0x3060>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
VBROADCASTSS %XMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VBROADCASTSS %XMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R12,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
MOV %RSI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	scal (12.5%)
AND %RAX,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
VMOVAPS %YMM0,0x300(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VMOVAPS %YMM1,0x400(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JNE 7ce0 <main+0x3380>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
JMP 7d2b <main+0x33cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
AND $-0x10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VBROADCASTSS %XMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
VBROADCASTSS %XMM2,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1-2	0.50	scal (6.3%)
MOV %RAX,0x400(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV $0x7ffffffffffffff8,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
LEA -0x8(%RAX),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVAPS %ZMM0,0x440(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPS %ZMM1,0x480(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND %RSI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
VMOVAPS 0x280(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R12,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JE 7d2b <main+0x33cb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
TEST $0x8,%SIL	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 77fd <main+0x2e9d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
MOV 0x380(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1(%RCX),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP 0x78(%RSP),%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JAE 6880 <main+0x1f20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.33-0.50	N/A
MOV %RCX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.13	N/A
IMUL 0x3c8(%RSP),%RDI	1	0.33	0.33	0.33	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.33	N/A
MOV 0x370(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
LEA (,%RCX,4),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x4,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 8840 <@plt_start@+0x30>	2	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VMOVAPS 0x240(%RSP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV 0x380(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x138(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 6880 <main+0x1f20>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code