| Loop Id: 50 | Module: attention-aocc-znver5-256 | Source: attention_v2.cpp:27-33 | Coverage: 5.78% |
|---|
| Loop Id: 50 | Module: attention-aocc-znver5-256 | Source: attention_v2.cpp:27-33 | Coverage: 5.78% |
|---|
0x5680 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
0x5684 VDIVSS 0x234(%RSP),%XMM0,%XMM0 |
0x568d MOV 0xd0(%RSP),%RCX |
0x5695 LEA (%RSI,%RDI,1),%R8D |
0x5699 INC %RDI |
0x569c VMOVSS %XMM0,(%RCX,%R8,4) |
0x56a2 CMP %RDI,0x60(%RSP) |
0x56a7 JE 5620 |
0x56ad VXORPD %XMM0,%XMM0,%XMM0 |
0x56b1 CMP $0x10,%R13D |
0x56b5 JB 56cb |
0x56b7 MOV %EDI,%R8D |
0x56ba ADD 0xd8(%RSP),%R8D |
0x56c2 SETB %R8B |
0x56c6 OR %DL,%R8B |
0x56c9 JE 5720 |
0x56cb MOV 0x28(%RSP),%R11 |
0x56d0 MOV 0x58(%RSP),%RCX |
0x56d5 XOR %R8D,%R8D |
0x56d8 MOV %R11,%R9 |
0x56db IMUL %R8,%R9 |
0x56df ADD %RDI,%R9 |
0x56e2 NOPW %CS:(%RAX,%RAX,1) |
(33) 0x56f0 LEA (%RAX,%R8,1),%R10D |
(33) 0x56f4 INC %R8 |
(33) 0x56f7 VMOVSS (%R12,%R10,4),%XMM1 |
(33) 0x56fd MOV %R9D,%R10D |
(33) 0x5700 VMOVSS (%RCX,%R10,4),%XMM2 |
(33) 0x5706 ADD %R11,%R9 |
(33) 0x5709 VCVTSS2SD %XMM1,%XMM1,%XMM1 |
(33) 0x570d VCVTSS2SD %XMM2,%XMM2,%XMM2 |
(33) 0x5711 VFMADD231SD %XMM2,%XMM1,%XMM0 |
(33) 0x5716 CMP %R8,%R13 |
(33) 0x5719 JNE 56f0 |
0x571b JMP 5680 |
0x5720 MOV 0x1a8(%RSP),%R10 |
0x5728 MOV 0x58(%RSP),%RCX |
0x572d VXORPD %XMM0,%XMM0,%XMM0 |
0x5731 VXORPD %XMM1,%XMM1,%XMM1 |
0x5735 VXORPD %XMM2,%XMM2,%XMM2 |
0x5739 VXORPD %XMM3,%XMM3,%XMM3 |
0x573d XOR %R8D,%R8D |
(51) 0x5740 LEA (%RAX,%R8,1),%R9D |
(51) 0x5744 VCVTPS2PD (%R12,%R9,4),%YMM4 |
(51) 0x574a VCVTPS2PD 0x10(%R12,%R9,4),%YMM5 |
(51) 0x5751 VCVTPS2PD 0x20(%R12,%R9,4),%YMM6 |
(51) 0x5758 VCVTPS2PD 0x30(%R12,%R9,4),%YMM7 |
(51) 0x575f LEA (%RDI,%R8,1),%R9D |
(51) 0x5763 ADD $0x10,%R8 |
(51) 0x5767 VCVTPS2PD (%RCX,%R9,4),%YMM8 |
(51) 0x576d VCVTPS2PD 0x10(%RCX,%R9,4),%YMM9 |
(51) 0x5774 VFMADD231PD %YMM8,%YMM4,%YMM0 |
(51) 0x5779 VFMADD231PD %YMM9,%YMM5,%YMM1 |
(51) 0x577e VCVTPS2PD 0x20(%RCX,%R9,4),%YMM8 |
(51) 0x5785 VCVTPS2PD 0x30(%RCX,%R9,4),%YMM5 |
(51) 0x578c VFMADD231PD %YMM8,%YMM6,%YMM2 |
(51) 0x5791 VFMADD231PD %YMM5,%YMM7,%YMM3 |
(51) 0x5796 CMP %R8,%R10 |
(51) 0x5799 JNE 5740 |
0x579b VADDPD %YMM0,%YMM1,%YMM0 |
0x579f VADDPD %YMM2,%YMM3,%YMM1 |
0x57a3 CMPQ $0,0x1b0(%RSP) |
0x57ac MOV 0x28(%RSP),%R11 |
0x57b1 MOV %R10,%R8 |
0x57b4 VADDPD %YMM0,%YMM1,%YMM0 |
0x57b8 VEXTRACTF128 $0x1,%YMM0,%XMM1 |
0x57be VADDPD %XMM1,%XMM0,%XMM0 |
0x57c2 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
0x57c7 VADDSD %XMM1,%XMM0,%XMM0 |
0x57cb JNE 56d8 |
0x57d1 JMP 5680 |
/home/eoseret/llm-attention/attention_v2.cpp: 27 - 33 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.34 |
| CQA speedup if FP arith vectorized | 2.80 |
| CQA speedup if fully vectorized | 6.19 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.32 |
| Bottlenecks | |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-30,attention_v2.cpp:33-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.69 |
| CQA cycles if no scalar integer | 2.75 |
| CQA cycles if FP arith vectorized | 1.32 |
| CQA cycles if fully vectorized | 0.60 |
| Front-end cycles | 3.66 |
| P0 cycles | 2.08 |
| P1 cycles | 2.08 |
| P2 cycles | 2.08 |
| P3 cycles | 2.08 |
| P4 cycles | 2.08 |
| P5 cycles | 2.08 |
| P6 cycles | 1.94 |
| P7 cycles | 1.94 |
| P8 cycles | 1.94 |
| P9 cycles | 1.94 |
| P10 cycles | 1.00 |
| P11 cycles | 1.00 |
| P12 cycles | 1.75 |
| P13 cycles | 1.75 |
| P14 cycles | 0.50 |
| P15 cycles | 0.50 |
| DIV/SQRT cycles | 2.50 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 29.25 |
| Nb uops | 29.25 |
| Nb loads | 6.75 |
| Nb stores | 1.00 |
| Nb stack references | 6.75 |
| FLOP/cycle | 2.31 |
| Nb FLOP add-sub | 7.50 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.17 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 47.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.25 |
| Stride indirect | 0.75 |
| Vectorization ratio all | 34.12 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 73.33 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 45.91 |
| Vector-efficiency ratio all | 16.80 |
| Vector-efficiency ratio load | 10.68 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 12.50 |
| Vector-efficiency ratio add_sub | 35.42 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 6.25 |
| Vector-efficiency ratio other | 17.16 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 2.42 |
| CQA speedup if fully vectorized | 14.55 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.05 |
| Bottlenecks | P10, P11, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-30,attention_v2.cpp:33-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.50 |
| CQA cycles if no scalar integer | 2.50 |
| CQA cycles if FP arith vectorized | 1.03 |
| CQA cycles if fully vectorized | 0.17 |
| Front-end cycles | 2.38 |
| P0 cycles | 1.50 |
| P1 cycles | 1.50 |
| P2 cycles | 1.50 |
| P3 cycles | 1.50 |
| P4 cycles | 1.50 |
| P5 cycles | 1.50 |
| P6 cycles | 1.50 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 1.50 |
| P10 cycles | 0.50 |
| P11 cycles | 0.50 |
| P12 cycles | 0.50 |
| P13 cycles | 0.50 |
| P14 cycles | 0.50 |
| P15 cycles | 0.50 |
| DIV/SQRT cycles | 2.50 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 19.00 |
| Nb loads | 5.00 |
| Nb stores | 1.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 0.40 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 16.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 36.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 14.29 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 25.00 |
| Vector-efficiency ratio all | 11.61 |
| Vector-efficiency ratio load | 10.42 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 6.25 |
| Vector-efficiency ratio other | 14.06 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.20 |
| CQA speedup if FP arith vectorized | 2.87 |
| CQA speedup if fully vectorized | 14.22 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | NA |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-30,attention_v2.cpp:33-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.00 |
| CQA cycles if no scalar integer | 2.50 |
| CQA cycles if FP arith vectorized | 1.05 |
| CQA cycles if fully vectorized | 0.21 |
| Front-end cycles | 3.00 |
| P0 cycles | 2.17 |
| P1 cycles | 2.17 |
| P2 cycles | 2.17 |
| P3 cycles | 2.17 |
| P4 cycles | 2.17 |
| P5 cycles | 2.17 |
| P6 cycles | 1.75 |
| P7 cycles | 1.75 |
| P8 cycles | 1.75 |
| P9 cycles | 1.75 |
| P10 cycles | 0.50 |
| P11 cycles | 0.50 |
| P12 cycles | 0.50 |
| P13 cycles | 0.50 |
| P14 cycles | 0.50 |
| P15 cycles | 0.50 |
| DIV/SQRT cycles | 2.50 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 24.00 |
| Nb uops | 24.00 |
| Nb loads | 6.00 |
| Nb stores | 1.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 0.33 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 40.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 14.29 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 25.00 |
| Vector-efficiency ratio all | 11.61 |
| Vector-efficiency ratio load | 10.42 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 6.25 |
| Vector-efficiency ratio other | 14.06 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.46 |
| CQA speedup if FP arith vectorized | 2.99 |
| CQA speedup if fully vectorized | 4.38 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.46 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-30,attention_v2.cpp:33-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.38 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 1.46 |
| CQA cycles if fully vectorized | 1.00 |
| Front-end cycles | 4.38 |
| P0 cycles | 2.17 |
| P1 cycles | 2.17 |
| P2 cycles | 2.17 |
| P3 cycles | 2.17 |
| P4 cycles | 2.17 |
| P5 cycles | 2.17 |
| P6 cycles | 2.25 |
| P7 cycles | 2.25 |
| P8 cycles | 2.25 |
| P9 cycles | 2.25 |
| P10 cycles | 1.50 |
| P11 cycles | 1.50 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| P14 cycles | 0.50 |
| P15 cycles | 0.50 |
| DIV/SQRT cycles | 2.50 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 35.00 |
| Nb uops | 35.00 |
| Nb loads | 8.00 |
| Nb stores | 1.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 3.66 |
| Nb FLOP add-sub | 15.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 13.71 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 56.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 57.89 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 80.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 70.00 |
| Vector-efficiency ratio all | 22.70 |
| Vector-efficiency ratio load | 10.94 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 37.50 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 6.25 |
| Vector-efficiency ratio other | 20.63 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.63 |
| CQA speedup if FP arith vectorized | 2.82 |
| CQA speedup if fully vectorized | 4.88 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.63 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-30,attention_v2.cpp:33-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.88 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 1.73 |
| CQA cycles if fully vectorized | 1.00 |
| Front-end cycles | 4.88 |
| P0 cycles | 2.50 |
| P1 cycles | 2.50 |
| P2 cycles | 2.50 |
| P3 cycles | 2.50 |
| P4 cycles | 2.50 |
| P5 cycles | 2.50 |
| P6 cycles | 2.25 |
| P7 cycles | 2.25 |
| P8 cycles | 2.25 |
| P9 cycles | 2.25 |
| P10 cycles | 1.50 |
| P11 cycles | 1.50 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| P14 cycles | 0.50 |
| P15 cycles | 0.50 |
| DIV/SQRT cycles | 2.50 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 39.00 |
| Nb uops | 39.00 |
| Nb loads | 8.00 |
| Nb stores | 1.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 3.28 |
| Nb FLOP add-sub | 15.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.31 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 56.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 50.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 66.67 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 63.64 |
| Vector-efficiency ratio all | 21.31 |
| Vector-efficiency ratio load | 10.94 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 12.50 |
| Vector-efficiency ratio add_sub | 33.33 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 6.25 |
| Vector-efficiency ratio other | 19.89 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-aocc-znver5-256 |
| nb instructions | 29.25 |
| nb uops | 29.25 |
| loop length | 142.50 |
| used x86 registers | 9.75 |
| used mmx registers | 0 |
| used xmm registers | 2.50 |
| used ymm registers | 2 |
| used zmm registers | 0 |
| nb stack references | 6.75 |
| micro-operation queue | 3.66 cycles |
| front end | 3.66 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.08 | 2.08 | 2.08 | 2.08 | 2.08 | 2.08 | 1.94 | 1.94 | 1.94 | 1.94 | 1.00 | 1.00 | 1.75 | 1.75 | 0.50 | 0.50 |
| cycles | 2.08 | 2.08 | 2.08 | 2.08 | 2.08 | 2.08 | 1.94 | 1.94 | 1.94 | 1.94 | 1.00 | 1.00 | 1.75 | 1.75 | 0.50 | 0.50 |
| Cycles executing div or sqrt instructions | 2.50 |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 3.66 |
| Dispatch | 2.42 |
| DIV/SQRT | 2.50 |
| Data deps. | 0.00 |
| Overall L1 | 3.69 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 49% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 80% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 68% |
| all | 34% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 73% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 45% |
| all | 10% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 19% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 37% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 21% |
| all | 16% |
| load | 10% |
| store | 6% |
| mul | 12% |
| add-sub | 35% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 17% |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-aocc-znver5-256 |
| nb instructions | 19 |
| nb uops | 19 |
| loop length | 97 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 5 |
| micro-operation queue | 2.38 cycles |
| front end | 2.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 |
| cycles | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 1.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 |
| Cycles executing div or sqrt instructions | 2.50 |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 2.38 |
| Dispatch | 1.50 |
| DIV/SQRT | 2.50 |
| Data deps. | 0.00 |
| Overall L1 | 2.50 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 25% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 50% |
| all | 14% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 25% |
| all | 10% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 12% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 18% |
| all | 11% |
| load | 10% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 14% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VDIVSS 0x234(%RSP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 2.50 | scal (6.3%) |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| INC %RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %RDI,0x60(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 5620 <main+0x1a10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMP $0x10,%R13D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JB 56cb <main+0x1abb> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %R11,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| IMUL %R8,%R9 | 1 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
| ADD %RDI,%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| JMP 5680 <main+0x1a70> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-aocc-znver5-256 |
| nb instructions | 24 |
| nb uops | 24 |
| loop length | 117 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 6 |
| micro-operation queue | 3.00 cycles |
| front end | 3.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 1.75 | 1.75 | 1.75 | 1.75 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 |
| cycles | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 1.75 | 1.75 | 1.75 | 1.75 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 | 0.50 |
| Cycles executing div or sqrt instructions | 2.50 |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 3.00 |
| Dispatch | 2.17 |
| DIV/SQRT | 2.50 |
| Data deps. | 0.00 |
| Overall L1 | 3.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 25% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 50% |
| all | 14% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 25% |
| all | 10% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 12% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 18% |
| all | 11% |
| load | 10% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 14% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VDIVSS 0x234(%RSP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 2.50 | scal (6.3%) |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| INC %RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %RDI,0x60(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 5620 <main+0x1a10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMP $0x10,%R13D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JB 56cb <main+0x1abb> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| ADD 0xd8(%RSP),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SETB %R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| OR %DL,%R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 5720 <main+0x1b10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %R11,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| IMUL %R8,%R9 | 1 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
| ADD %RDI,%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| JMP 5680 <main+0x1a70> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-aocc-znver5-256 |
| nb instructions | 35 |
| nb uops | 35 |
| loop length | 166 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 4 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 4.38 cycles |
| front end | 4.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 3.00 | 3.00 | 0.50 | 0.50 |
| cycles | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.17 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 3.00 | 3.00 | 0.50 | 0.50 |
| Cycles executing div or sqrt instructions | 2.50 |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 4.38 |
| Dispatch | 3.00 |
| DIV/SQRT | 2.50 |
| Data deps. | 0.00 |
| Overall L1 | 4.38 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 73% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 80% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 87% |
| all | 57% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 80% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 70% |
| all | 10% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 25% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 37% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 23% |
| all | 22% |
| load | 10% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 37% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 20% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VDIVSS 0x234(%RSP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 2.50 | scal (6.3%) |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| INC %RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %RDI,0x60(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 5620 <main+0x1a10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMP $0x10,%R13D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JB 56cb <main+0x1abb> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| ADD 0xd8(%RSP),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SETB %R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| OR %DL,%R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 5720 <main+0x1b10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV 0x1a8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VADDPD %YMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| VADDPD %YMM2,%YMM3,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| CMPQ $0,0x1b0(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| VADDPD %YMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 2 | 0.25 | vect (25.0%) |
| VADDPD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (25.0%) |
| VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (12.5%) |
| JNE 56d8 <main+0x1ac8> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| JMP 5680 <main+0x1a70> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-aocc-znver5-256 |
| nb instructions | 39 |
| nb uops | 39 |
| loop length | 190 |
| used x86 registers | 11 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 4 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 4.88 cycles |
| front end | 4.88 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.50 | 2.50 | 2.50 | 2.50 | 2.50 | 2.50 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 3.00 | 3.00 | 0.50 | 0.50 |
| cycles | 2.50 | 2.50 | 2.50 | 2.50 | 2.50 | 2.50 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 3.00 | 3.00 | 0.50 | 0.50 |
| Cycles executing div or sqrt instructions | 2.50 |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 4.88 |
| Dispatch | 3.00 |
| DIV/SQRT | 2.50 |
| Data deps. | 0.00 |
| Overall L1 | 4.88 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 73% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 80% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 87% |
| all | 50% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 63% |
| all | 11% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 25% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 37% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 23% |
| all | 21% |
| load | 10% |
| store | 6% |
| mul | 12% |
| add-sub | 33% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 19% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VDIVSS 0x234(%RSP),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 2.50 | scal (6.3%) |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| INC %RDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %RDI,0x60(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 5620 <main+0x1a10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMP $0x10,%R13D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JB 56cb <main+0x1abb> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| ADD 0xd8(%RSP),%R8D | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SETB %R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| OR %DL,%R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 5720 <main+0x1b10> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| MOV %R11,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | scal (12.5%) |
| IMUL %R8,%R9 | 1 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
| ADD %RDI,%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| JMP 5680 <main+0x1a70> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1a8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VADDPD %YMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| VADDPD %YMM2,%YMM3,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| CMPQ $0,0x1b0(%RSP) | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| MOV %R10,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| VADDPD %YMM0,%YMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (50.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 2 | 0.25 | vect (25.0%) |
| VADDPD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (25.0%) |
| VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (12.5%) |
| JNE 56d8 <main+0x1ac8> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
