| Loop Id: 83 | Module: attention-clang-znver5-512 | Source: attention_v2.cpp:26-194 [...] | Coverage: 0.06% |
|---|
| Loop Id: 83 | Module: attention-clang-znver5-512 | Source: attention_v2.cpp:26-194 [...] | Coverage: 0.06% |
|---|
0x5d3c MOV 0xc0(%RSP),%EAX |
0x5d43 ADD %RBX,%RCX |
0x5d46 INC %EAX |
0x5d48 CMP 0x80(%RSP),%EAX |
0x5d4f JE 5ff3 |
0x5d55 CMP $0x1,%RBX |
0x5d59 MOV %EAX,0xc0(%RSP) |
0x5d60 MOV 0x30(%RSP),%R9 |
0x5d65 SETNE %R8B |
0x5d69 IMUL %EBX,%EAX |
0x5d6c MOV %EAX,%EDI |
0x5d6e ADD 0xb8(%RSP),%EDI |
0x5d75 MOV %RAX,0x200(%RSP) |
0x5d7d SETB %AL |
0x5d80 XOR %ESI,%ESI |
0x5d82 OR %R8B,%AL |
0x5d85 MOV %AL,0x180(%RSP) |
0x5d8c JMP 5dbf |
(84) 0x5d90 MOV 0x200(%RSP),%RAX |
(84) 0x5d98 MOV 0x140(%RSP),%RDX |
(84) 0x5da0 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
(84) 0x5da4 LEA (%RAX,%RSI,1),%R9D |
(84) 0x5da8 INC %RSI |
(84) 0x5dab VMOVSS %XMM0,(%RDX,%R9,4) |
(84) 0x5db1 MOV 0x30(%RSP),%R9 |
(84) 0x5db6 CMP %R9,%RSI |
(84) 0x5db9 JE 5d3c |
(84) 0x5dbf CMP $0x3,%R9D |
(84) 0x5dc3 JBE 5de2 |
(84) 0x5dc5 MOV %ESI,%R9D |
(84) 0x5dc8 ADD 0xb8(%RSP),%R9D |
(84) 0x5dd0 SETB %R9B |
(84) 0x5dd4 OR 0x180(%RSP),%R9B |
(84) 0x5ddc JE 8a77 |
(84) 0x5de2 CMPQ $0x7,0xb8(%RSP) |
(84) 0x5deb VXORPS %XMM0,%XMM0,%XMM0 |
(84) 0x5def MOV %RSI,0x2c0(%RSP) |
(84) 0x5df7 JAE 5e10 |
(84) 0x5df9 MOV 0x70(%RSP),%R14 |
(84) 0x5dfe MOV 0x178(%RSP),%RDX |
(84) 0x5e06 XOR %R9D,%R9D |
(84) 0x5e09 JMP 5f94 |
(84) 0x5e10 MOV %RSI,%R10 |
(84) 0x5e13 MOV 0x370(%RSP),%RAX |
(84) 0x5e1b MOV 0x418(%RSP),%RDI |
(84) 0x5e23 MOV 0x410(%RSP),%RSI |
(84) 0x5e2b MOV 0x408(%RSP),%R12 |
(84) 0x5e33 MOV 0x400(%RSP),%R13 |
(84) 0x5e3b MOV 0x3f8(%RSP),%R15 |
(84) 0x5e43 MOV 0x70(%RSP),%R14 |
(84) 0x5e48 MOV 0x3f0(%RSP),%R8 |
(84) 0x5e50 MOV 0x178(%RSP),%RDX |
(84) 0x5e58 XOR %R9D,%R9D |
(84) 0x5e5b NOPL (%RAX,%RAX,1) |
(43) 0x5e60 LEA (%RCX,%R9,1),%R11D |
(43) 0x5e64 VMOVSS (%R14,%R11,4),%XMM1 |
(43) 0x5e6a MOV %R10D,%R11D |
(43) 0x5e6d VMOVSS (%RDX,%R11,4),%XMM2 |
(43) 0x5e73 LEA 0x1(%RCX,%R9,1),%R11D |
(43) 0x5e78 VMOVSS (%R14,%R11,4),%XMM3 |
(43) 0x5e7e LEA (%RBX,%R10,1),%R11D |
(43) 0x5e82 LEA 0x6(%RCX,%R9,1),%EBX |
(43) 0x5e87 VMOVSS (%RDX,%R11,4),%XMM4 |
(43) 0x5e8d LEA 0x2(%RCX,%R9,1),%R11D |
(43) 0x5e92 VMOVSS (%R14,%RBX,4),%XMM13 |
(43) 0x5e98 MOV 0x38(%RSP),%RBX |
(43) 0x5e9d VMOVSS (%R14,%R11,4),%XMM5 |
(43) 0x5ea3 LEA (%RSI,%R10,1),%R11D |
(43) 0x5ea7 VMOVSS (%RDX,%R11,4),%XMM6 |
(43) 0x5ead LEA 0x3(%RCX,%R9,1),%R11D |
(43) 0x5eb2 VCVTSS2SD %XMM1,%XMM1,%XMM1 |
(43) 0x5eb6 VCVTSS2SD %XMM2,%XMM2,%XMM2 |
(43) 0x5eba VMOVSS (%R14,%R11,4),%XMM7 |
(43) 0x5ec0 LEA (%R8,%R10,1),%R11D |
(43) 0x5ec4 VMOVSS (%RDX,%R11,4),%XMM8 |
(43) 0x5eca LEA 0x4(%RCX,%R9,1),%R11D |
(43) 0x5ecf VFMADD213SD %XMM0,%XMM1,%XMM2 |
(43) 0x5ed4 VCVTSS2SD %XMM3,%XMM3,%XMM0 |
(43) 0x5ed8 VMOVSS (%R14,%R11,4),%XMM9 |
(43) 0x5ede LEA (%R15,%R10,1),%R11D |
(43) 0x5ee2 VMOVSS (%RDX,%R11,4),%XMM10 |
(43) 0x5ee8 LEA 0x5(%RCX,%R9,1),%R11D |
(43) 0x5eed VCVTSS2SD %XMM4,%XMM4,%XMM1 |
(43) 0x5ef1 VMOVSS (%R14,%R11,4),%XMM11 |
(43) 0x5ef7 LEA (%R13,%R10,1),%R11D |
(43) 0x5efc VMOVSS (%RDX,%R11,4),%XMM12 |
(43) 0x5f02 LEA (%R12,%R10,1),%R11D |
(43) 0x5f06 VMOVSS (%RDX,%R11,4),%XMM14 |
(43) 0x5f0c LEA 0x7(%RCX,%R9,1),%R11D |
(43) 0x5f11 ADD $0x8,%R9 |
(43) 0x5f15 VFMADD213SD %XMM2,%XMM0,%XMM1 |
(43) 0x5f1a VCVTSS2SD %XMM5,%XMM5,%XMM0 |
(43) 0x5f1e VMOVSS (%R14,%R11,4),%XMM15 |
(43) 0x5f24 LEA (%RDI,%R10,1),%R11D |
(43) 0x5f28 ADD %RAX,%R10 |
(43) 0x5f2b VMOVSS (%RDX,%R11,4),%XMM16 |
(43) 0x5f32 VCVTSS2SD %XMM6,%XMM6,%XMM2 |
(43) 0x5f36 VFMADD213SD %XMM1,%XMM0,%XMM2 |
(43) 0x5f3b VCVTSS2SD %XMM7,%XMM7,%XMM0 |
(43) 0x5f3f VCVTSS2SD %XMM8,%XMM8,%XMM1 |
(43) 0x5f44 VFMADD213SD %XMM2,%XMM0,%XMM1 |
(43) 0x5f49 VCVTSS2SD %XMM9,%XMM9,%XMM0 |
(43) 0x5f4e VCVTSS2SD %XMM10,%XMM10,%XMM2 |
(43) 0x5f53 VFMADD213SD %XMM1,%XMM0,%XMM2 |
(43) 0x5f58 VCVTSS2SD %XMM11,%XMM11,%XMM0 |
(43) 0x5f5d VCVTSS2SD %XMM12,%XMM12,%XMM1 |
(43) 0x5f62 VFMADD213SD %XMM2,%XMM0,%XMM1 |
(43) 0x5f67 VCVTSS2SD %XMM13,%XMM13,%XMM0 |
(43) 0x5f6c VCVTSS2SD %XMM14,%XMM14,%XMM2 |
(43) 0x5f71 VFMADD213SD %XMM1,%XMM0,%XMM2 |
(43) 0x5f76 VCVTSS2SD %XMM15,%XMM15,%XMM1 |
(43) 0x5f7b VCVTSS2SD %XMM16,%XMM16,%XMM0 |
(43) 0x5f81 VFMADD213SD %XMM2,%XMM1,%XMM0 |
(43) 0x5f86 CMP %R9,0x380(%RSP) |
(43) 0x5f8e JNE 5e60 |
(84) 0x5f94 MOV 0x2c0(%RSP),%RSI |
(84) 0x5f9c TEST $0x7,%BL |
(84) 0x5f9f JE 5d90 |
(84) 0x5fa5 MOV 0x378(%RSP),%R11 |
(84) 0x5fad MOV %RBX,%R10 |
(84) 0x5fb0 IMUL %R9,%R10 |
(84) 0x5fb4 ADD %ECX,%R9D |
(84) 0x5fb7 ADD %RSI,%R10 |
(84) 0x5fba NOPW (%RAX,%RAX,1) |
(85) 0x5fc0 MOV %R9D,%EBX |
(85) 0x5fc3 VMOVSS (%R14,%RBX,4),%XMM1 |
(85) 0x5fc9 MOV %R10D,%EBX |
(85) 0x5fcc VMOVSS (%RDX,%RBX,4),%XMM2 |
(85) 0x5fd1 MOV 0x38(%RSP),%RBX |
(85) 0x5fd6 INC %R9D |
(85) 0x5fd9 ADD %RBX,%R10 |
(85) 0x5fdc DEC %R11 |
(85) 0x5fdf VCVTSS2SD %XMM1,%XMM1,%XMM1 |
(85) 0x5fe3 VCVTSS2SD %XMM2,%XMM2,%XMM2 |
(85) 0x5fe7 VFMADD231SD %XMM2,%XMM1,%XMM0 |
(85) 0x5fec JNE 5fc0 |
(84) 0x5fee JMP 5d90 |
/home/eoseret/llm-attention/attention_v2.cpp: 26 - 194 |
-------------------------------------------------------------------------------- |
26: for (unsigned int i = 0; i < M; ++i) { |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
[...] |
194: start = std::chrono::steady_clock::now(); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 13.09 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:26-26,attention_v2.cpp:194-194 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.25 |
| CQA cycles if no scalar integer | 2.25 |
| CQA cycles if FP arith vectorized | 2.25 |
| CQA cycles if fully vectorized | 0.17 |
| Front-end cycles | 2.25 |
| P0 cycles | 1.83 |
| P1 cycles | 1.83 |
| P2 cycles | 1.83 |
| P3 cycles | 1.83 |
| P4 cycles | 1.83 |
| P5 cycles | 1.83 |
| P6 cycles | 1.75 |
| P7 cycles | 1.75 |
| P8 cycles | 1.75 |
| P9 cycles | 1.75 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| P15 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 18.00 |
| Nb uops | 18.00 |
| Nb loads | 4.00 |
| Nb stores | 3.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 20.00 |
| Bytes stored | 13.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 8.75 |
| Vector-efficiency ratio load | 8.33 |
| Vector-efficiency ratio store | 9.38 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 9.38 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 8.33 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 13.09 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:26-26,attention_v2.cpp:194-194 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.25 |
| CQA cycles if no scalar integer | 2.25 |
| CQA cycles if FP arith vectorized | 2.25 |
| CQA cycles if fully vectorized | 0.17 |
| Front-end cycles | 2.25 |
| P0 cycles | 1.83 |
| P1 cycles | 1.83 |
| P2 cycles | 1.83 |
| P3 cycles | 1.83 |
| P4 cycles | 1.83 |
| P5 cycles | 1.83 |
| P6 cycles | 1.75 |
| P7 cycles | 1.75 |
| P8 cycles | 1.75 |
| P9 cycles | 1.75 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| P15 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 18.00 |
| Nb uops | 18.00 |
| Nb loads | 4.00 |
| Nb stores | 3.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 20.00 |
| Bytes stored | 13.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 8.75 |
| Vector-efficiency ratio load | 8.33 |
| Vector-efficiency ratio store | 9.38 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 9.38 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 8.33 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:26-194 |
| Module | attention-clang-znver5-512 |
| nb instructions | 18 |
| nb uops | 18 |
| loop length | 82 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 6 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.75 | 1.75 | 1.75 | 1.75 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
| cycles | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.75 | 1.75 | 1.75 | 1.75 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 2.25 |
| Dispatch | 1.83 |
| Overall L1 | 2.25 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 8% |
| load | 8% |
| store | 9% |
| mul | 6% |
| add-sub | 9% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 8% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| ADD %RBX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| INC %EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| CMP 0x80(%RSP),%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
| JE 5ff3 <main+0x2643> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| CMP $0x1,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| SETNE %R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %EBX,%EAX | 1 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (6.3%) |
| MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| ADD 0xb8(%RSP),%EDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| SETB %AL | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
| OR %R8B,%AL | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %AL,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | N/A |
| JMP 5dbf <main+0x240f> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:26-194 |
| Module | attention-clang-znver5-512 |
| nb instructions | 18 |
| nb uops | 18 |
| loop length | 82 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 6 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.75 | 1.75 | 1.75 | 1.75 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
| cycles | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.83 | 1.75 | 1.75 | 1.75 | 1.75 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 2.25 |
| Dispatch | 1.83 |
| Overall L1 | 2.25 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 8% |
| load | 8% |
| store | 9% |
| mul | 6% |
| add-sub | 9% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 8% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (6.3%) |
| ADD %RBX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| INC %EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| CMP 0x80(%RSP),%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
| JE 5ff3 <main+0x2643> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| CMP $0x1,%RBX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOV %EAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (12.5%) |
| SETNE %R8B | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %EBX,%EAX | 1 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (6.3%) |
| MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| ADD 0xb8(%RSP),%EDI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| SETB %AL | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
| OR %R8B,%AL | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %AL,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | N/A |
| JMP 5dbf <main+0x240f> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
