| Loop Id: 45 | Module: attention-clang-znver5-256 | Source: attention_v2.cpp:237-238 | Coverage: 0.11% |
|---|
| Loop Id: 45 | Module: attention-clang-znver5-256 | Source: attention_v2.cpp:237-238 | Coverage: 0.11% |
|---|
0x5860 VMOVUPS (%RCX,%R9,4),%XMM4 [2] |
0x5866 VMOVUPS 0x10(%RCX,%R9,4),%XMM5 [2] |
0x586d VPMULLQ %YMM6,%YMM0,%YMM3 |
0x5873 VPMULLQ %YMM6,%YMM1,%YMM2 |
0x5879 KXNORW %K0,%K0,%K1 |
0x587d ADD $0x8,%R9 |
0x5881 VPADDQ %YMM7,%YMM0,%YMM0 |
0x5885 VPADDQ %YMM7,%YMM1,%YMM1 |
0x5889 VSCATTERQPS %XMM4,(%R8,%YMM3,4){%K1} [1] |
0x5890 KXNORW %K0,%K0,%K1 |
0x5894 VSCATTERQPS %XMM5,(%R8,%YMM2,4){%K1} [1] |
0x589b CMP %R9,%R11 |
0x589e JNE 5860 |
/home/eoseret/llm-attention/attention_v2.cpp: 237 - 238 |
-------------------------------------------------------------------------------- |
237: for (int j = 0; j < dim; ++j)// vectorized |
238: h_KT[j * context_size + i] = h_K[i * dim + j]; |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 3.82 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | P14, P15, |
| Function | main |
| Source | attention_v2.cpp:237-238 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 10.00 |
| CQA cycles if no scalar integer | 10.00 |
| CQA cycles if FP arith vectorized | 10.00 |
| CQA cycles if fully vectorized | 2.62 |
| Front-end cycles | 8.00 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 3.00 |
| P11 cycles | 3.00 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| P14 cycles | 10.00 |
| P15 cycles | 10.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 - 2 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 13.00 |
| Nb uops | 64.00 |
| Nb loads | 2.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 9.60 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 32.00 |
| Bytes stored | 64.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 37.50 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | 25.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 3.82 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | P14, P15, |
| Function | main |
| Source | attention_v2.cpp:237-238 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 10.00 |
| CQA cycles if no scalar integer | 10.00 |
| CQA cycles if FP arith vectorized | 10.00 |
| CQA cycles if fully vectorized | 2.62 |
| Front-end cycles | 8.00 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 3.00 |
| P11 cycles | 3.00 |
| P12 cycles | 3.00 |
| P13 cycles | 3.00 |
| P14 cycles | 10.00 |
| P15 cycles | 10.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 - 2 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 13.00 |
| Nb uops | 64.00 |
| Nb loads | 2.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 9.60 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 32.00 |
| Bytes stored | 64.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 37.50 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | 25.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:237-238 |
| Module | attention-clang-znver5-256 |
| nb instructions | 13 |
| nb uops | 64 |
| loop length | 64 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 6 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 | 3.00 | 3.00 | 3.00 | 10.00 | 10.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 | 3.00 | 3.00 | 3.00 | 10.00 | 10.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00-2.00 |
| Front-end | 8.00 |
| Dispatch | 10.00 |
| Data deps. | 1.00-2.00 |
| Overall L1 | 10.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 25% |
| load | 25% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 37% |
| load | 25% |
| store | 25% |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPS (%RCX,%R9,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VMOVUPS 0x10(%RCX,%R9,4),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VPMULLQ %YMM6,%YMM0,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| VPMULLQ %YMM6,%YMM1,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| ADD $0x8,%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VPADDQ %YMM7,%YMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (50.0%) |
| VPADDQ %YMM7,%YMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (50.0%) |
| VSCATTERQPS %XMM4,(%R8,%YMM3,4){%K1} | 27 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.75 | 0.75 | 0.75 | 0.75 | 5 | 5 | 0-66 | 5 | vect (25.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VSCATTERQPS %XMM5,(%R8,%YMM2,4){%K1} | 27 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.75 | 0.75 | 0.75 | 0.75 | 5 | 5 | 0-66 | 5 | vect (25.0%) |
| CMP %R9,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 5860 <main+0x2a90> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:237-238 |
| Module | attention-clang-znver5-256 |
| nb instructions | 13 |
| nb uops | 64 |
| loop length | 64 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 6 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 | 3.00 | 3.00 | 3.00 | 10.00 | 10.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 | 3.00 | 3.00 | 3.00 | 10.00 | 10.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00-2.00 |
| Front-end | 8.00 |
| Dispatch | 10.00 |
| Data deps. | 1.00-2.00 |
| Overall L1 | 10.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 25% |
| load | 25% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 37% |
| load | 25% |
| store | 25% |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPS (%RCX,%R9,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VMOVUPS 0x10(%RCX,%R9,4),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VPMULLQ %YMM6,%YMM0,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| VPMULLQ %YMM6,%YMM1,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| ADD $0x8,%R9 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VPADDQ %YMM7,%YMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (50.0%) |
| VPADDQ %YMM7,%YMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1-2 | 0.25 | vect (50.0%) |
| VSCATTERQPS %XMM4,(%R8,%YMM3,4){%K1} | 27 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.75 | 0.75 | 0.75 | 0.75 | 5 | 5 | 0-66 | 5 | vect (25.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VSCATTERQPS %XMM5,(%R8,%YMM2,4){%K1} | 27 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.75 | 0.75 | 0.75 | 0.75 | 5 | 5 | 0-66 | 5 | vect (25.0%) |
| CMP %R9,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 5860 <main+0x2a90> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
