| Loop Id: 31 | Module: attention-gcc-znver5-256 | Source: attention_v2.cpp:43-61 | Coverage: 0.08% |
|---|
| Loop Id: 31 | Module: attention-gcc-znver5-256 | Source: attention_v2.cpp:43-61 | Coverage: 0.08% |
|---|
(30) 0x402b50 LEA 0x1(%R12),%ECX |
(30) 0x402b55 VBROADCASTSS 0x16a6(%RIP),%YMM0 |
(30) 0x402b5e MOV %R13,%RAX |
(30) 0x402b61 MOV %ECX,%EDX |
(30) 0x402b63 SHR $0x3,%EDX |
(30) 0x402b66 SAL $0x5,%RDX |
(30) 0x402b6a ADD %R13,%RDX |
(30) 0x402b6d NOPL (%RAX) |
(29) 0x402b70 VMAXPS (%RAX),%YMM0,%YMM0 |
(29) 0x402b74 ADD $0x20,%RAX |
(29) 0x402b78 CMP %RAX,%RDX |
(29) 0x402b7b JNE 402b70 |
(30) 0x402b7d VEXTRACTF32X4 $0x1,%YMM0,%XMM1 |
(30) 0x402b84 VMAXPS %XMM0,%XMM1,%XMM1 |
(30) 0x402b88 VMOVHLPS %XMM1,%XMM1,%XMM0 |
(30) 0x402b8c VMAXPS %XMM1,%XMM0,%XMM0 |
(30) 0x402b90 VSHUFPS $0x55,%XMM0,%XMM0,%XMM1 |
(30) 0x402b95 VMAXPS %XMM0,%XMM1,%XMM0 |
(30) 0x402b99 VMOVSS %XMM0,-0x38(%RBP) |
(30) 0x402b9e TEST $0x7,%CL |
(30) 0x402ba1 JE 402d20 |
0x402ba7 MOV %ECX,%EAX |
0x402ba9 AND $-0x8,%EAX |
0x402bac VZEROUPPER |
0x402baf MOVSXD %EAX,%RCX |
0x402bb2 VMOVSS -0x38(%RBP),%XMM1 |
0x402bb7 VMAXSS (%R13,%RCX,4),%XMM1,%XMM7 |
0x402bbe LEA (,%RCX,4),%RDX |
0x402bc6 VMOVSS %XMM7,-0x38(%RBP) |
0x402bcb CMP %R12D,%EAX |
0x402bce JGE 402c40 |
0x402bd0 VMAXSS 0x4(%R13,%RDX,1),%XMM7,%XMM7 |
0x402bd7 LEA 0x2(%RAX),%ECX |
0x402bda VMOVSS %XMM7,-0x38(%RBP) |
0x402bdf CMP %R12D,%ECX |
0x402be2 JG 402c40 |
0x402be4 VMAXSS 0x8(%R13,%RDX,1),%XMM7,%XMM1 |
0x402beb LEA 0x3(%RAX),%ECX |
0x402bee VMOVSS %XMM1,-0x38(%RBP) |
0x402bf3 CMP %R12D,%ECX |
0x402bf6 JG 402c40 |
0x402bf8 VMAXSS 0xc(%R13,%RDX,1),%XMM1,%XMM1 |
0x402bff LEA 0x4(%RAX),%ECX |
0x402c02 VMOVSS %XMM1,-0x38(%RBP) |
0x402c07 CMP %R12D,%ECX |
0x402c0a JG 402c40 |
0x402c0c VMAXSS 0x10(%R13,%RDX,1),%XMM1,%XMM7 |
0x402c13 LEA 0x5(%RAX),%ECX |
0x402c16 VMOVSS %XMM7,-0x38(%RBP) |
0x402c1b CMP %R12D,%ECX |
0x402c1e JG 402c40 |
0x402c20 VMAXSS 0x14(%R13,%RDX,1),%XMM7,%XMM7 |
0x402c27 ADD $0x6,%EAX |
0x402c2a VMOVSS %XMM7,-0x38(%RBP) |
0x402c2f CMP %R12D,%EAX |
0x402c32 JG 402c40 |
0x402c34 VMAXSS 0x18(%R13,%RDX,1),%XMM7,%XMM1 |
0x402c3b VMOVSS %XMM1,-0x38(%RBP) |
(30) 0x402c40 MOVL $0,-0x34(%RBP) |
(30) 0x402c47 MOV %R13,%R14 |
(30) 0x402c4a NOPW (%RAX,%RAX,1) |
(27) 0x402c50 VMOVSS (%R14),%XMM0 |
(27) 0x402c55 VSUBSS -0x38(%RBP),%XMM0,%XMM0 |
(27) 0x402c5a ADD $0x4,%R14 |
(27) 0x402c5e CALL 401110 <expf@plt> |
(27) 0x402c63 VADDSS -0x34(%RBP),%XMM0,%XMM3 |
(27) 0x402c68 VMOVSS %XMM3,-0x34(%RBP) |
(27) 0x402c6d CMP %R14,%RBX |
(27) 0x402c70 JNE 402c50 |
(30) 0x402c72 MOV -0x40(%RBP),%R14 |
(30) 0x402c76 MOV %R13,%R15 |
(30) 0x402c79 NOPL (%RAX) |
(28) 0x402c80 VMOVSS (%R15),%XMM0 |
(28) 0x402c85 VSUBSS -0x38(%RBP),%XMM0,%XMM0 |
(28) 0x402c8a ADD $0x4,%R15 |
(28) 0x402c8e ADD $0x4,%R14 |
(28) 0x402c92 CALL 401110 <expf@plt> |
(28) 0x402c97 VDIVSS -0x34(%RBP),%XMM0,%XMM0 |
(28) 0x402c9c VMOVSS %XMM0,-0x4(%R14) |
(28) 0x402ca2 CMP %R15,%RBX |
(28) 0x402ca5 JNE 402c80 |
(30) 0x402ca7 CMP -0x58(%RBP),%R12 |
(30) 0x402cab JE 402d30 |
(30) 0x402cb1 MOV -0x68(%RBP),%RAX |
(30) 0x402cb5 MOV -0x50(%RBP),%R15 |
(30) 0x402cb9 XOR %ESI,%ESI |
(30) 0x402cbb MOV -0x70(%RBP),%R14 |
(30) 0x402cbf ADD %RAX,-0x40(%RBP) |
(30) 0x402cc3 ADD %RAX,%R13 |
(30) 0x402cc6 MOV -0x48(%RBP),%EAX |
(30) 0x402cc9 MOV %R15,%RDI |
(30) 0x402ccc ADD %R14,%RBX |
(30) 0x402ccf SUB -0x44(%RBP),%EAX |
(30) 0x402cd2 LEA 0x4(,%RAX,4),%RDX |
(30) 0x402cda CALL 401040 <memset@plt> |
(30) 0x402cdf VMOVSS -0x34(%RBP),%XMM7 |
(30) 0x402ce4 MOV -0x60(%RBP),%RAX |
(30) 0x402ce8 VMOVSS %XMM7,(%RAX,%R12,4) |
(30) 0x402cee INC %R12 |
(30) 0x402cf1 LEA (%R15,%R14,1),%RAX |
(30) 0x402cf5 MOV %RAX,-0x50(%RBP) |
(30) 0x402cf9 MOV %R12D,-0x44(%RBP) |
(30) 0x402cfd CMP $0x6,%R12 |
(30) 0x402d01 JA 402b50 |
(30) 0x402d20 VZEROUPPER |
(30) 0x402d23 JMP 402c40 |
/home/eoseret/llm-attention/attention_v2.cpp: 43 - 61 |
-------------------------------------------------------------------------------- |
43: for (int row = 0; row < N; ++row) { |
44: const float *S_row = &S[row * N]; |
45: |
46: float max_val = -FLT_MAX; |
47: for (int idx = 0; idx <= row; ++idx) // vectorised |
48: if (S_row[idx] > max_val) max_val = S_row[idx]; |
49: |
50: float sum = 0.0f; |
51: #pragma clang loop vectorize(enable) |
52: for (int idx = 0; idx <= row; ++idx) // vectorised |
53: sum += expf(S_row[idx] - max_val); |
54: |
55: for (int idx = 0; idx <= row; ++idx) //vectorised |
56: P[row * N + idx] = expf(S_row[idx] - max_val) / sum; |
57: |
58: for (int idx = row + 1; idx < N; ++idx) |
59: P[row * N + idx] = 0.0f; |
60: |
61: D[row] = sum; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | main | attention_v2.cpp:283 | attention-gcc-znver5-256 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.23 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 14.80 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | micro-operation queue, |
| Function | softmax(float const*, float*, float*, int) |
| Source | attention_v2.cpp:47-48 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.63 |
| CQA cycles if no scalar integer | 3.75 |
| CQA cycles if FP arith vectorized | 4.63 |
| CQA cycles if fully vectorized | 0.31 |
| Front-end cycles | 4.63 |
| P0 cycles | 3.33 |
| P1 cycles | 3.33 |
| P2 cycles | 3.33 |
| P3 cycles | 3.33 |
| P4 cycles | 3.33 |
| P5 cycles | 3.33 |
| P6 cycles | 3.75 |
| P7 cycles | 3.75 |
| P8 cycles | 3.75 |
| P9 cycles | 3.75 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 3.50 |
| P13 cycles | 3.50 |
| P14 cycles | 3.50 |
| P15 cycles | 3.50 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 37.00 |
| Nb uops | 37.00 |
| Nb loads | 8.00 |
| Nb stores | 7.00 |
| Nb stack references | 1.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.97 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 32.00 |
| Bytes stored | 28.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 4.76 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 7.69 |
| Vector-efficiency ratio all | 7.14 |
| Vector-efficiency ratio load | 6.25 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 7.69 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.23 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 14.80 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.23 |
| Bottlenecks | micro-operation queue, |
| Function | softmax(float const*, float*, float*, int) |
| Source | attention_v2.cpp:47-48 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.63 |
| CQA cycles if no scalar integer | 3.75 |
| CQA cycles if FP arith vectorized | 4.63 |
| CQA cycles if fully vectorized | 0.31 |
| Front-end cycles | 4.63 |
| P0 cycles | 3.33 |
| P1 cycles | 3.33 |
| P2 cycles | 3.33 |
| P3 cycles | 3.33 |
| P4 cycles | 3.33 |
| P5 cycles | 3.33 |
| P6 cycles | 3.75 |
| P7 cycles | 3.75 |
| P8 cycles | 3.75 |
| P9 cycles | 3.75 |
| P10 cycles | 0.00 |
| P11 cycles | 0.00 |
| P12 cycles | 3.50 |
| P13 cycles | 3.50 |
| P14 cycles | 3.50 |
| P15 cycles | 3.50 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 37.00 |
| Nb uops | 37.00 |
| Nb loads | 8.00 |
| Nb stores | 7.00 |
| Nb stack references | 1.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.97 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 32.00 |
| Bytes stored | 28.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 4.76 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 7.69 |
| Vector-efficiency ratio all | 7.14 |
| Vector-efficiency ratio load | 6.25 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 7.69 |
| Path / |
| Function | softmax(float const*, float*, float*, int) |
| Source file and lines | attention_v2.cpp:43-61 |
| Module | attention-gcc-znver5-256 |
| nb instructions | 37 |
| nb uops | 37 |
| loop length | 153 |
| used x86 registers | 6 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 1 |
| micro-operation queue | 4.63 cycles |
| front end | 4.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.75 | 3.75 | 3.75 | 3.75 | 0.00 | 0.00 | 3.50 | 3.50 | 3.50 | 3.50 |
| cycles | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.75 | 3.75 | 3.75 | 3.75 | 0.00 | 0.00 | 3.50 | 3.50 | 3.50 | 3.50 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 4.63 |
| Dispatch | 3.75 |
| Overall L1 | 4.63 |
| all | 16% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 16% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 4% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 7% |
| all | 9% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 6% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| all | 7% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 7% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| AND $-0x8,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| MOVSXD %EAX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS -0x38(%RBP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMAXSS (%R13,%RCX,4),%XMM1,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA (,%RCX,4),%RDX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JGE 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x4(%R13,%RDX,1),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x2(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x8(%R13,%RDX,1),%XMM7,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x3(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0xc(%R13,%RDX,1),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x4(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x10(%R13,%RDX,1),%XMM1,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x5(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x14(%R13,%RDX,1),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| ADD $0x6,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x18(%R13,%RDX,1),%XMM7,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| Function | softmax(float const*, float*, float*, int) |
| Source file and lines | attention_v2.cpp:43-61 |
| Module | attention-gcc-znver5-256 |
| nb instructions | 37 |
| nb uops | 37 |
| loop length | 153 |
| used x86 registers | 6 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 1 |
| micro-operation queue | 4.63 cycles |
| front end | 4.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.75 | 3.75 | 3.75 | 3.75 | 0.00 | 0.00 | 3.50 | 3.50 | 3.50 | 3.50 |
| cycles | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.33 | 3.75 | 3.75 | 3.75 | 3.75 | 0.00 | 0.00 | 3.50 | 3.50 | 3.50 | 3.50 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 4.63 |
| Dispatch | 3.75 |
| Overall L1 | 4.63 |
| all | 16% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 16% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 4% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 7% |
| all | 9% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 6% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| all | 7% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 7% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.13 | N/A |
| AND $-0x8,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| MOVSXD %EAX,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS -0x38(%RBP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VMAXSS (%R13,%RCX,4),%XMM1,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA (,%RCX,4),%RDX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JGE 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x4(%R13,%RDX,1),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x2(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x8(%R13,%RDX,1),%XMM7,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x3(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0xc(%R13,%RDX,1),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x4(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x10(%R13,%RDX,1),%XMM1,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| LEA 0x5(%RAX),%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%ECX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x14(%R13,%RDX,1),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| ADD $0x6,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVSS %XMM7,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
| CMP %R12D,%EAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JG 402c40 <_Z7softmaxPKfPfS1_i+0x170> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33-0.50 | N/A |
| VMAXSS 0x18(%R13,%RDX,1),%XMM7,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | scal (6.3%) |
| VMOVSS %XMM1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (6.3%) |
