OV - attention-avx512 - Loop 37

	Loop Id: 37	Module: attention-avx512	Source: attention.cpp:52-53	Coverage: 0.16%

0x5960 VMOVAPS	%ZMM1,0x3c0(%RSP)    [2]

0x5968 MOV	%RAX,0x2b8(%RSP)    [2]

0x5970 VMOVUPS	-0xc0(%RDI,%RAX,4),%ZMM0    [1]

0x5978 VMOVUPS	-0x80(%RDI,%RAX,4),%ZMM1    [1]

0x5980 VMOVUPS	-0x40(%RDI,%RAX,4),%ZMM2    [1]

0x5988 VMOVUPS	(%RDI,%RAX,4),%ZMM3    [1]

0x598f VMOVAPS	0x380(%RSP),%ZMM4    [2]

0x5997 VSUBPS	%ZMM4,%ZMM0,%ZMM5

0x599d VMOVAPS	%ZMM5,0x80(%RSP)    [2]

0x59a5 VSUBPS	%ZMM4,%ZMM1,%ZMM0

0x59ab VMOVAPS	%ZMM0,0x100(%RSP)    [2]

0x59b3 VSUBPS	%ZMM4,%ZMM2,%ZMM0

0x59b9 VMOVAPS	%ZMM0,0x180(%RSP)    [2]

0x59c1 VSUBPS	%ZMM4,%ZMM3,%ZMM0

0x59c7 VMOVAPS	%ZMM0,0x200(%RSP)    [2]

0x59cf VEXTRACTF32X4	$0x3,%ZMM5,%XMM0

0x59d6 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x59dc VZEROUPPER

0x59df CALL	1110 <expf@plt>

0x59e4 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x59ed VMOVSHDUP	0x40(%RSP),%XMM0    [2]

0x59f3 CALL	1110 <expf@plt>

0x59f8 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5a01 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5a07 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5a10 VPERMILPD	$0x1,0x40(%RSP),%XMM0    [2]

0x5a18 CALL	1110 <expf@plt>

0x5a1d VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5a26 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5a2c VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5a35 VPERMILPS	$-0x1,0x40(%RSP),%XMM0    [2]

0x5a3d CALL	1110 <expf@plt>

0x5a42 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5a4b VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5a51 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5a5a VMOVAPS	0x80(%RSP),%ZMM0    [2]

0x5a62 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

0x5a69 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5a6f VZEROUPPER

0x5a72 CALL	1110 <expf@plt>

0x5a77 VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5a80 VMOVSHDUP	0x40(%RSP),%XMM0    [2]

0x5a86 CALL	1110 <expf@plt>

0x5a8b VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5a94 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5a9a VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5aa3 VPERMILPD	$0x1,0x40(%RSP),%XMM0    [2]

0x5aab CALL	1110 <expf@plt>

0x5ab0 VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5ab9 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5abf VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5ac8 VPERMILPS	$-0x1,0x40(%RSP),%XMM0    [2]

0x5ad0 CALL	1110 <expf@plt>

0x5ad5 VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5ade VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5ae4 VINSERTF128	$0x1,0x140(%RSP),%YMM0,%YMM0    [2]

0x5aef VMOVAPS	%YMM0,0x140(%RSP)    [2]

0x5af8 VMOVAPS	0x80(%RSP),%ZMM0    [2]

0x5b00 VEXTRACTF128	$0x1,%YMM0,%XMM0

0x5b06 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5b0c VZEROUPPER

0x5b0f CALL	1110 <expf@plt>

0x5b14 VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5b1d VMOVSHDUP	0x40(%RSP),%XMM0    [2]

0x5b23 CALL	1110 <expf@plt>

0x5b28 VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5b31 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5b37 VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5b40 VPERMILPD	$0x1,0x40(%RSP),%XMM0    [2]

0x5b48 CALL	1110 <expf@plt>

0x5b4d VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5b56 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5b5c VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5b65 VPERMILPS	$-0x1,0x40(%RSP),%XMM0    [2]

0x5b6d CALL	1110 <expf@plt>

0x5b72 VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5b7b VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5b81 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5b87 VMOVAPS	0x80(%RSP),%ZMM0    [2]

0x5b8f VZEROUPPER

0x5b92 CALL	1110 <expf@plt>

0x5b97 VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5ba0 VMOVSHDUP	0x80(%RSP),%XMM0    [2]

0x5ba9 CALL	1110 <expf@plt>

0x5bae VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5bb7 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5bbd VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5bc6 VPERMILPD	$0x1,0x80(%RSP),%XMM0    [2]

0x5bd1 CALL	1110 <expf@plt>

0x5bd6 VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5bdf VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5be5 VMOVAPS	%XMM0,0xc0(%RSP)    [2]

0x5bee VPERMILPS	$-0x1,0x80(%RSP),%XMM0    [2]

0x5bf9 CALL	1110 <expf@plt>

0x5bfe VMOVAPS	0xc0(%RSP),%XMM1    [2]

0x5c07 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5c0d VINSERTF128	$0x1,0x40(%RSP),%YMM0,%YMM0    [2]

0x5c15 VINSERTF64X4	$0x1,0x140(%RSP),%ZMM0,%ZMM0    [2]

0x5c1e VMOVAPS	0x2c0(%RSP),%ZMM1    [2]

0x5c26 VADDPS	%ZMM1,%ZMM0,%ZMM1

0x5c2c VMOVAPS	%ZMM1,0x2c0(%RSP)    [2]

0x5c34 VMOVAPS	0x100(%RSP),%ZMM0    [2]

0x5c3c VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

0x5c43 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5c4c VZEROUPPER

0x5c4f CALL	1110 <expf@plt>

0x5c54 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5c5a VMOVSHDUP	0x80(%RSP),%XMM0    [2]

0x5c63 CALL	1110 <expf@plt>

0x5c68 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5c6e VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5c74 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5c7a VPERMILPD	$0x1,0x80(%RSP),%XMM0    [2]

0x5c85 CALL	1110 <expf@plt>

0x5c8a VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5c90 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5c96 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5c9c VPERMILPS	$-0x1,0x80(%RSP),%XMM0    [2]

0x5ca7 CALL	1110 <expf@plt>

0x5cac VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5cb2 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5cb8 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5cbe VMOVAPS	0x100(%RSP),%ZMM0    [2]

0x5cc6 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

0x5ccd VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5cd6 VZEROUPPER

0x5cd9 CALL	1110 <expf@plt>

0x5cde VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5ce7 VMOVSHDUP	0x80(%RSP),%XMM0    [2]

0x5cf0 CALL	1110 <expf@plt>

0x5cf5 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5cfe VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5d04 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5d0d VPERMILPD	$0x1,0x80(%RSP),%XMM0    [2]

0x5d18 CALL	1110 <expf@plt>

0x5d1d VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5d26 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5d2c VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5d35 VPERMILPS	$-0x1,0x80(%RSP),%XMM0    [2]

0x5d40 CALL	1110 <expf@plt>

0x5d45 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5d4e VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5d54 VINSERTF128	$0x1,0x40(%RSP),%YMM0,%YMM0    [2]

0x5d5c VMOVAPS	%YMM0,0x40(%RSP)    [2]

0x5d62 VMOVAPS	0x100(%RSP),%ZMM0    [2]

0x5d6a VEXTRACTF128	$0x1,%YMM0,%XMM0

0x5d70 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5d79 VZEROUPPER

0x5d7c CALL	1110 <expf@plt>

0x5d81 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5d8a VMOVSHDUP	0x80(%RSP),%XMM0    [2]

0x5d93 CALL	1110 <expf@plt>

0x5d98 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5da1 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5da7 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5db0 VPERMILPD	$0x1,0x80(%RSP),%XMM0    [2]

0x5dbb CALL	1110 <expf@plt>

0x5dc0 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5dc9 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5dcf VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5dd8 VPERMILPS	$-0x1,0x80(%RSP),%XMM0    [2]

0x5de3 CALL	1110 <expf@plt>

0x5de8 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5df1 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5df7 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5e00 VMOVAPS	0x100(%RSP),%ZMM0    [2]

0x5e08 VZEROUPPER

0x5e0b CALL	1110 <expf@plt>

0x5e10 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5e19 VMOVSHDUP	0x100(%RSP),%XMM0    [2]

0x5e22 CALL	1110 <expf@plt>

0x5e27 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5e30 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5e36 VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5e3f VPERMILPD	$0x1,0x100(%RSP),%XMM0    [2]

0x5e4a CALL	1110 <expf@plt>

0x5e4f VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5e58 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5e5e VMOVAPS	%XMM0,0x140(%RSP)    [2]

0x5e67 VPERMILPS	$-0x1,0x100(%RSP),%XMM0    [2]

0x5e72 CALL	1110 <expf@plt>

0x5e77 VMOVAPS	0x140(%RSP),%XMM1    [2]

0x5e80 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5e86 VINSERTF128	$0x1,0x80(%RSP),%YMM0,%YMM0    [2]

0x5e91 VINSERTF64X4	$0x1,0x40(%RSP),%ZMM0,%ZMM0    [2]

0x5e9a VMOVAPS	0x300(%RSP),%ZMM1    [2]

0x5ea2 VADDPS	%ZMM1,%ZMM0,%ZMM1

0x5ea8 VMOVAPS	%ZMM1,0x300(%RSP)    [2]

0x5eb0 VMOVAPS	0x180(%RSP),%ZMM0    [2]

0x5eb8 VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

0x5ebf VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x5ec8 VZEROUPPER

0x5ecb CALL	1110 <expf@plt>

0x5ed0 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5ed9 VMOVSHDUP	0x100(%RSP),%XMM0    [2]

0x5ee2 CALL	1110 <expf@plt>

0x5ee7 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x5ef0 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5ef6 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5eff VPERMILPD	$0x1,0x100(%RSP),%XMM0    [2]

0x5f0a CALL	1110 <expf@plt>

0x5f0f VMOVAPS	0x80(%RSP),%XMM1    [2]

0x5f18 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5f1e VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5f27 VPERMILPS	$-0x1,0x100(%RSP),%XMM0    [2]

0x5f32 CALL	1110 <expf@plt>

0x5f37 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x5f40 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5f46 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x5f4f VMOVAPS	0x180(%RSP),%ZMM0    [2]

0x5f57 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

0x5f5e VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x5f67 VZEROUPPER

0x5f6a CALL	1110 <expf@plt>

0x5f6f VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5f75 VMOVSHDUP	0x100(%RSP),%XMM0    [2]

0x5f7e CALL	1110 <expf@plt>

0x5f83 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5f89 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x5f8f VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5f95 VPERMILPD	$0x1,0x100(%RSP),%XMM0    [2]

0x5fa0 CALL	1110 <expf@plt>

0x5fa5 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5fab VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x5fb1 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x5fb7 VPERMILPS	$-0x1,0x100(%RSP),%XMM0    [2]

0x5fc2 CALL	1110 <expf@plt>

0x5fc7 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x5fcd VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x5fd3 VINSERTF128	$0x1,0x80(%RSP),%YMM0,%YMM0    [2]

0x5fde VMOVAPS	%YMM0,0x80(%RSP)    [2]

0x5fe7 VMOVAPS	0x180(%RSP),%ZMM0    [2]

0x5fef VEXTRACTF128	$0x1,%YMM0,%XMM0

0x5ff5 VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x5ffe VZEROUPPER

0x6001 CALL	1110 <expf@plt>

0x6006 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x600c VMOVSHDUP	0x100(%RSP),%XMM0    [2]

0x6015 CALL	1110 <expf@plt>

0x601a VMOVAPS	0x40(%RSP),%XMM1    [2]

0x6020 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x6026 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x602c VPERMILPD	$0x1,0x100(%RSP),%XMM0    [2]

0x6037 CALL	1110 <expf@plt>

0x603c VMOVAPS	0x40(%RSP),%XMM1    [2]

0x6042 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x6048 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x604e VPERMILPS	$-0x1,0x100(%RSP),%XMM0    [2]

0x6059 CALL	1110 <expf@plt>

0x605e VMOVAPS	0x40(%RSP),%XMM1    [2]

0x6064 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x606a VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x6073 VMOVAPS	0x180(%RSP),%ZMM0    [2]

0x607b VZEROUPPER

0x607e CALL	1110 <expf@plt>

0x6083 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x6089 VMOVSHDUP	0x180(%RSP),%XMM0    [2]

0x6092 CALL	1110 <expf@plt>

0x6097 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x609d VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x60a3 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x60a9 VPERMILPD	$0x1,0x180(%RSP),%XMM0    [2]

0x60b4 CALL	1110 <expf@plt>

0x60b9 VMOVAPS	0x40(%RSP),%XMM1    [2]

0x60bf VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x60c5 VMOVAPS	%XMM0,0x40(%RSP)    [2]

0x60cb VPERMILPS	$-0x1,0x180(%RSP),%XMM0    [2]

0x60d6 CALL	1110 <expf@plt>

0x60db VMOVAPS	0x40(%RSP),%XMM1    [2]

0x60e1 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x60e7 VINSERTF128	$0x1,0x100(%RSP),%YMM0,%YMM0    [2]

0x60f2 VINSERTF64X4	$0x1,0x80(%RSP),%ZMM0,%ZMM0    [2]

0x60fb VMOVAPS	0x340(%RSP),%ZMM1    [2]

0x6103 VADDPS	%ZMM1,%ZMM0,%ZMM1

0x6109 VMOVAPS	%ZMM1,0x340(%RSP)    [2]

0x6111 VMOVAPS	0x200(%RSP),%ZMM0    [2]

0x6119 VEXTRACTF32X4	$0x3,%ZMM0,%XMM0

0x6120 VMOVAPS	%XMM0,0x180(%RSP)    [2]

0x6129 VZEROUPPER

0x612c CALL	1110 <expf@plt>

0x6131 VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x613a VMOVSHDUP	0x180(%RSP),%XMM0    [2]

0x6143 CALL	1110 <expf@plt>

0x6148 VMOVAPS	0x100(%RSP),%XMM1    [2]

0x6151 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x6157 VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x6160 VPERMILPD	$0x1,0x180(%RSP),%XMM0    [2]

0x616b CALL	1110 <expf@plt>

0x6170 VMOVAPS	0x100(%RSP),%XMM1    [2]

0x6179 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x617f VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x6188 VPERMILPS	$-0x1,0x180(%RSP),%XMM0    [2]

0x6193 CALL	1110 <expf@plt>

0x6198 VMOVAPS	0x100(%RSP),%XMM1    [2]

0x61a1 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x61a7 VMOVAPS	%XMM0,0x100(%RSP)    [2]

0x61b0 VMOVAPS	0x200(%RSP),%ZMM0    [2]

0x61b8 VEXTRACTF32X4	$0x2,%ZMM0,%XMM0

0x61bf VMOVAPS	%XMM0,0x180(%RSP)    [2]

0x61c8 VZEROUPPER

0x61cb CALL	1110 <expf@plt>

0x61d0 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x61d9 VMOVSHDUP	0x180(%RSP),%XMM0    [2]

0x61e2 CALL	1110 <expf@plt>

0x61e7 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x61f0 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x61f6 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x61ff VPERMILPD	$0x1,0x180(%RSP),%XMM0    [2]

0x620a CALL	1110 <expf@plt>

0x620f VMOVAPS	0x80(%RSP),%XMM1    [2]

0x6218 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x621e VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x6227 VPERMILPS	$-0x1,0x180(%RSP),%XMM0    [2]

0x6232 CALL	1110 <expf@plt>

0x6237 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x6240 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x6246 VINSERTF128	$0x1,0x100(%RSP),%YMM0,%YMM0    [2]

0x6251 VMOVAPS	%YMM0,0x100(%RSP)    [2]

0x625a VMOVAPS	0x200(%RSP),%ZMM0    [2]

0x6262 VEXTRACTF128	$0x1,%YMM0,%XMM0

0x6268 VMOVAPS	%XMM0,0x180(%RSP)    [2]

0x6271 VZEROUPPER

0x6274 CALL	1110 <expf@plt>

0x6279 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x6282 VMOVSHDUP	0x180(%RSP),%XMM0    [2]

0x628b CALL	1110 <expf@plt>

0x6290 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x6299 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x629f VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x62a8 VPERMILPD	$0x1,0x180(%RSP),%XMM0    [2]

0x62b3 CALL	1110 <expf@plt>

0x62b8 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x62c1 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x62c7 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x62d0 VPERMILPS	$-0x1,0x180(%RSP),%XMM0    [2]

0x62db CALL	1110 <expf@plt>

0x62e0 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x62e9 VINSERTPS	$0x30,%XMM0,%XMM1,%XMM0

0x62ef VMOVAPS	%XMM0,0x180(%RSP)    [2]

0x62f8 VMOVAPS	0x200(%RSP),%ZMM0    [2]

0x6300 VZEROUPPER

0x6303 CALL	1110 <expf@plt>

0x6308 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x6311 VMOVSHDUP	0x200(%RSP),%XMM0    [2]

0x631a CALL	1110 <expf@plt>

0x631f VMOVAPS	0x80(%RSP),%XMM1    [2]

0x6328 VINSERTPS	$0x10,%XMM0,%XMM1,%XMM0

0x632e VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x6337 VPERMILPD	$0x1,0x200(%RSP),%XMM0    [2]

0x6342 CALL	1110 <expf@plt>

0x6347 VMOVAPS	0x80(%RSP),%XMM1    [2]

0x6350 VINSERTPS	$0x20,%XMM0,%XMM1,%XMM0

0x6356 VMOVAPS	%XMM0,0x80(%RSP)    [2]

0x635f VPERMILPS	$-0x1,0x200(%RSP),%XMM0    [2]

0x636a CALL	1110 <expf@plt>

0x636f VMOVAPS	0x3c0(%RSP),%ZMM1    [2]

0x6377 MOV	0x2b8(%RSP),%RAX    [2]

0x637f MOV	0x2b0(%RSP),%R10    [2]

0x6387 MOV	0x280(%RSP),%RDI    [2]

0x638f VMOVAPS	0x80(%RSP),%XMM2    [2]

0x6398 VINSERTPS	$0x30,%XMM0,%XMM2,%XMM0

0x639e VINSERTF128	$0x1,0x180(%RSP),%YMM0,%YMM0    [2]

0x63a9 VINSERTF64X4	$0x1,0x100(%RSP),%ZMM0,%ZMM0    [2]

0x63b2 VADDPS	%ZMM1,%ZMM0,%ZMM1

0x63b8 ADD	$0x40,%RAX

0x63bc CMP	%RAX,%R10

0x63bf JNE	5960

/home/eoseret/Applications/llm-attention/attention.cpp: 52 - 53

--------------------------------------------------------------------------------

52:       for (int idx = 0; idx <= row; ++idx) // vectorised

53:          sum += expf(S_row[idx] - max_val);

Coverage (%)	Name	Module
►100.00+	__libc_init_first	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	attention-avx512

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.48
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.59
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.11
Bottlenecks	P4,
Function	main
Source	attention.cpp:52-53
Source loop unroll info	unrolled by 64
Source loop unroll confidence level	max
Unroll/vectorization loop type	main
Unroll factor	64
CQA cycles	145.00
CQA cycles if no scalar integer	98.00
CQA cycles if FP arith vectorized	145.00
CQA cycles if fully vectorized	91.13
Front-end cycles	130.50
P0 cycles	11.08
P1 cycles	10.92
P2 cycles	93.50
P3 cycles	93.17
P4 cycles	145.00
P5 cycles	92.00
P6 cycles	64.00
P7 cycles	93.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	367.00
Nb uops	522.00
Nb loads	135.00
Nb stores	81.00
Nb stack references	15.00
FLOP/cycle	0.88
Nb FLOP add-sub	128.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	35.09
Bytes prefetched	0.00
Bytes loaded	3352.00
Bytes stored	1736.00
Stride 0	1.00
Stride 1	0.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	1.00
Vectorization ratio all	83.50
Vectorization ratio load	100.00
Vectorization ratio store	98.77
Vectorization ratio mul	NA
Vectorization ratio add_sub	100.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	60.00
Vector-efficiency ratio all	32.03
Vector-efficiency ratio load	37.88
Vector-efficiency ratio store	33.49
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	100.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	18.33

Metric	Value
CQA speedup if no scalar integer	1.48
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.59
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.11
Bottlenecks	P4,
Function	main
Source	attention.cpp:52-53
Source loop unroll info	unrolled by 64
Source loop unroll confidence level	max
Unroll/vectorization loop type	main
Unroll factor	64
CQA cycles	145.00
CQA cycles if no scalar integer	98.00
CQA cycles if FP arith vectorized	145.00
CQA cycles if fully vectorized	91.13
Front-end cycles	130.50
P0 cycles	11.08
P1 cycles	10.92
P2 cycles	93.50
P3 cycles	93.17
P4 cycles	145.00
P5 cycles	92.00
P6 cycles	64.00
P7 cycles	93.33
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	0
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	367.00
Nb uops	522.00
Nb loads	135.00
Nb stores	81.00
Nb stack references	15.00
FLOP/cycle	0.88
Nb FLOP add-sub	128.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	35.09
Bytes prefetched	0.00
Bytes loaded	3352.00
Bytes stored	1736.00
Stride 0	1.00
Stride 1	0.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	1.00
Vectorization ratio all	83.50
Vectorization ratio load	100.00
Vectorization ratio store	98.77
Vectorization ratio mul	NA
Vectorization ratio add_sub	100.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	60.00
Vector-efficiency ratio all	32.03
Vector-efficiency ratio load	37.88
Vector-efficiency ratio store	33.49
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	100.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	18.33

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	main
Source file and lines	attention.cpp:52-53
Module	attention-avx512

The loop is defined in /home/eoseret/Applications/llm-attention/attention.cpp:52-53.

It is main loop of related source loop which is unrolled by 64 (including vectorization).

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 145.00 to 98.00 cycles (1.48x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is partially vectorized. Only 32% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 145.00 to 91.12 cycles (1.59x speedup).

Details

83% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

98% of SSE/AVX stores are used in vector version.
60% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Execution units bottlenecks

Performance is limited by writing data to caches/RAM (the store unit is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 145.00 to 130.50 cycles (1.11x speedup).

Workaround

Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

expf@plt: 64 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VINSERTF128: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF64X4: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VPERMILPD: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VPERMILPS: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VZEROUPPER: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Vector unaligned load/store instructions

Detected 24 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VEXTRACTF32X4: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF128: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF64X4: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

8 AVX-512 instructions are processing arithmetic or math operations on single precision FP elements in vector mode (sixteen at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 128 FP arithmetical operations:

128: addition or subtraction

The binary loop is loading 3352 bytes (838 single precision FP elements). The binary loop is storing 1736 bytes (434 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	367
nb uops	522
loop length	2661
used x86 registers	4
used mmx registers	0
used xmm registers	3
used ymm registers	1
used zmm registers	6
nb stack references	15

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	130.50 cycles
front end	130.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	11.08	10.92	93.50	93.17	145.00	92.00	64.00	93.33
cycles	11.08	10.92	93.50	93.17	145.00	92.00	64.00	93.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	130.50
Dispatch	145.00
Data deps.	0.00
Overall L1	145.00

Vectorization ratios

INT

all	94%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	82%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	53%

INT+FP

all	83%
load	100%
store	98%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	60%

Vector efficiency ratios

INT

all	24%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	32%
load	37%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

INT+FP

all	32%
load	37%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 145.00 cycles. At this rate:

18% of peak load performance is reached (23.12 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
18% of peak store performance is reached (11.97 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 5960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
VMOVAPS %ZMM1,0x3c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
MOV %RAX,0x2b8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VMOVUPS -0xc0(%RDI,%RAX,4),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS -0x80(%RDI,%RAX,4),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS -0x40(%RDI,%RAX,4),%ZMM2	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS (%RDI,%RAX,4),%ZMM3	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVAPS 0x380(%RSP),%ZMM4	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VSUBPS %ZMM4,%ZMM0,%ZMM5	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM5,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM1,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM2,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM3,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x200(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM5,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x140(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x40(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x140(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x2c0(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x2c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x40(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x80(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x40(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x300(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x300(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x80(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x100(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x80(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x340(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x340(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x100(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x200(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x200(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x200(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x3c0(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
MOV 0x2b8(%RSP),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV 0x2b0(%RSP),%R10	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV 0x280(%RSP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
VMOVAPS 0x80(%RSP),%XMM2	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM2,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x180(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x100(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
ADD $0x40,%RAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CMP %RAX,%R10	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JNE 5960 <main+0x21b0>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A

Function	main
Source file and lines	attention.cpp:52-53
Module	attention-avx512

The loop is defined in /home/eoseret/Applications/llm-attention/attention.cpp:52-53.

It is main loop of related source loop which is unrolled by 64 (including vectorization).

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

83% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

98% of SSE/AVX stores are used in vector version.
60% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Execution units bottlenecks

Workaround

Write less array elements
Provide more information to your compiler:
- hardcode the bounds of the corresponding 'for' loop

No data for this section

CALL instructions

Detected function call instructions.

Details

expf@plt: 64 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VINSERTF128: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF64X4: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VPERMILPD: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VPERMILPS: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VZEROUPPER: 16 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Vector unaligned load/store instructions

Detected 24 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VEXTRACTF32X4: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF128: 8 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
VINSERTF64X4: 4 occurrences►
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53
- /home/eoseret/Applications/llm-attention/attention.cpp:53

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

8 AVX-512 instructions are processing arithmetic or math operations on single precision FP elements in vector mode (sixteen at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 128 FP arithmetical operations:

128: addition or subtraction

The binary loop is loading 3352 bytes (838 single precision FP elements). The binary loop is storing 1736 bytes (434 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.03 FP operations per loaded or stored byte.

General properties

nb instructions	367
nb uops	522
loop length	2661
used x86 registers	4
used mmx registers	0
used xmm registers	3
used ymm registers	1
used zmm registers	6
nb stack references	15

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	130.50 cycles
front end	130.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	11.08	10.92	93.50	93.17	145.00	92.00	64.00	93.33
cycles	11.08	10.92	93.50	93.17	145.00	92.00	64.00	93.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	0.00

Cycles summary

Front-end	130.50
Dispatch	145.00
Data deps.	0.00
Overall L1	145.00

Vectorization ratios

INT

all	94%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	82%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	53%

INT+FP

all	83%
load	100%
store	98%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	60%

Vector efficiency ratios

INT

all	24%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	25%

all	32%
load	37%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

INT+FP

all	32%
load	37%
store	33%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 145.00 cycles. At this rate:

18% of peak load performance is reached (23.12 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
18% of peak store performance is reached (11.97 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 5960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
VMOVAPS %ZMM1,0x3c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
MOV %RAX,0x2b8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VMOVUPS -0xc0(%RDI,%RAX,4),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS -0x80(%RDI,%RAX,4),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS -0x40(%RDI,%RAX,4),%ZMM2	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVUPS (%RDI,%RAX,4),%ZMM3	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VMOVAPS 0x380(%RSP),%ZMM4	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VSUBPS %ZMM4,%ZMM0,%ZMM5	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM5,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM1,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM2,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VSUBPS %ZMM4,%ZMM3,%ZMM0	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM0,0x200(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM5,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x140(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x40(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x40(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x80(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0xc0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0xc0(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x40(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x140(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x2c0(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x2c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x40(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x80(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x80(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x100(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x140(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x80(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x40(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x300(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x300(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x80(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x100(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x100(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x180(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x40(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x100(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x80(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VMOVAPS 0x340(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
VMOVAPS %ZMM1,0x340(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (100.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x3,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x100(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF32X4 $0x2,%ZMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x100(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VMOVAPS %YMM0,0x100(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (50.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	1	0	0	3	1	vect (25.0%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x180(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x180(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVAPS 0x200(%RSP),%ZMM0	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VMOVSHDUP 0x200(%RSP),%XMM0	1	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (12.5%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x10,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPD $0x1,0x200(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x80(%RSP),%XMM1	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x20,%XMM0,%XMM1,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VMOVAPS %XMM0,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	vect (25.0%)
VPERMILPS $-0x1,0x200(%RSP),%XMM0	2	0	0	0.50	0.50	0	1	0	0	1	1	vect (25.0%)
CALL 1110 <expf@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
VMOVAPS 0x3c0(%RSP),%ZMM1	1	0	0	0.50	0.50	0	0	0	0	5-6	0.50	vect (100.0%)
MOV 0x2b8(%RSP),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV 0x2b0(%RSP),%R10	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV 0x280(%RSP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
VMOVAPS 0x80(%RSP),%XMM2	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	vect (25.0%)
VINSERTPS $0x30,%XMM0,%XMM2,%XMM0	1	0	0	0	0	0	1	0	0	1	1	scal (6.3%)
VINSERTF128 $0x1,0x180(%RSP),%YMM0,%YMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (25.0%)
VINSERTF64X4 $0x1,0x100(%RSP),%ZMM0,%ZMM0	2	0.33	0.33	0.50	0.50	0	0.33	0	0	5	0.50	vect (50.0%)
VADDPS %ZMM1,%ZMM0,%ZMM1	1	0.50	0	0	0	0	0.50	0	0	4	0.50	vect (100.0%)
ADD $0x40,%RAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CMP %RAX,%R10	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JNE 5960 <main+0x21b0>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A

Report Configuration

Code clean check

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Vectorization

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Execution units bottlenecks

Workaround

CALL instructions

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Complex instructions

Details

Slow data structures access

Details

Workaround

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Complex instructions

Details

Slow data structures access

Details

Workaround

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code