| Loop Id: 31 | Module: attention-avx512 | Source: attention.cpp:26-31 | Coverage: 0.08% |
|---|
| Loop Id: 31 | Module: attention-avx512 | Source: attention.cpp:26-31 | Coverage: 0.08% |
|---|
0x6c60 INC %R9D |
0x6c63 ADD %R13,%R8 |
0x6c66 CMP %R13D,%R9D |
0x6c69 JE 6c30 |
0x6c6b MOV %R9D,%R10D |
0x6c6e IMUL %R13D,%R10D |
0x6c72 ADD %EAX,%R10D |
0x6c75 SETB %R10B |
0x6c79 OR %CL,%R10B |
0x6c7c XOR %R11D,%R11D |
0x6c7f JMP 6ca7 |
(32) 0x6c90 INC %R11 |
(32) 0x6c93 CMP 0x68(%RSP),%R11 |
(32) 0x6c98 MOV 0xd8(%RSP),%RBX |
(32) 0x6ca0 MOV 0x70(%RSP),%R15 |
(32) 0x6ca5 JE 6c60 |
(32) 0x6ca7 CMP $0x4,%R15D |
(32) 0x6cab JB 6cba |
(32) 0x6cad MOV %R11D,%EBX |
(32) 0x6cb0 ADD %EAX,%EBX |
(32) 0x6cb2 SETB %BL |
(32) 0x6cb5 OR %R10B,%BL |
(32) 0x6cb8 JE 6cf0 |
(32) 0x6cba XOR %EBX,%EBX |
(32) 0x6cbc MOV %RBX,%R15 |
(32) 0x6cbf OR $0x1,%R15 |
(32) 0x6cc3 TEST $0x1,%R13B |
(32) 0x6cc7 JE 6ccc |
(32) 0x6cc9 MOV %R15,%RBX |
(32) 0x6ccc CMP %R15D,0x70(%RSP) |
(32) 0x6cd1 JE 6c90 |
(32) 0x6cd3 MOV 0x70(%RSP),%R15 |
(32) 0x6cd8 SUB %RBX,%R15 |
(32) 0x6cdb NOPL (%RAX,%RAX,1) |
(33) 0x6ce0 ADD $-0x2,%R15 |
(33) 0x6ce4 JNE 6ce0 |
(32) 0x6ce6 JMP 6c90 |
(32) 0x6cf0 CMP $0x20,%R15D |
(32) 0x6cf4 JAE 6cfe |
(32) 0x6cf6 XOR %R15D,%R15D |
(32) 0x6cf9 JMP 6db0 |
(32) 0x6cfe VXORPS %XMM0,%XMM0,%XMM0 |
(32) 0x6d02 XOR %EBX,%EBX |
(32) 0x6d04 VPXOR %XMM1,%XMM1,%XMM1 |
(32) 0x6d08 VPXOR %XMM2,%XMM2,%XMM2 |
(32) 0x6d0c VPXOR %XMM3,%XMM3,%XMM3 |
(32) 0x6d10 MOV 0x178(%RSP),%R13 |
(32) 0x6d18 MOV 0xd0(%RSP),%RDI |
(34) 0x6d20 LEA (%R8,%RBX,1),%R15D |
(34) 0x6d24 VCVTPS2PD (%RDI,%R15,4),%ZMM4 |
(34) 0x6d2b VCVTPS2PD 0x20(%RDI,%R15,4),%ZMM5 |
(34) 0x6d33 VCVTPS2PD 0x40(%RDI,%R15,4),%ZMM6 |
(34) 0x6d3b VCVTPS2PD 0x60(%RDI,%R15,4),%ZMM7 |
(34) 0x6d43 LEA (%R11,%RBX,1),%R15D |
(34) 0x6d47 VCVTPS2PD (%R13,%R15,4),%ZMM8 |
(34) 0x6d4f VCVTPS2PD 0x20(%R13,%R15,4),%ZMM9 |
(34) 0x6d57 VFMADD231PD %ZMM8,%ZMM4,%ZMM0 |
(34) 0x6d5d VCVTPS2PD 0x40(%R13,%R15,4),%ZMM4 |
(34) 0x6d65 VFMADD231PD %ZMM9,%ZMM5,%ZMM1 |
(34) 0x6d6b VCVTPS2PD 0x60(%R13,%R15,4),%ZMM5 |
(34) 0x6d73 VFMADD231PD %ZMM4,%ZMM6,%ZMM2 |
(34) 0x6d79 VFMADD231PD %ZMM5,%ZMM7,%ZMM3 |
(34) 0x6d7f ADD $0x20,%RBX |
(34) 0x6d83 CMP %RBX,%RDX |
(34) 0x6d86 JNE 6d20 |
(32) 0x6d88 CMP %EDX,0x70(%RSP) |
(32) 0x6d8c MOV 0x60(%RSP),%R13 |
(32) 0x6d91 JE 6c90 |
(32) 0x6d97 MOV %RDX,%R15 |
(32) 0x6d9a MOV %RDX,%RBX |
(32) 0x6d9d TEST $0x1c,%R13B |
(32) 0x6da1 JE 6cbc |
(32) 0x6da7 NOPW (%RAX,%RAX,1) |
(35) 0x6db0 ADD $0x4,%R15 |
(35) 0x6db4 CMP %R15,%RSI |
(35) 0x6db7 JNE 6db0 |
(32) 0x6db9 MOV %RSI,%RBX |
(32) 0x6dbc CMP %ESI,0x70(%RSP) |
(32) 0x6dc0 JE 6c90 |
(32) 0x6dc6 JMP 6cbc |
/home/eoseret/Applications/llm-attention/attention.cpp: 26 - 31 |
-------------------------------------------------------------------------------- |
26: for (unsigned int i = 0; i < M; ++i) { |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __libc_init_first | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | attention-avx512 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 14.67 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.22 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention.cpp:26-26 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.75 |
| CQA cycles if no scalar integer | 2.75 |
| CQA cycles if FP arith vectorized | 2.75 |
| CQA cycles if fully vectorized | 0.19 |
| Front-end cycles | 2.75 |
| P0 cycles | 2.25 |
| P1 cycles | 2.25 |
| P2 cycles | 0.00 |
| P3 cycles | 0.00 |
| P4 cycles | 0.00 |
| P5 cycles | 2.25 |
| P6 cycles | 2.25 |
| P7 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 11.00 |
| Nb uops | 11.00 |
| Nb loads | 0.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 0.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 0.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 7.81 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 9.38 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 6.25 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 14.67 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.22 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention.cpp:26-26 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.75 |
| CQA cycles if no scalar integer | 2.75 |
| CQA cycles if FP arith vectorized | 2.75 |
| CQA cycles if fully vectorized | 0.19 |
| Front-end cycles | 2.75 |
| P0 cycles | 2.25 |
| P1 cycles | 2.25 |
| P2 cycles | 0.00 |
| P3 cycles | 0.00 |
| P4 cycles | 0.00 |
| P5 cycles | 2.25 |
| P6 cycles | 2.25 |
| P7 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 11.00 |
| Nb uops | 11.00 |
| Nb loads | 0.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 0.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 0.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 7.81 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 9.38 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 6.25 |
| Path / |
| Function | main |
| Source file and lines | attention.cpp:26-31 |
| Module | attention-avx512 |
| nb instructions | 11 |
| nb uops | 11 |
| loop length | 33 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.75 cycles |
| front end | 2.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.25 | 2.25 | 0.00 | 0.00 | 0.00 | 2.25 | 2.25 | 0.00 |
| cycles | 2.25 | 2.25 | 0.00 | 0.00 | 0.00 | 2.25 | 2.25 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 2.75 |
| Dispatch | 2.25 |
| Overall L1 | 2.75 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 7% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 9% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %R9D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| ADD %R13,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP %R13D,%R9D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| JE 6c30 <main+0x3480> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R9D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| IMUL %R13D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| OR %CL,%R10B | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| JMP 6ca7 <main+0x34f7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| Function | main |
| Source file and lines | attention.cpp:26-31 |
| Module | attention-avx512 |
| nb instructions | 11 |
| nb uops | 11 |
| loop length | 33 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.75 cycles |
| front end | 2.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.25 | 2.25 | 0.00 | 0.00 | 0.00 | 2.25 | 2.25 | 0.00 |
| cycles | 2.25 | 2.25 | 0.00 | 0.00 | 0.00 | 2.25 | 2.25 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 2.75 |
| Dispatch | 2.25 |
| Overall L1 | 2.75 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 7% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 9% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %R9D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| ADD %R13,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP %R13D,%R9D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| JE 6c30 <main+0x3480> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R9D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| IMUL %R13D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %EAX,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| OR %CL,%R10B | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| JMP 6ca7 <main+0x34f7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
