| Loop Id: 20 | Module: attention-icx-skl512 | Source: attention_v2.cpp:27-98 [...] | Coverage: 4.38% |
|---|
| Loop Id: 20 | Module: attention-icx-skl512 | Source: attention_v2.cpp:27-98 [...] | Coverage: 4.38% |
|---|
0x405a60 VXORPD %XMM2,%XMM2,%XMM2 |
0x405a64 XOR %EDI,%EDI |
0x405a66 MOV 0xe0(%RSP),%R8 |
0x405a6e SUB %RDI,%R8 |
0x405a71 VPBROADCASTQ %R8,%ZMM3 |
0x405a77 VPCMPGTQ %ZMM10,%ZMM3,%K1 |
0x405a7d VPBROADCASTD %EDI,%YMM3 |
0x405a83 VPADDD %YMM3,%YMM11,%YMM3 |
0x405a87 VPADDD %YMM3,%YMM0,%YMM4 |
0x405a8b MOV 0x78(%RSP),%RDI |
0x405a90 ADD %R14,%RDI |
0x405a93 VPBROADCASTD 0x8568(%RIP),%YMM6 |
0x405a9c VPSUBD %YMM6,%YMM4,%YMM4 |
0x405aa0 VPXOR %XMM5,%XMM5,%XMM5 |
0x405aa4 KMOVQ %K1,%K2 |
0x405aa9 VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} |
0x405ab0 VMOVAPS %YMM5,%YMM9{%K1} |
0x405ab6 VCVTPS2PD %YMM9,%ZMM4 |
0x405abc VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 |
0x405ac6 VPADDD %YMM3,%YMM1,%YMM1 |
0x405aca MOV 0xe8(%RSP),%RDI |
0x405ad2 LEA (%RDI,%R14,1),%RDI |
0x405ad6 VPSUBD %YMM6,%YMM1,%YMM1 |
0x405ada VPXOR %XMM3,%XMM3,%XMM3 |
0x405ade KMOVQ %K1,%K2 |
0x405ae3 VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} |
0x405aea VMOVAPS %YMM3,%YMM8{%K1} |
0x405af0 VCVTPS2PD %YMM8,%ZMM1 |
0x405af6 VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
0x405afc VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
0x405b03 VADDPD %ZMM3,%ZMM1,%ZMM1 |
0x405b09 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
0x405b0f VADDPD %XMM3,%XMM1,%XMM1 |
0x405b13 VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
0x405b18 VADDSD %XMM3,%XMM1,%XMM1 |
0x405b1c VADDSD %XMM1,%XMM2,%XMM2 |
0x405b20 VCVTSD2SS %XMM2,%XMM2,%XMM1 |
0x405b24 LEA (%RDX,%RSI,1),%EDI |
0x405b27 MOV 0x108(%RSP),%R8 |
0x405b2f VMOVSS %XMM1,(%R8,%RDI,4) |
0x405b35 LEA 0x1(%RSI),%RDI |
0x405b39 CMP %R10,%RSI |
0x405b3c MOV %RDI,%RSI |
0x405b3f JE 405a20 |
0x405b45 VPBROADCASTD %ESI,%YMM1 |
0x405b4b TEST %R9,%R9 |
0x405b4e JE 405a60 |
0x405b54 VXORPD %XMM2,%XMM2,%XMM2 |
0x405b58 XOR %EDI,%EDI |
0x405b5a VMOVDQU 0x1c0(%RSP),%YMM5 |
0x405b63 VPMOVSXBD 0x8754(%RIP),%YMM6 |
0x405b6c MOV 0x78(%RSP),%R12 |
0x405b71 NOPW %CS:(%RAX,%RAX,1) |
(21) 0x405b80 VPBROADCASTD %EDI,%YMM3 |
(21) 0x405b86 VPADDD %YMM6,%YMM3,%YMM3 |
(21) 0x405b8a VPMULLD %YMM3,%YMM5,%YMM3 |
(21) 0x405b8f VPADDD %YMM3,%YMM1,%YMM3 |
(21) 0x405b93 LEA (%R11,%R14,1),%R8 |
(21) 0x405b97 VPCMPEQB %XMM0,%XMM0,%K1 |
(21) 0x405b9d VPSUBD %YMM7,%YMM3,%YMM3 |
(21) 0x405ba1 VXORPD %XMM4,%XMM4,%XMM4 |
(21) 0x405ba5 VGATHERDPS (%R8,%YMM3,4),%YMM4{%K1} |
(21) 0x405bac LEA (%RAX,%RDI,1),%R8D |
(21) 0x405bb0 VCVTPS2PD (%R12,%R8,4),%ZMM3 |
(21) 0x405bb7 VCVTPS2PD %YMM4,%ZMM4 |
(21) 0x405bbd VFMADD231PD %ZMM4,%ZMM3,%ZMM2 |
(21) 0x405bc3 ADD $0x8,%RDI |
(21) 0x405bc7 CMP %R9,%RDI |
(21) 0x405bca JB 405b80 |
0x405bcc VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
0x405bd3 VADDPD %ZMM3,%ZMM2,%ZMM2 |
0x405bd9 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
0x405bdf VADDPD %XMM3,%XMM2,%XMM2 |
0x405be3 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
0x405be8 VADDSD %XMM3,%XMM2,%XMM2 |
0x405bec MOV %R9,%RDI |
0x405bef CMP %R9,0xe0(%RSP) |
0x405bf7 MOV 0x130(%RSP),%R12 |
0x405bff JNE 405a66 |
0x405c05 JMP 405b20 |
/home/eoseret/Applications/llm-attention/attention_v2.cpp: 27 - 98 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
[...] |
98: if (argc < 4) { |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __libc_init_first | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | attention-icx-skl512 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.18 |
| CQA speedup if FP arith vectorized | 1.06 |
| CQA speedup if fully vectorized | 1.59 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.18 |
| Bottlenecks | |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 13.33 |
| CQA cycles if no scalar integer | 11.33 |
| CQA cycles if FP arith vectorized | 12.52 |
| CQA cycles if fully vectorized | 8.38 |
| Front-end cycles | 13.33 |
| P0 cycles | 9.39 |
| P1 cycles | 9.19 |
| P2 cycles | 9.17 |
| P3 cycles | 9.17 |
| P4 cycles | 1.00 |
| P5 cycles | 11.33 |
| P6 cycles | 5.75 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 45.33 |
| Nb uops | 53.33 |
| Nb loads | 9.00 |
| Nb stores | 1.00 |
| Nb stack references | 5.33 |
| FLOP/cycle | 1.55 |
| Nb FLOP add-sub | 15.33 |
| Nb FLOP mul | 5.33 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.21 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 133.33 |
| Bytes stored | 4.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 63.34 |
| Vectorization ratio load | 62.50 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 73.15 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 62.66 |
| Vector-efficiency ratio all | 33.21 |
| Vector-efficiency ratio load | 30.47 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 75.00 |
| Vector-efficiency ratio add_sub | 45.02 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 28.88 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.19 |
| CQA speedup if FP arith vectorized | 1.06 |
| CQA speedup if fully vectorized | 1.51 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.19 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 14.25 |
| CQA cycles if no scalar integer | 12.00 |
| CQA cycles if FP arith vectorized | 13.49 |
| CQA cycles if fully vectorized | 9.44 |
| Front-end cycles | 14.25 |
| P0 cycles | 11.00 |
| P1 cycles | 11.00 |
| P2 cycles | 11.00 |
| P3 cycles | 11.00 |
| P4 cycles | 1.00 |
| P5 cycles | 12.00 |
| P6 cycles | 5.00 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 47.00 |
| Nb uops | 57.00 |
| Nb loads | 8.00 |
| Nb stores | 1.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 1.40 |
| Nb FLOP add-sub | 12.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 9.54 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 132.00 |
| Bytes stored | 4.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 70.97 |
| Vectorization ratio load | 75.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 77.78 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 68.42 |
| Vector-efficiency ratio all | 38.31 |
| Vector-efficiency ratio load | 39.06 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 75.00 |
| Vector-efficiency ratio add_sub | 44.44 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 33.22 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.25 |
| CQA speedup if FP arith vectorized | 1.06 |
| CQA speedup if fully vectorized | 1.67 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.50 |
| CQA cycles if no scalar integer | 6.00 |
| CQA cycles if FP arith vectorized | 7.06 |
| CQA cycles if fully vectorized | 4.49 |
| Front-end cycles | 7.50 |
| P0 cycles | 4.50 |
| P1 cycles | 4.25 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 1.00 |
| P5 cycles | 6.00 |
| P6 cycles | 4.25 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 28.00 |
| Nb uops | 30.00 |
| Nb loads | 6.00 |
| Nb stores | 1.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 1.47 |
| Nb FLOP add-sub | 11.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.13 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 72.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 50.00 |
| Vectorization ratio load | 50.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 66.67 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 50.00 |
| Vector-efficiency ratio all | 25.00 |
| Vector-efficiency ratio load | 21.88 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 45.83 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 21.09 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.14 |
| CQA speedup if FP arith vectorized | 1.07 |
| CQA speedup if fully vectorized | 1.63 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.14 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 18.25 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 17.02 |
| CQA cycles if fully vectorized | 11.22 |
| Front-end cycles | 18.25 |
| P0 cycles | 12.67 |
| P1 cycles | 12.33 |
| P2 cycles | 13.50 |
| P3 cycles | 13.50 |
| P4 cycles | 1.00 |
| P5 cycles | 16.00 |
| P6 cycles | 8.00 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 61.00 |
| Nb uops | 73.00 |
| Nb loads | 13.00 |
| Nb stores | 1.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 1.70 |
| Nb FLOP add-sub | 23.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.96 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 196.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 69.05 |
| Vectorization ratio load | 62.50 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 75.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 69.57 |
| Vector-efficiency ratio all | 36.31 |
| Vector-efficiency ratio load | 30.47 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 75.00 |
| Vector-efficiency ratio add_sub | 44.79 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 32.34 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-icx-skl512 |
| nb instructions | 45.33 |
| nb uops | 53.33 |
| loop length | 247 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 3.67 |
| used ymm registers | 8 |
| used zmm registers | 3.67 |
| nb stack references | 5.33 |
| ADD-SUB / MUL ratio | 5.50 |
| micro-operation queue | 13.33 cycles |
| front end | 13.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 9.39 | 9.19 | 9.17 | 9.17 | 1.00 | 11.33 | 5.75 | 1.00 |
| cycles | 9.39 | 9.19 | 9.17 | 9.17 | 1.00 | 11.33 | 5.75 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 13.33 |
| Dispatch | 11.33 |
| Data deps. | 0.00 |
| Overall L1 | 13.33 |
| all | 50% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 23% |
| all | 73% |
| load | 100% |
| store | 0% |
| mul | 100% |
| add-sub | 57% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 87% |
| all | 63% |
| load | 62% |
| store | 0% |
| mul | 100% |
| add-sub | 73% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 62% |
| all | 27% |
| load | 24% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 19% |
| all | 37% |
| load | 50% |
| store | 6% |
| mul | 100% |
| add-sub | 41% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 35% |
| all | 33% |
| load | 30% |
| store | 6% |
| mul | 75% |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 28% |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-icx-skl512 |
| nb instructions | 47 |
| nb uops | 57 |
| loop length | 244 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 9 |
| used zmm registers | 4 |
| nb stack references | 5 |
| ADD-SUB / MUL ratio | 4.00 |
| micro-operation queue | 14.25 cycles |
| front end | 14.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 11.00 | 11.00 | 11.00 | 11.00 | 1.00 | 12.00 | 5.00 | 1.00 |
| cycles | 11.00 | 11.00 | 11.00 | 11.00 | 1.00 | 12.00 | 5.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 14.25 |
| Dispatch | 12.00 |
| Data deps. | 0.00 |
| Overall L1 | 14.25 |
| all | 64% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 37% |
| all | 76% |
| load | 100% |
| store | 0% |
| mul | 100% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 90% |
| all | 70% |
| load | 75% |
| store | 0% |
| mul | 100% |
| add-sub | 77% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 68% |
| all | 35% |
| load | 28% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 24% |
| all | 40% |
| load | 50% |
| store | 6% |
| mul | 100% |
| add-sub | 37% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 39% |
| all | 38% |
| load | 39% |
| store | 6% |
| mul | 75% |
| add-sub | 44% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| SUB %RDI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VPBROADCASTQ %R8,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPCMPGTQ %ZMM10,%ZMM3,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPBROADCASTD %EDI,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VPADDD %YMM3,%YMM11,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPADDD %YMM3,%YMM0,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| ADD %R14,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VPBROADCASTD 0x8568(%RIP),%YMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VPSUBD %YMM6,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 | vect (50.0%) |
| VMOVAPS %YMM5,%YMM9{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (50.0%) |
| VCVTPS2PD %YMM9,%ZMM4 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 | 3 | 1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM3,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| LEA (%RDI,%R14,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPSUBD %YMM6,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPXOR %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 | vect (50.0%) |
| VMOVAPS %YMM3,%YMM8{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (50.0%) |
| VCVTPS2PD %YMM8,%ZMM1 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM3,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM1,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM3,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM3,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| VADDSD %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RDX,%RSI,1),%EDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV 0x108(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM1,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP %R10,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 405a20 <main+0x2770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VPBROADCASTD %ESI,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| JE 405a60 <main+0x27b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-icx-skl512 |
| nb instructions | 28 |
| nb uops | 30 |
| loop length | 158 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 3 |
| used ymm registers | 5 |
| used zmm registers | 2 |
| nb stack references | 5 |
| micro-operation queue | 7.50 cycles |
| front end | 7.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 4.50 | 4.25 | 3.00 | 3.00 | 1.00 | 6.00 | 4.25 | 1.00 |
| cycles | 4.50 | 4.25 | 3.00 | 3.00 | 1.00 | 6.00 | 4.25 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 7.50 |
| Dispatch | 6.00 |
| Data deps. | 0.00 |
| Overall L1 | 7.50 |
| all | 28% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 66% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 80% |
| all | 50% |
| load | 50% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 16% |
| load | 21% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 31% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 27% |
| all | 25% |
| load | 21% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 21% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM2,%XMM2,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RDX,%RSI,1),%EDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV 0x108(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM1,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP %R10,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 405a20 <main+0x2770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VPBROADCASTD %ESI,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405a60 <main+0x27b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VMOVDQU 0x1c0(%RSP),%YMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x8754(%RIP),%YMM6 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| MOV 0x78(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM3,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM3,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM3,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R9,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| CMP %R9,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV 0x130(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| JNE 405a66 <main+0x27b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP 405b20 <main+0x2870> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-icx-skl512 |
| nb instructions | 61 |
| nb uops | 73 |
| loop length | 339 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 10 |
| used zmm registers | 5 |
| nb stack references | 6 |
| ADD-SUB / MUL ratio | 7.00 |
| micro-operation queue | 18.25 cycles |
| front end | 18.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 12.67 | 12.33 | 13.50 | 13.50 | 1.00 | 16.00 | 8.00 | 1.00 |
| cycles | 12.67 | 12.33 | 13.50 | 13.50 | 1.00 | 16.00 | 8.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 18.25 |
| Dispatch | 16.00 |
| Data deps. | 0.00 |
| Overall L1 | 18.25 |
| all | 57% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 33% |
| all | 78% |
| load | 100% |
| store | 0% |
| mul | 100% |
| add-sub | 57% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 92% |
| all | 69% |
| load | 62% |
| store | 0% |
| mul | 100% |
| add-sub | 75% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 69% |
| all | 31% |
| load | 23% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 22% |
| all | 40% |
| load | 50% |
| store | 6% |
| mul | 100% |
| add-sub | 41% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 38% |
| all | 36% |
| load | 30% |
| store | 6% |
| mul | 75% |
| add-sub | 44% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 32% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| SUB %RDI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VPBROADCASTQ %R8,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPCMPGTQ %ZMM10,%ZMM3,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPBROADCASTD %EDI,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VPADDD %YMM3,%YMM11,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPADDD %YMM3,%YMM0,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| ADD %R14,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VPBROADCASTD 0x8568(%RIP),%YMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VPSUBD %YMM6,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPXOR %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 | vect (50.0%) |
| VMOVAPS %YMM5,%YMM9{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (50.0%) |
| VCVTPS2PD %YMM9,%ZMM4 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 | 3 | 1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM3,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| LEA (%RDI,%R14,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPSUBD %YMM6,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPXOR %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 | vect (50.0%) |
| VMOVAPS %YMM3,%YMM8{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (50.0%) |
| VCVTPS2PD %YMM8,%ZMM1 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM3,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM1,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM3,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM3,%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| VADDSD %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RDX,%RSI,1),%EDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV 0x108(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM1,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP %R10,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 405a20 <main+0x2770> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VPBROADCASTD %ESI,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405a60 <main+0x27b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VMOVDQU 0x1c0(%RSP),%YMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x8754(%RIP),%YMM6 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| MOV 0x78(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM3,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM3,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM3,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R9,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| CMP %R9,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV 0x130(%RSP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| JNE 405a66 <main+0x27b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
