| Loop Id: 18 | Module: attention-icx-skl512 | Source: attention_v2.cpp:26-317 [...] | Coverage: 0.04% |
|---|
| Loop Id: 18 | Module: attention-icx-skl512 | Source: attention_v2.cpp:26-317 [...] | Coverage: 0.04% |
|---|
0x4036a0 TEST %RSI,%RSI |
0x4036a3 JE 403910 |
0x4036a9 MOV %RSI,%R12 |
0x4036ac MOV 0xf8(%RSP),%RDI |
0x4036b4 VZEROUPPER |
0x4036b7 CALL 402100 <_Znwm@plt> |
0x4036bc MOV %RAX,%RBX |
0x4036bf MOVL $0,(%RAX) |
0x4036c5 CMP $0x1,%R12 |
0x4036c9 JE 4036e1 |
0x4036cb MOV %RBX,%RDI |
0x4036ce ADD $0x4,%RDI |
0x4036d2 XOR %ESI,%ESI |
0x4036d4 MOV 0xf0(%RSP),%RDX |
0x4036dc CALL 406bf0 <_intel_fast_memset> |
0x4036e1 CMPQ $0,0x148(%RSP) |
0x4036ea JE 403921 |
0x4036f0 MOV 0x170(%RSP),%RDI |
0x4036f8 VZEROUPPER |
0x4036fb CALL 402100 <_Znwm@plt> |
0x403700 MOV %RAX,%R13 |
0x403703 MOVL $0,(%RAX) |
0x403709 CMPQ $0x1,0x168(%RSP) |
0x403712 JE 40372a |
0x403714 MOV %R13,%RDI |
0x403717 ADD $0x4,%RDI |
0x40371b XOR %ESI,%ESI |
0x40371d MOV 0x158(%RSP),%RDX |
0x403725 CALL 406bf0 <_intel_fast_memset> |
0x40372a MOV 0x170(%RSP),%RDI |
0x403732 CALL 402100 <_Znwm@plt> |
0x403737 MOV %RAX,%RCX |
0x40373a MOV %RAX,0xd8(%RSP) |
0x403742 MOVL $0,(%RAX) |
0x403748 CMPQ $0x1,0x168(%RSP) |
0x403751 JE 40376e |
0x403753 MOV 0xd8(%RSP),%RDI |
0x40375b ADD $0x4,%RDI |
0x40375f XOR %ESI,%ESI |
0x403761 MOV 0x158(%RSP),%RDX |
0x403769 CALL 406bf0 <_intel_fast_memset> |
0x40376e MOV 0x170(%RSP),%RDI |
0x403776 CALL 402100 <_Znwm@plt> |
0x40377b MOV %RAX,%RCX |
0x40377e MOV %RAX,0xd0(%RSP) |
0x403786 MOVL $0,(%RAX) |
0x40378c CMPQ $0x1,0x168(%RSP) |
0x403795 JE 4037b2 |
0x403797 MOV 0xd0(%RSP),%RDI |
0x40379f ADD $0x4,%RDI |
0x4037a3 XOR %ESI,%ESI |
0x4037a5 MOV 0x158(%RSP),%RDX |
0x4037ad CALL 406bf0 <_intel_fast_memset> |
0x4037b2 CMPQ $0,0xb0(%RSP) |
0x4037bb JE 403938 |
0x4037c1 MOV 0xf8(%RSP),%RDI |
0x4037c9 CALL 402100 <_Znwm@plt> |
0x4037ce MOV %RAX,%RCX |
0x4037d1 MOV %RAX,0x108(%RSP) |
0x4037d9 MOVL $0,(%RAX) |
0x4037df CMPQ $0x1,0xb0(%RSP) |
0x4037e8 JE 403805 |
0x4037ea MOV 0x108(%RSP),%RDI |
0x4037f2 ADD $0x4,%RDI |
0x4037f6 XOR %ESI,%ESI |
0x4037f8 MOV 0xf0(%RSP),%RDX |
0x403800 CALL 406bf0 <_intel_fast_memset> |
0x403805 MOV 0xf8(%RSP),%RDI |
0x40380d CALL 402100 <_Znwm@plt> |
0x403812 MOV %RAX,%RCX |
0x403815 MOV %RAX,0xc8(%RSP) |
0x40381d MOVL $0,(%RAX) |
0x403823 CMPQ $0x1,0xb0(%RSP) |
0x40382c JE 403849 |
0x40382e MOV 0xc8(%RSP),%RDI |
0x403836 ADD $0x4,%RDI |
0x40383a XOR %ESI,%ESI |
0x40383c MOV 0xf0(%RSP),%RDX |
0x403844 CALL 406bf0 <_intel_fast_memset> |
0x403849 MOV 0xf8(%RSP),%RDI |
0x403851 CALL 402100 <_Znwm@plt> |
0x403856 MOV %RAX,%RCX |
0x403859 MOV %RAX,0xc0(%RSP) |
0x403861 MOVL $0,(%RAX) |
0x403867 CMPQ $0x1,0xb0(%RSP) |
0x403870 JE 40388d |
0x403872 MOV 0xc0(%RSP),%RDI |
0x40387a ADD $0x4,%RDI |
0x40387e XOR %ESI,%ESI |
0x403880 MOV 0xf0(%RSP),%RDX |
0x403888 CALL 406bf0 <_intel_fast_memset> |
0x40388d MOV 0xf8(%RSP),%RDI |
0x403895 CALL 402100 <_Znwm@plt> |
0x40389a MOV %RAX,%R12 |
0x40389d MOVL $0,(%RAX) |
0x4038a3 CMPQ $0x1,0xb0(%RSP) |
0x4038ac JE 4038c4 |
0x4038ae MOV %R12,%RDI |
0x4038b1 ADD $0x4,%RDI |
0x4038b5 XOR %ESI,%ESI |
0x4038b7 MOV 0xf0(%RSP),%RDX |
0x4038bf CALL 406bf0 <_intel_fast_memset> |
0x4038c4 MOV 0xf8(%RSP),%RDI |
0x4038cc CALL 402100 <_Znwm@plt> |
0x4038d1 MOVL $0,(%RAX) |
0x4038d7 CMPQ $0x1,0xb0(%RSP) |
0x4038e0 MOV %RAX,0xe8(%RSP) |
0x4038e8 JE 403963 |
0x4038ea MOV %RAX,%RDI |
0x4038ed ADD $0x4,%RDI |
0x4038f1 XOR %ESI,%ESI |
0x4038f3 MOV 0xf0(%RSP),%RDX |
0x4038fb CALL 406bf0 <_intel_fast_memset> |
0x403900 JMP 403963 |
0x403910 XOR %EBX,%EBX |
0x403912 CMPQ $0,0x148(%RSP) |
0x40391b JNE 4036f0 |
0x403921 XOR %EAX,%EAX |
0x403923 MOV %RAX,0xd0(%RSP) |
0x40392b XOR %R13D,%R13D |
0x40392e XOR %EAX,%EAX |
0x403930 MOV %RAX,0xd8(%RSP) |
0x403938 XOR %R12D,%R12D |
0x40393b XOR %EAX,%EAX |
0x40393d MOV %RAX,0xc8(%RSP) |
0x403945 XOR %EAX,%EAX |
0x403947 MOV %RAX,0x108(%RSP) |
0x40394f XOR %EAX,%EAX |
0x403951 MOV %RAX,0xc0(%RSP) |
0x403959 XOR %EAX,%EAX |
0x40395b MOV %RAX,0xe8(%RSP) |
0x403963 MOV 0x178(%RSP),%RAX |
0x40396b SHR $0x3d,%RAX |
0x40396f MOV %R13,0x98(%RSP) |
0x403977 MOV %R12,0x138(%RSP) |
0x40397f JNE 406091 |
0x403985 CMPQ $0,0xe0(%RSP) |
0x40398e JE 403a60 |
0x403994 MOV 0x1b0(%RSP),%RDI |
0x40399c VZEROUPPER |
0x40399f CALL 402100 <_Znwm@plt> |
0x4039a4 MOV %RAX,%RCX |
0x4039a7 MOV %RAX,0xa0(%RSP) |
0x4039af MOVL $0,(%RAX) |
0x4039b5 CMPQ $0x1,0x178(%RSP) |
0x4039be JE 4039db |
0x4039c0 MOV 0xa0(%RSP),%RDI |
0x4039c8 ADD $0x4,%RDI |
0x4039cc XOR %ESI,%ESI |
0x4039ce MOV 0x1a0(%RSP),%RDX |
0x4039d6 CALL 406bf0 <_intel_fast_memset> |
0x4039db MOV 0x1b0(%RSP),%RDI |
0x4039e3 CALL 402100 <_Znwm@plt> |
0x4039e8 MOV %RAX,%RCX |
0x4039eb MOV %RAX,0x78(%RSP) |
0x4039f0 MOVL $0,(%RAX) |
0x4039f6 CMPQ $0x1,0x178(%RSP) |
0x4039ff JE 403a19 |
0x403a01 MOV 0x78(%RSP),%RDI |
0x403a06 ADD $0x4,%RDI |
0x403a0a XOR %ESI,%ESI |
0x403a0c MOV 0x1a0(%RSP),%RDX |
0x403a14 CALL 406bf0 <_intel_fast_memset> |
0x403a19 MOV 0x1b8(%RSP),%RDI |
0x403a21 CALL 402100 <_Znwm@plt> |
0x403a26 MOVL $0,(%RAX) |
0x403a2c CMPL $0x1,0xe0(%RSP) |
0x403a34 MOV %RAX,0x130(%RSP) |
0x403a3c JE 403a7b |
0x403a3e MOV %RAX,%RDI |
0x403a41 ADD $0x4,%RDI |
0x403a45 XOR %ESI,%ESI |
0x403a47 MOV 0x1f8(%RSP),%RDX |
0x403a4f CALL 406bf0 <_intel_fast_memset> |
0x403a54 JMP 403a7b |
0x403a60 XOR %EAX,%EAX |
0x403a62 MOV %RAX,0x78(%RSP) |
0x403a67 XOR %EAX,%EAX |
0x403a69 MOV %RAX,0xa0(%RSP) |
0x403a71 XOR %EAX,%EAX |
0x403a73 MOV %RAX,0x130(%RSP) |
0x403a7b LEA 0x508(%RSP),%RAX |
0x403a83 MOV %RAX,0x4f8(%RSP) |
0x403a8b MOVL $0x746c7561,0x3(%RAX) |
0x403a92 MOVL $0x61666564,(%RAX) |
0x403a98 MOVB $0,0x50f(%RSP) |
0x403aa0 MOVQ $0x7,0x500(%RSP) |
0x403aac LEA 0x1880(%RSP),%RDI |
0x403ab4 LEA 0x4f8(%RSP),%RSI |
0x403abc VZEROUPPER |
0x403abf CALL 4021c0 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> |
0x403ac4 MOV 0x4f8(%RSP),%RDI |
0x403acc LEA 0x508(%RSP),%RAX |
0x403ad4 CMP %RAX,%RDI |
0x403ad7 JE 403ade |
0x403ad9 CALL 4020e0 <_ZdlPv@plt> |
0x403ade LEA 0x1880(%RSP),%RDI |
0x403ae6 CALL 402170 <_ZNSt13random_device9_M_getvalEv@plt> |
0x403aeb MOV %EAX,%EAX |
0x403aed MOV %RAX,0x4f8(%RSP) |
0x403af5 XOR %ECX,%ECX |
0x403af7 MOV %RAX,%RDX |
0x403afa NOPW (%RAX,%RAX,1) |
(16) 0x403b00 MOV %RDX,%RSI |
(16) 0x403b03 SHR $0x1e,%RSI |
(16) 0x403b07 XOR %RDX,%RSI |
(16) 0x403b0a IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403b11 ADD %RCX,%RDX |
(16) 0x403b14 INC %RDX |
(16) 0x403b17 MOV %EDX,%ESI |
(16) 0x403b19 MOV %RSI,0x500(%RSP,%RCX,8) |
(16) 0x403b21 MOV %EDX,%ESI |
(16) 0x403b23 SHR $0x1e,%ESI |
(16) 0x403b26 XOR %RDX,%RSI |
(16) 0x403b29 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403b30 ADD %RCX,%RDX |
(16) 0x403b33 ADD $0x2,%RDX |
(16) 0x403b37 MOV %EDX,%ESI |
(16) 0x403b39 MOV %RSI,0x508(%RSP,%RCX,8) |
(16) 0x403b41 MOV %EDX,%ESI |
(16) 0x403b43 SHR $0x1e,%ESI |
(16) 0x403b46 XOR %RDX,%RSI |
(16) 0x403b49 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403b50 ADD %RCX,%RDX |
(16) 0x403b53 ADD $0x3,%RDX |
(16) 0x403b57 MOV %EDX,%ESI |
(16) 0x403b59 MOV %RSI,0x510(%RSP,%RCX,8) |
(16) 0x403b61 MOV %EDX,%ESI |
(16) 0x403b63 SHR $0x1e,%ESI |
(16) 0x403b66 XOR %RDX,%RSI |
(16) 0x403b69 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403b70 ADD %RCX,%RDX |
(16) 0x403b73 ADD $0x4,%RDX |
(16) 0x403b77 MOV %EDX,%ESI |
(16) 0x403b79 MOV %RSI,0x518(%RSP,%RCX,8) |
(16) 0x403b81 MOV %EDX,%ESI |
(16) 0x403b83 SHR $0x1e,%ESI |
(16) 0x403b86 XOR %RDX,%RSI |
(16) 0x403b89 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403b90 ADD %RCX,%RDX |
(16) 0x403b93 ADD $0x5,%RDX |
(16) 0x403b97 MOV %EDX,%ESI |
(16) 0x403b99 MOV %RSI,0x520(%RSP,%RCX,8) |
(16) 0x403ba1 MOV %EDX,%ESI |
(16) 0x403ba3 SHR $0x1e,%ESI |
(16) 0x403ba6 XOR %RDX,%RSI |
(16) 0x403ba9 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403bb0 ADD %RCX,%RDX |
(16) 0x403bb3 ADD $0x6,%RDX |
(16) 0x403bb7 MOV %EDX,%ESI |
(16) 0x403bb9 MOV %RSI,0x528(%RSP,%RCX,8) |
(16) 0x403bc1 MOV %EDX,%ESI |
(16) 0x403bc3 SHR $0x1e,%ESI |
(16) 0x403bc6 XOR %RDX,%RSI |
(16) 0x403bc9 IMUL $0x6c078965,%RSI,%RDX |
(16) 0x403bd0 ADD %RCX,%RDX |
(16) 0x403bd3 ADD $0x7,%RDX |
(16) 0x403bd7 MOV %EDX,%ESI |
(16) 0x403bd9 MOV %RSI,0x530(%RSP,%RCX,8) |
(16) 0x403be1 MOV %EDX,%ESI |
(16) 0x403be3 SHR $0x1e,%ESI |
(16) 0x403be6 XOR %RDX,%RSI |
(16) 0x403be9 IMUL $0x6c078965,%ESI,%EDX |
(16) 0x403bef ADD %ECX,%EDX |
(16) 0x403bf1 ADD $0x8,%EDX |
(16) 0x403bf4 MOV %RDX,0x538(%RSP,%RCX,8) |
(16) 0x403bfc ADD $0x8,%RCX |
(16) 0x403c00 CMP $0x268,%RCX |
(16) 0x403c07 JNE 403b00 |
0x403c0d SHR $0x1e,%EDX |
0x403c10 IMUL $0x6c078965,%RSI,%RSI |
0x403c17 ADD %RCX,%RSI |
0x403c1a XOR %RDX,%RSI |
0x403c1d IMUL $0x6c078965,%RSI,%RCX |
0x403c24 ADD $0x269,%RCX |
0x403c2b MOV %ECX,%EDX |
0x403c2d SHR $0x1e,%EDX |
0x403c30 XOR %RCX,%RDX |
0x403c33 IMUL $0x6c078965,%RDX,%RDX |
0x403c3a ADD $0x26a,%RDX |
0x403c41 MOV %EDX,%ESI |
0x403c43 SHR $0x1e,%ESI |
0x403c46 XOR %RDX,%RSI |
0x403c49 IMUL $0x6c078965,%RSI,%RSI |
0x403c50 ADD $0x26b,%RSI |
0x403c57 MOV %ESI,%EDI |
0x403c59 SHR $0x1e,%EDI |
0x403c5c XOR %RSI,%RDI |
0x403c5f IMUL $0x6c078965,%RDI,%RDI |
0x403c66 ADD $0x26c,%RDI |
0x403c6d MOV %EDI,%R8D |
0x403c70 SHR $0x1e,%R8D |
0x403c74 XOR %RDI,%R8 |
0x403c77 IMUL $0x6c078965,%R8,%R8 |
0x403c7e ADD $0x26d,%R8 |
0x403c85 MOV %R8D,%R9D |
0x403c88 SHR $0x1e,%R9D |
0x403c8c XOR %R8,%R9 |
0x403c8f IMUL $0x6c078965,%R9,%R9 |
0x403c96 ADD $0x26e,%R9 |
0x403c9d MOV %R9D,%R10D |
0x403ca0 SHR $0x1e,%R10D |
0x403ca4 XOR %R9D,%R10D |
0x403ca7 IMUL $0x6c078965,%R10D,%R10D |
0x403cae ADD $0x26f,%R10D |
0x403cb5 MOV %ECX,%ECX |
0x403cb7 MOV %RCX,0x1840(%RSP) |
0x403cbf MOV %EDX,%ECX |
0x403cc1 MOV %RCX,0x1848(%RSP) |
0x403cc9 MOV %ESI,%ECX |
0x403ccb MOV %RCX,0x1850(%RSP) |
0x403cd3 MOV %EDI,%ECX |
0x403cd5 MOV %RCX,0x1858(%RSP) |
0x403cdd MOV %R8D,%ECX |
0x403ce0 MOV %RCX,0x1860(%RSP) |
0x403ce8 MOV %R9D,%ECX |
0x403ceb MOV %RCX,0x1868(%RSP) |
0x403cf3 MOV %R10,0x1870(%RSP) |
0x403cfb MOVQ $0x270,0x1878(%RSP) |
0x403d07 CMPQ $0,0xb0(%RSP) |
0x403d10 JE 403fd0 |
0x403d16 MOV $0x270,%EDX |
0x403d1b XOR %ECX,%ECX |
0x403d1d MOV 0x1a8(%RSP),%R8 |
0x403d25 MOV $-0x80000000,%R9 |
0x403d2c VPBROADCASTQ 0xa5bb(%RIP),%YMM3 |
0x403d35 VPBROADCASTQ 0xa5ba(%RIP),%YMM4 |
0x403d3e VPBROADCASTQ 0xa5b9(%RIP),%YMM5 |
0x403d47 VPBROADCASTQ 0xa5b8(%RIP),%YMM6 |
0x403d50 VPBROADCASTQ 0xa597(%RIP),%XMM7 |
0x403d59 VPBROADCASTQ 0xa596(%RIP),%XMM8 |
0x403d62 VPBROADCASTQ 0xa595(%RIP),%XMM9 |
0x403d6b VPBROADCASTQ 0xa594(%RIP),%XMM10 |
0x403d74 VMOVSS 0xa294(%RIP),%XMM11 |
0x403d7c VMOVSS 0xa288(%RIP),%XMM12 |
0x403d84 JMP 403de1 |
(51) 0x403d90 MOV 0x4f8(%RSP,%RDX,8),%RSI |
(51) 0x403d98 INC %RDX |
(51) 0x403d9b MOV %RSI,%RDI |
(51) 0x403d9e SHR $0xb,%RDI |
(51) 0x403da2 MOV %EDI,%EDI |
(51) 0x403da4 XOR %RSI,%RDI |
(51) 0x403da7 MOV %EDI,%ESI |
(51) 0x403da9 SAL $0x7,%ESI |
(51) 0x403dac AND $-0x62d3a980,%ESI |
(51) 0x403db2 XOR %RDI,%RSI |
(51) 0x403db5 MOV %ESI,%EDI |
(51) 0x403db7 SAL $0xf,%EDI |
(51) 0x403dba AND $-0x103a0000,%EDI |
(51) 0x403dc0 XOR %RSI,%RDI |
(51) 0x403dc3 MOV %RDI,%RSI |
(51) 0x403dc6 SHR $0x12,%RSI |
(51) 0x403dca XOR %EDI,%ESI |
(51) 0x403dcc VCVTUSI2SS %ESI,%XMM13,%XMM0 |
(51) 0x403dd2 VMULSS %XMM0,%XMM11,%XMM0 |
(51) 0x403dd6 VUCOMISS %XMM12,%XMM0 |
(51) 0x403ddb JB 403fa1 |
(51) 0x403de1 CMP $0x270,%RDX |
(51) 0x403de8 JB 403d90 |
(51) 0x403dea XOR %EDX,%EDX |
(51) 0x403dec NOPL (%RAX) |
(52) 0x403df0 VMOVDQU 0x500(%RSP,%RDX,1),%YMM0 |
(52) 0x403df9 VPSRLQ $0x1,%YMM0,%YMM1 |
(52) 0x403dfe VPAND %YMM3,%YMM1,%YMM1 |
(52) 0x403e02 VPBROADCASTQ %RAX,%YMM2 |
(52) 0x403e08 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(52) 0x403e0e VPSRLQ $0x1,%YMM2,%YMM2 |
(52) 0x403e13 VPERMQ $-0x6d,%YMM2,%YMM2 |
(52) 0x403e19 VPAND %YMM4,%YMM2,%YMM2 |
(52) 0x403e1d VPTERNLOGQ $0x56,0x1160(%RSP,%RDX,1),%YMM1,%YMM2 |
(52) 0x403e29 VPTESTMQ %YMM5,%YMM0,%K1 |
(52) 0x403e2f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(52) 0x403e35 VMOVDQU %YMM2,0x4f8(%RSP,%RDX,1) |
(52) 0x403e3e MOV 0x518(%RSP,%RDX,1),%RAX |
(52) 0x403e46 ADD $0x20,%RDX |
(52) 0x403e4a CMP $0x700,%RDX |
(52) 0x403e51 JNE 403df0 |
(51) 0x403e53 MOV 0xc08(%RSP),%RDX |
(51) 0x403e5b VMOVDQU 0xc00(%RSP),%XMM1 |
(51) 0x403e64 VPSRLQ $0x1,%XMM1,%XMM2 |
(51) 0x403e69 VPAND %XMM7,%XMM2,%XMM2 |
(51) 0x403e6d VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(51) 0x403e73 VPALIGNR $0x8,%XMM0,%XMM1,%XMM0 |
(51) 0x403e79 VPSRLQ $0x1,%XMM0,%XMM0 |
(51) 0x403e7e VPAND %XMM0,%XMM8,%XMM0 |
(51) 0x403e82 VPTERNLOGQ $0x56,0x1860(%RSP),%XMM2,%XMM0 |
(51) 0x403e8e VPTESTMQ %XMM9,%XMM1,%K1 |
(51) 0x403e94 VPXORQ %XMM10,%XMM0,%XMM0{%K1} |
(51) 0x403e9a VMOVDQU %XMM0,0xbf8(%RSP) |
(51) 0x403ea3 MOV 0xc10(%RSP),%RAX |
(51) 0x403eab MOV %EAX,%ESI |
(51) 0x403ead SHR $0x1,%ESI |
(51) 0x403eaf AND $0x3fffffff,%ESI |
(51) 0x403eb5 SHR $0x1,%RDX |
(51) 0x403eb8 AND $-0x40000000,%RDX |
(51) 0x403ebf OR %RSI,%RDX |
(51) 0x403ec2 XOR 0x1870(%RSP),%RDX |
(51) 0x403eca MOV %EAX,%ESI |
(51) 0x403ecc AND $0x1,%ESI |
(51) 0x403ecf NEG %ESI |
(51) 0x403ed1 AND $-0x66f74f21,%ESI |
(51) 0x403ed7 XOR %RDX,%RSI |
(51) 0x403eda MOV %RSI,0xc08(%RSP) |
(51) 0x403ee2 XOR %EDX,%EDX |
(51) 0x403ee4 NOPW %CS:(%RAX,%RAX,1) |
(53) 0x403ef0 VMOVDQU 0xc18(%RSP,%RDX,1),%YMM0 |
(53) 0x403ef9 VPSRLQ $0x1,%YMM0,%YMM1 |
(53) 0x403efe VPAND %YMM3,%YMM1,%YMM1 |
(53) 0x403f02 VPBROADCASTQ %RAX,%YMM2 |
(53) 0x403f08 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(53) 0x403f0e VPSRLQ $0x1,%YMM2,%YMM2 |
(53) 0x403f13 VPERMQ $-0x6d,%YMM2,%YMM2 |
(53) 0x403f19 VPAND %YMM4,%YMM2,%YMM2 |
(53) 0x403f1d VPTERNLOGQ $0x56,0x4f8(%RSP,%RDX,1),%YMM1,%YMM2 |
(53) 0x403f29 VPTESTMQ %YMM5,%YMM0,%K1 |
(53) 0x403f2f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(53) 0x403f35 VMOVDQU %YMM2,0xc10(%RSP,%RDX,1) |
(53) 0x403f3e MOV 0xc30(%RSP,%RDX,1),%RAX |
(53) 0x403f46 ADD $0x20,%RDX |
(53) 0x403f4a CMP $0xc60,%RDX |
(53) 0x403f51 JNE 403ef0 |
(51) 0x403f53 MOV 0x1870(%RSP),%RDX |
(51) 0x403f5b AND %R9,%RDX |
(51) 0x403f5e MOV 0x4f8(%RSP),%RAX |
(51) 0x403f66 MOV %EAX,%ESI |
(51) 0x403f68 AND $0x7ffffffe,%ESI |
(51) 0x403f6e OR %RDX,%RSI |
(51) 0x403f71 SHR $0x1,%RSI |
(51) 0x403f74 XOR 0x1158(%RSP),%RSI |
(51) 0x403f7c MOV %EAX,%EDX |
(51) 0x403f7e AND $0x1,%EDX |
(51) 0x403f81 NEG %EDX |
(51) 0x403f83 AND $-0x66f74f21,%EDX |
(51) 0x403f89 XOR %RSI,%RDX |
(51) 0x403f8c MOV %RDX,0x1870(%RSP) |
(51) 0x403f94 MOV $0x1,%EDX |
(51) 0x403f99 MOV %RAX,%RSI |
(51) 0x403f9c JMP 403d9b |
(51) 0x403fa1 VMOVSS %XMM0,(%RBX,%RCX,4) |
(51) 0x403fa6 INC %RCX |
(51) 0x403fa9 CMP 0xb0(%RSP),%RCX |
(51) 0x403fb1 JNE 403de1 |
0x403fb7 MOV %RDX,0x1878(%RSP) |
0x403fbf CMPQ $0,0x148(%RSP) |
0x403fc8 JNE 403ff3 |
0x403fca JMP 4047b8 |
0x403fd0 MOV $0x270,%EDX |
0x403fd5 MOV 0x1a8(%RSP),%R8 |
0x403fdd MOV $-0x80000000,%R9 |
0x403fe4 CMPQ $0,0x148(%RSP) |
0x403fed JE 4047b8 |
0x403ff3 XOR %ECX,%ECX |
0x403ff5 VPBROADCASTQ 0xa2f2(%RIP),%XMM7 |
0x403ffe VPBROADCASTQ 0xa2f1(%RIP),%XMM8 |
0x404007 VPBROADCASTQ 0xa2f0(%RIP),%XMM9 |
0x404010 VPBROADCASTQ 0xa2ef(%RIP),%XMM10 |
0x404019 VMOVSS 0x9fef(%RIP),%XMM11 |
0x404021 VMOVSS 0x9fe3(%RIP),%XMM12 |
0x404029 VPBROADCASTQ 0xa2be(%RIP),%XMM13 |
0x404032 VPBROADCASTQ 0xa2bd(%RIP),%XMM14 |
0x40403b VPBROADCASTQ 0xa2bc(%RIP),%XMM15 |
0x404044 VPBROADCASTQ 0xa2ba(%RIP),%XMM16 |
0x40404e VMOVSS 0x9fb8(%RIP),%XMM17 |
0x404058 VMOVSS 0x9faa(%RIP),%XMM18 |
0x404062 VPBROADCASTQ 0xa284(%RIP),%XMM19 |
0x40406c VPBROADCASTQ 0xa282(%RIP),%XMM20 |
0x404076 VPBROADCASTQ 0xa280(%RIP),%XMM21 |
0x404080 VPBROADCASTQ 0xa27e(%RIP),%XMM22 |
0x40408a VMOVSS 0x9f7c(%RIP),%XMM23 |
0x404094 VMOVSS 0x9f6e(%RIP),%XMM24 |
0x40409e JMP 4040b9 |
(41) 0x4040a0 MOV 0xd0(%RSP),%RSI |
(41) 0x4040a8 VMOVSS %XMM0,(%RSI,%RCX,4) |
(41) 0x4040ad INC %RCX |
(41) 0x4040b0 CMP %R8,%RCX |
(41) 0x4040b3 JE 4047b0 |
(41) 0x4040b9 VPBROADCASTQ 0xa22e(%RIP),%YMM3 |
(41) 0x4040c2 VPBROADCASTQ 0xa22d(%RIP),%YMM4 |
(41) 0x4040cb VPBROADCASTQ 0xa22c(%RIP),%YMM5 |
(41) 0x4040d4 VPBROADCASTQ 0xa22b(%RIP),%YMM6 |
(41) 0x4040dd JMP 404131 |
(48) 0x4040e0 MOV 0x4f8(%RSP,%RDX,8),%RSI |
(48) 0x4040e8 INC %RDX |
(48) 0x4040eb MOV %RSI,%RDI |
(48) 0x4040ee SHR $0xb,%RDI |
(48) 0x4040f2 MOV %EDI,%EDI |
(48) 0x4040f4 XOR %RSI,%RDI |
(48) 0x4040f7 MOV %EDI,%ESI |
(48) 0x4040f9 SAL $0x7,%ESI |
(48) 0x4040fc AND $-0x62d3a980,%ESI |
(48) 0x404102 XOR %RDI,%RSI |
(48) 0x404105 MOV %ESI,%EDI |
(48) 0x404107 SAL $0xf,%EDI |
(48) 0x40410a AND $-0x103a0000,%EDI |
(48) 0x404110 XOR %RSI,%RDI |
(48) 0x404113 MOV %RDI,%RSI |
(48) 0x404116 SHR $0x12,%RSI |
(48) 0x40411a XOR %EDI,%ESI |
(48) 0x40411c VCVTUSI2SS %ESI,%XMM25,%XMM0 |
(48) 0x404122 VMULSS %XMM0,%XMM11,%XMM0 |
(48) 0x404126 VUCOMISS %XMM12,%XMM0 |
(48) 0x40412b JB 404300 |
(48) 0x404131 CMP $0x270,%RDX |
(48) 0x404138 JB 4040e0 |
(48) 0x40413a XOR %EDX,%EDX |
(48) 0x40413c NOPL (%RAX) |
(49) 0x404140 VMOVDQU 0x500(%RSP,%RDX,1),%YMM0 |
(49) 0x404149 VPSRLQ $0x1,%YMM0,%YMM1 |
(49) 0x40414e VPAND %YMM3,%YMM1,%YMM1 |
(49) 0x404152 VPBROADCASTQ %RAX,%YMM2 |
(49) 0x404158 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(49) 0x40415e VPSRLQ $0x1,%YMM2,%YMM2 |
(49) 0x404163 VPERMQ $-0x6d,%YMM2,%YMM2 |
(49) 0x404169 VPAND %YMM4,%YMM2,%YMM2 |
(49) 0x40416d VPTERNLOGQ $0x56,0x1160(%RSP,%RDX,1),%YMM1,%YMM2 |
(49) 0x404179 VPTESTMQ %YMM5,%YMM0,%K1 |
(49) 0x40417f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(49) 0x404185 VMOVDQU %YMM2,0x4f8(%RSP,%RDX,1) |
(49) 0x40418e MOV 0x518(%RSP,%RDX,1),%RAX |
(49) 0x404196 ADD $0x20,%RDX |
(49) 0x40419a CMP $0x700,%RDX |
(49) 0x4041a1 JNE 404140 |
(48) 0x4041a3 MOV 0xc08(%RSP),%RDX |
(48) 0x4041ab VMOVDQU 0xc00(%RSP),%XMM1 |
(48) 0x4041b4 VPSRLQ $0x1,%XMM1,%XMM2 |
(48) 0x4041b9 VPAND %XMM7,%XMM2,%XMM2 |
(48) 0x4041bd VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(48) 0x4041c3 VPALIGNR $0x8,%XMM0,%XMM1,%XMM0 |
(48) 0x4041c9 VPSRLQ $0x1,%XMM0,%XMM0 |
(48) 0x4041ce VPAND %XMM0,%XMM8,%XMM0 |
(48) 0x4041d2 VPTERNLOGQ $0x56,0x1860(%RSP),%XMM2,%XMM0 |
(48) 0x4041de VPTESTMQ %XMM9,%XMM1,%K1 |
(48) 0x4041e4 VPXORQ %XMM10,%XMM0,%XMM0{%K1} |
(48) 0x4041ea VMOVDQU %XMM0,0xbf8(%RSP) |
(48) 0x4041f3 MOV 0xc10(%RSP),%RAX |
(48) 0x4041fb MOV %EAX,%ESI |
(48) 0x4041fd SHR $0x1,%ESI |
(48) 0x4041ff AND $0x3fffffff,%ESI |
(48) 0x404205 SHR $0x1,%RDX |
(48) 0x404208 AND $-0x40000000,%RDX |
(48) 0x40420f OR %RSI,%RDX |
(48) 0x404212 XOR 0x1870(%RSP),%RDX |
(48) 0x40421a MOV %EAX,%ESI |
(48) 0x40421c AND $0x1,%ESI |
(48) 0x40421f NEG %ESI |
(48) 0x404221 AND $-0x66f74f21,%ESI |
(48) 0x404227 XOR %RDX,%RSI |
(48) 0x40422a MOV %RSI,0xc08(%RSP) |
(48) 0x404232 XOR %EDX,%EDX |
(48) 0x404234 NOPW %CS:(%RAX,%RAX,1) |
(50) 0x404240 VMOVDQU 0xc18(%RSP,%RDX,1),%YMM0 |
(50) 0x404249 VPSRLQ $0x1,%YMM0,%YMM1 |
(50) 0x40424e VPAND %YMM3,%YMM1,%YMM1 |
(50) 0x404252 VPBROADCASTQ %RAX,%YMM2 |
(50) 0x404258 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(50) 0x40425e VPSRLQ $0x1,%YMM2,%YMM2 |
(50) 0x404263 VPERMQ $-0x6d,%YMM2,%YMM2 |
(50) 0x404269 VPAND %YMM4,%YMM2,%YMM2 |
(50) 0x40426d VPTERNLOGQ $0x56,0x4f8(%RSP,%RDX,1),%YMM1,%YMM2 |
(50) 0x404279 VPTESTMQ %YMM5,%YMM0,%K1 |
(50) 0x40427f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(50) 0x404285 VMOVDQU %YMM2,0xc10(%RSP,%RDX,1) |
(50) 0x40428e MOV 0xc30(%RSP,%RDX,1),%RAX |
(50) 0x404296 ADD $0x20,%RDX |
(50) 0x40429a CMP $0xc60,%RDX |
(50) 0x4042a1 JNE 404240 |
(48) 0x4042a3 MOV 0x1870(%RSP),%RDX |
(48) 0x4042ab AND %R9,%RDX |
(48) 0x4042ae MOV 0x4f8(%RSP),%RAX |
(48) 0x4042b6 MOV %EAX,%ESI |
(48) 0x4042b8 AND $0x7ffffffe,%ESI |
(48) 0x4042be OR %RDX,%RSI |
(48) 0x4042c1 SHR $0x1,%RSI |
(48) 0x4042c4 XOR 0x1158(%RSP),%RSI |
(48) 0x4042cc MOV %EAX,%EDX |
(48) 0x4042ce AND $0x1,%EDX |
(48) 0x4042d1 NEG %EDX |
(48) 0x4042d3 AND $-0x66f74f21,%EDX |
(48) 0x4042d9 XOR %RSI,%RDX |
(48) 0x4042dc MOV %RDX,0x1870(%RSP) |
(48) 0x4042e4 MOV $0x1,%EDX |
(48) 0x4042e9 MOV %RAX,%RSI |
(48) 0x4042ec JMP 4040eb |
(41) 0x404300 VMOVSS %XMM0,(%R13,%RCX,4) |
(41) 0x404307 VPBROADCASTQ 0x9fe0(%RIP),%YMM3 |
(41) 0x404310 VPBROADCASTQ 0x9fdf(%RIP),%YMM4 |
(41) 0x404319 VPBROADCASTQ 0x9fde(%RIP),%YMM5 |
(41) 0x404322 VPBROADCASTQ 0x9fdd(%RIP),%YMM6 |
(41) 0x40432b JMP 404384 |
(45) 0x404330 MOV 0x4f8(%RSP,%RDX,8),%RSI |
(45) 0x404338 INC %RDX |
(45) 0x40433b MOV %RSI,%RDI |
(45) 0x40433e SHR $0xb,%RDI |
(45) 0x404342 MOV %EDI,%EDI |
(45) 0x404344 XOR %RSI,%RDI |
(45) 0x404347 MOV %EDI,%ESI |
(45) 0x404349 SAL $0x7,%ESI |
(45) 0x40434c AND $-0x62d3a980,%ESI |
(45) 0x404352 XOR %RDI,%RSI |
(45) 0x404355 MOV %ESI,%EDI |
(45) 0x404357 SAL $0xf,%EDI |
(45) 0x40435a AND $-0x103a0000,%EDI |
(45) 0x404360 XOR %RSI,%RDI |
(45) 0x404363 MOV %RDI,%RSI |
(45) 0x404366 SHR $0x12,%RSI |
(45) 0x40436a XOR %EDI,%ESI |
(45) 0x40436c VCVTUSI2SS %ESI,%XMM25,%XMM0 |
(45) 0x404372 VMULSS %XMM17,%XMM0,%XMM0 |
(45) 0x404378 VUCOMISS %XMM18,%XMM0 |
(45) 0x40437e JB 404550 |
(45) 0x404384 CMP $0x270,%RDX |
(45) 0x40438b JB 404330 |
(45) 0x40438d XOR %EDX,%EDX |
(45) 0x40438f NOP |
(46) 0x404390 VMOVDQU 0x500(%RSP,%RDX,1),%YMM0 |
(46) 0x404399 VPSRLQ $0x1,%YMM0,%YMM1 |
(46) 0x40439e VPAND %YMM3,%YMM1,%YMM1 |
(46) 0x4043a2 VPBROADCASTQ %RAX,%YMM2 |
(46) 0x4043a8 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(46) 0x4043ae VPSRLQ $0x1,%YMM2,%YMM2 |
(46) 0x4043b3 VPERMQ $-0x6d,%YMM2,%YMM2 |
(46) 0x4043b9 VPAND %YMM4,%YMM2,%YMM2 |
(46) 0x4043bd VPTERNLOGQ $0x56,0x1160(%RSP,%RDX,1),%YMM1,%YMM2 |
(46) 0x4043c9 VPTESTMQ %YMM5,%YMM0,%K1 |
(46) 0x4043cf VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(46) 0x4043d5 VMOVDQU %YMM2,0x4f8(%RSP,%RDX,1) |
(46) 0x4043de MOV 0x518(%RSP,%RDX,1),%RAX |
(46) 0x4043e6 ADD $0x20,%RDX |
(46) 0x4043ea CMP $0x700,%RDX |
(46) 0x4043f1 JNE 404390 |
(45) 0x4043f3 MOV 0xc08(%RSP),%RDX |
(45) 0x4043fb VMOVDQU 0xc00(%RSP),%XMM1 |
(45) 0x404404 VPSRLQ $0x1,%XMM1,%XMM2 |
(45) 0x404409 VPAND %XMM2,%XMM13,%XMM2 |
(45) 0x40440d VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(45) 0x404413 VPALIGNR $0x8,%XMM0,%XMM1,%XMM0 |
(45) 0x404419 VPSRLQ $0x1,%XMM0,%XMM0 |
(45) 0x40441e VPAND %XMM0,%XMM14,%XMM0 |
(45) 0x404422 VPTERNLOGQ $0x56,0x1860(%RSP),%XMM2,%XMM0 |
(45) 0x40442e VPTESTMQ %XMM15,%XMM1,%K1 |
(45) 0x404434 VPXORQ %XMM16,%XMM0,%XMM0{%K1} |
(45) 0x40443a VMOVDQU %XMM0,0xbf8(%RSP) |
(45) 0x404443 MOV 0xc10(%RSP),%RAX |
(45) 0x40444b MOV %EAX,%ESI |
(45) 0x40444d SHR $0x1,%ESI |
(45) 0x40444f AND $0x3fffffff,%ESI |
(45) 0x404455 SHR $0x1,%RDX |
(45) 0x404458 AND $-0x40000000,%RDX |
(45) 0x40445f OR %RSI,%RDX |
(45) 0x404462 XOR 0x1870(%RSP),%RDX |
(45) 0x40446a MOV %EAX,%ESI |
(45) 0x40446c AND $0x1,%ESI |
(45) 0x40446f NEG %ESI |
(45) 0x404471 AND $-0x66f74f21,%ESI |
(45) 0x404477 XOR %RDX,%RSI |
(45) 0x40447a MOV %RSI,0xc08(%RSP) |
(45) 0x404482 XOR %EDX,%EDX |
(45) 0x404484 NOPW %CS:(%RAX,%RAX,1) |
(47) 0x404490 VMOVDQU 0xc18(%RSP,%RDX,1),%YMM0 |
(47) 0x404499 VPSRLQ $0x1,%YMM0,%YMM1 |
(47) 0x40449e VPAND %YMM3,%YMM1,%YMM1 |
(47) 0x4044a2 VPBROADCASTQ %RAX,%YMM2 |
(47) 0x4044a8 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(47) 0x4044ae VPSRLQ $0x1,%YMM2,%YMM2 |
(47) 0x4044b3 VPERMQ $-0x6d,%YMM2,%YMM2 |
(47) 0x4044b9 VPAND %YMM4,%YMM2,%YMM2 |
(47) 0x4044bd VPTERNLOGQ $0x56,0x4f8(%RSP,%RDX,1),%YMM1,%YMM2 |
(47) 0x4044c9 VPTESTMQ %YMM5,%YMM0,%K1 |
(47) 0x4044cf VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(47) 0x4044d5 VMOVDQU %YMM2,0xc10(%RSP,%RDX,1) |
(47) 0x4044de MOV 0xc30(%RSP,%RDX,1),%RAX |
(47) 0x4044e6 ADD $0x20,%RDX |
(47) 0x4044ea CMP $0xc60,%RDX |
(47) 0x4044f1 JNE 404490 |
(45) 0x4044f3 MOV 0x1870(%RSP),%RDX |
(45) 0x4044fb AND %R9,%RDX |
(45) 0x4044fe MOV 0x4f8(%RSP),%RAX |
(45) 0x404506 MOV %EAX,%ESI |
(45) 0x404508 AND $0x7ffffffe,%ESI |
(45) 0x40450e OR %RDX,%RSI |
(45) 0x404511 SHR $0x1,%RSI |
(45) 0x404514 XOR 0x1158(%RSP),%RSI |
(45) 0x40451c MOV %EAX,%EDX |
(45) 0x40451e AND $0x1,%EDX |
(45) 0x404521 NEG %EDX |
(45) 0x404523 AND $-0x66f74f21,%EDX |
(45) 0x404529 XOR %RSI,%RDX |
(45) 0x40452c MOV %RDX,0x1870(%RSP) |
(45) 0x404534 MOV $0x1,%EDX |
(45) 0x404539 MOV %RAX,%RSI |
(45) 0x40453c JMP 40433b |
(41) 0x404550 MOV 0xd8(%RSP),%RSI |
(41) 0x404558 VMOVSS %XMM0,(%RSI,%RCX,4) |
(41) 0x40455d VPBROADCASTQ 0x9d8a(%RIP),%YMM3 |
(41) 0x404566 VPBROADCASTQ 0x9d89(%RIP),%YMM4 |
(41) 0x40456f VPBROADCASTQ 0x9d88(%RIP),%YMM5 |
(41) 0x404578 VPBROADCASTQ 0x9d87(%RIP),%YMM6 |
(41) 0x404581 JMP 4045e4 |
(42) 0x404590 MOV 0x4f8(%RSP,%RDX,8),%RSI |
(42) 0x404598 INC %RDX |
(42) 0x40459b MOV %RSI,%RDI |
(42) 0x40459e SHR $0xb,%RDI |
(42) 0x4045a2 MOV %EDI,%EDI |
(42) 0x4045a4 XOR %RSI,%RDI |
(42) 0x4045a7 MOV %EDI,%ESI |
(42) 0x4045a9 SAL $0x7,%ESI |
(42) 0x4045ac AND $-0x62d3a980,%ESI |
(42) 0x4045b2 XOR %RDI,%RSI |
(42) 0x4045b5 MOV %ESI,%EDI |
(42) 0x4045b7 SAL $0xf,%EDI |
(42) 0x4045ba AND $-0x103a0000,%EDI |
(42) 0x4045c0 XOR %RSI,%RDI |
(42) 0x4045c3 MOV %RDI,%RSI |
(42) 0x4045c6 SHR $0x12,%RSI |
(42) 0x4045ca XOR %EDI,%ESI |
(42) 0x4045cc VCVTUSI2SS %ESI,%XMM25,%XMM0 |
(42) 0x4045d2 VMULSS %XMM23,%XMM0,%XMM0 |
(42) 0x4045d8 VUCOMISS %XMM24,%XMM0 |
(42) 0x4045de JB 4040a0 |
(42) 0x4045e4 CMP $0x270,%RDX |
(42) 0x4045eb JB 404590 |
(42) 0x4045ed XOR %EDX,%EDX |
(42) 0x4045ef NOP |
(43) 0x4045f0 VMOVDQU 0x500(%RSP,%RDX,1),%YMM0 |
(43) 0x4045f9 VPSRLQ $0x1,%YMM0,%YMM1 |
(43) 0x4045fe VPAND %YMM3,%YMM1,%YMM1 |
(43) 0x404602 VPBROADCASTQ %RAX,%YMM2 |
(43) 0x404608 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(43) 0x40460e VPSRLQ $0x1,%YMM2,%YMM2 |
(43) 0x404613 VPERMQ $-0x6d,%YMM2,%YMM2 |
(43) 0x404619 VPAND %YMM4,%YMM2,%YMM2 |
(43) 0x40461d VPTERNLOGQ $0x56,0x1160(%RSP,%RDX,1),%YMM1,%YMM2 |
(43) 0x404629 VPTESTMQ %YMM5,%YMM0,%K1 |
(43) 0x40462f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(43) 0x404635 VMOVDQU %YMM2,0x4f8(%RSP,%RDX,1) |
(43) 0x40463e MOV 0x518(%RSP,%RDX,1),%RAX |
(43) 0x404646 ADD $0x20,%RDX |
(43) 0x40464a CMP $0x700,%RDX |
(43) 0x404651 JNE 4045f0 |
(42) 0x404653 MOV 0xc08(%RSP),%RDX |
(42) 0x40465b VMOVDQU 0xc00(%RSP),%XMM1 |
(42) 0x404664 VPSRLQ $0x1,%XMM1,%XMM2 |
(42) 0x404669 VPANDQ %XMM19,%XMM2,%XMM2 |
(42) 0x40466f VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(42) 0x404675 VPALIGNR $0x8,%XMM0,%XMM1,%XMM0 |
(42) 0x40467b VPSRLQ $0x1,%XMM0,%XMM0 |
(42) 0x404680 VPANDQ %XMM20,%XMM0,%XMM0 |
(42) 0x404686 VPTERNLOGQ $0x56,0x1860(%RSP),%XMM2,%XMM0 |
(42) 0x404692 VPTESTMQ %XMM21,%XMM1,%K1 |
(42) 0x404698 VPXORQ %XMM22,%XMM0,%XMM0{%K1} |
(42) 0x40469e VMOVDQU %XMM0,0xbf8(%RSP) |
(42) 0x4046a7 MOV 0xc10(%RSP),%RAX |
(42) 0x4046af MOV %EAX,%ESI |
(42) 0x4046b1 SHR $0x1,%ESI |
(42) 0x4046b3 AND $0x3fffffff,%ESI |
(42) 0x4046b9 SHR $0x1,%RDX |
(42) 0x4046bc AND $-0x40000000,%RDX |
(42) 0x4046c3 OR %RSI,%RDX |
(42) 0x4046c6 XOR 0x1870(%RSP),%RDX |
(42) 0x4046ce MOV %EAX,%ESI |
(42) 0x4046d0 AND $0x1,%ESI |
(42) 0x4046d3 NEG %ESI |
(42) 0x4046d5 AND $-0x66f74f21,%ESI |
(42) 0x4046db XOR %RDX,%RSI |
(42) 0x4046de MOV %RSI,0xc08(%RSP) |
(42) 0x4046e6 XOR %EDX,%EDX |
(42) 0x4046e8 NOPL (%RAX,%RAX,1) |
(44) 0x4046f0 VMOVDQU 0xc18(%RSP,%RDX,1),%YMM0 |
(44) 0x4046f9 VPSRLQ $0x1,%YMM0,%YMM1 |
(44) 0x4046fe VPAND %YMM3,%YMM1,%YMM1 |
(44) 0x404702 VPBROADCASTQ %RAX,%YMM2 |
(44) 0x404708 VPBLENDD $-0x40,%YMM2,%YMM0,%YMM2 |
(44) 0x40470e VPSRLQ $0x1,%YMM2,%YMM2 |
(44) 0x404713 VPERMQ $-0x6d,%YMM2,%YMM2 |
(44) 0x404719 VPAND %YMM4,%YMM2,%YMM2 |
(44) 0x40471d VPTERNLOGQ $0x56,0x4f8(%RSP,%RDX,1),%YMM1,%YMM2 |
(44) 0x404729 VPTESTMQ %YMM5,%YMM0,%K1 |
(44) 0x40472f VPXORQ %YMM6,%YMM2,%YMM2{%K1} |
(44) 0x404735 VMOVDQU %YMM2,0xc10(%RSP,%RDX,1) |
(44) 0x40473e MOV 0xc30(%RSP,%RDX,1),%RAX |
(44) 0x404746 ADD $0x20,%RDX |
(44) 0x40474a CMP $0xc60,%RDX |
(44) 0x404751 JNE 4046f0 |
(42) 0x404753 MOV 0x1870(%RSP),%RDX |
(42) 0x40475b AND %R9,%RDX |
(42) 0x40475e MOV 0x4f8(%RSP),%RAX |
(42) 0x404766 MOV %EAX,%ESI |
(42) 0x404768 AND $0x7ffffffe,%ESI |
(42) 0x40476e OR %RDX,%RSI |
(42) 0x404771 SHR $0x1,%RSI |
(42) 0x404774 XOR 0x1158(%RSP),%RSI |
(42) 0x40477c MOV %EAX,%EDX |
(42) 0x40477e AND $0x1,%EDX |
(42) 0x404781 NEG %EDX |
(42) 0x404783 AND $-0x66f74f21,%EDX |
(42) 0x404789 XOR %RSI,%RDX |
(42) 0x40478c MOV %RDX,0x1870(%RSP) |
(42) 0x404794 MOV $0x1,%EDX |
(42) 0x404799 MOV %RAX,%RSI |
(42) 0x40479c JMP 40459b |
0x4047b0 MOV %RDX,0x1878(%RSP) |
0x4047b8 VZEROUPPER |
0x4047bb CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x4047c0 MOV %RAX,0x80(%RSP) |
0x4047c8 XOR %EAX,%EAX |
0x4047ca XOR %ECX,%ECX |
0x4047cc MOV 0xb8(%RSP),%RSI |
0x4047d4 VMOVUPS 0x4c0(%RSP),%YMM10 |
0x4047dd VMOVUPS 0x4a0(%RSP),%YMM11 |
0x4047e6 MOV 0x140(%RSP),%R10 |
0x4047ee VPMOVSXBD 0x9ac9(%RIP),%YMM7 |
0x4047f7 VPBROADCASTD 0x9804(%RIP),%YMM8 |
0x404800 VMOVDQU 0x9818(%RIP),%YMM9 |
0x404808 VPMOVSXBQ 0x9aae(%RIP),%ZMM12 |
0x404812 VPMOVSXBD 0x9aa5(%RIP),%YMM13 |
0x40481b JMP 40483d |
(38) 0x404820 LEA 0x1(%RCX),%EDX |
(38) 0x404823 MOV 0xb8(%RSP),%RSI |
(38) 0x40482b ADD %RSI,%RAX |
(38) 0x40482e CMP 0xac(%RSP),%ECX |
(38) 0x404835 MOV %EDX,%ECX |
(38) 0x404837 JE 404a00 |
(38) 0x40483d MOV %ECX,%EDX |
(38) 0x40483f IMUL %ESI,%EDX |
(38) 0x404842 VPBROADCASTD %EDX,%YMM0 |
(38) 0x404848 XOR %ESI,%ESI |
(38) 0x40484a JMP 40492d |
(39) 0x404850 VPXOR %XMM2,%XMM2,%XMM2 |
(39) 0x404854 XOR %EDI,%EDI |
(39) 0x404856 VPBROADCASTQ %RDI,%ZMM3 |
(39) 0x40485c VMOVDQU64 0x340(%RSP),%ZMM4 |
(39) 0x404864 VPSUBQ %ZMM3,%ZMM4,%ZMM4 |
(39) 0x40486a VPCMPGTQ %ZMM12,%ZMM4,%K1 |
(39) 0x404870 VPMOVQD %ZMM3,%YMM3 |
(39) 0x404876 VPADDD %YMM3,%YMM13,%YMM3 |
(39) 0x40487a VPADDD %YMM3,%YMM0,%YMM4 |
(39) 0x40487e LEA (%RBX,%R14,1),%RDI |
(39) 0x404882 VPBROADCASTD 0x9779(%RIP),%YMM6 |
(39) 0x40488b VPSUBD %YMM6,%YMM4,%YMM4 |
(39) 0x40488f VXORPS %XMM5,%XMM5,%XMM5 |
(39) 0x404893 KMOVQ %K1,%K2 |
(39) 0x404898 VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} |
(39) 0x40489f VMOVAPS %YMM5,%YMM11{%K1} |
(39) 0x4048a5 VCVTPS2PD %YMM11,%ZMM4 |
(39) 0x4048ab VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 |
(39) 0x4048b5 VPADDD %YMM3,%YMM1,%YMM1 |
(39) 0x4048b9 LEA (%R13,%R14,1),%RDI |
(39) 0x4048be VPSUBD %YMM6,%YMM1,%YMM1 |
(39) 0x4048c2 VPXOR %XMM3,%XMM3,%XMM3 |
(39) 0x4048c6 KMOVQ %K1,%K2 |
(39) 0x4048cb VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} |
(39) 0x4048d2 VMOVAPS %YMM3,%YMM10{%K1} |
(39) 0x4048d8 VCVTPS2PD %YMM10,%ZMM1 |
(39) 0x4048de VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
(39) 0x4048e4 VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(39) 0x4048eb VADDPD %ZMM3,%ZMM1,%ZMM1 |
(39) 0x4048f1 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(39) 0x4048f7 VADDPD %XMM3,%XMM1,%XMM1 |
(39) 0x4048fb VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
(39) 0x404900 VADDSD %XMM3,%XMM1,%XMM1 |
(39) 0x404904 VADDSD %XMM1,%XMM2,%XMM2 |
(39) 0x404908 VCVTSD2SS %XMM2,%XMM2,%XMM1 |
(39) 0x40490c LEA (%RDX,%RSI,1),%EDI |
(39) 0x40490f MOV 0xc8(%RSP),%R8 |
(39) 0x404917 VMOVSS %XMM1,(%R8,%RDI,4) |
(39) 0x40491d LEA 0x1(%RSI),%RDI |
(39) 0x404921 CMP %R10,%RSI |
(39) 0x404924 MOV %RDI,%RSI |
(39) 0x404927 JE 404820 |
(39) 0x40492d VPBROADCASTD %ESI,%YMM1 |
(39) 0x404933 TEST %R15,%R15 |
(39) 0x404936 JE 404850 |
(39) 0x40493c VPXOR %XMM2,%XMM2,%XMM2 |
(39) 0x404940 XOR %EDI,%EDI |
(39) 0x404942 VMOVDQU 0x1c0(%RSP),%YMM6 |
(39) 0x40494b NOPL (%RAX,%RAX,1) |
(40) 0x404950 LEA (%RAX,%RDI,1),%R8D |
(40) 0x404954 VPBROADCASTD %R8D,%YMM3 |
(40) 0x40495a LEA (%RBX,%R14,1),%R8 |
(40) 0x40495e VPCMPEQB %XMM0,%XMM0,%K1 |
(40) 0x404964 VPXOR %XMM4,%XMM4,%XMM4 |
(40) 0x404968 VPBROADCASTD %EDI,%YMM5 |
(40) 0x40496e VPADDD %YMM3,%YMM9,%YMM3 |
(40) 0x404972 VPADDD %YMM7,%YMM5,%YMM5 |
(40) 0x404976 VPMULLD %YMM5,%YMM6,%YMM5 |
(40) 0x40497b VPADDD %YMM5,%YMM1,%YMM5 |
(40) 0x40497f LEA (%R13,%R14,1),%R9 |
(40) 0x404984 VPSUBD %YMM8,%YMM5,%YMM5 |
(40) 0x404989 VPCMPEQB %XMM0,%XMM0,%K2 |
(40) 0x40498f VGATHERDPS (%R8,%YMM3,4),%YMM4{%K1} |
(40) 0x404996 VXORPS %XMM3,%XMM3,%XMM3 |
(40) 0x40499a VGATHERDPS (%R9,%YMM5,4),%YMM3{%K2} |
(40) 0x4049a1 VCVTPS2PD %YMM4,%ZMM4 |
(40) 0x4049a7 VCVTPS2PD %YMM3,%ZMM3 |
(40) 0x4049ad VFMADD231PD %ZMM3,%ZMM4,%ZMM2 |
(40) 0x4049b3 ADD $0x8,%RDI |
(40) 0x4049b7 CMP %R15,%RDI |
(40) 0x4049ba JB 404950 |
(39) 0x4049bc VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(39) 0x4049c3 VADDPD %ZMM3,%ZMM2,%ZMM2 |
(39) 0x4049c9 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(39) 0x4049cf VADDPD %XMM3,%XMM2,%XMM2 |
(39) 0x4049d3 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(39) 0x4049d8 VADDSD %XMM3,%XMM2,%XMM2 |
(39) 0x4049dc MOV %R15,%RDI |
(39) 0x4049df TESTB $0x1,0x110(%RSP) |
(39) 0x4049e7 JE 404856 |
(39) 0x4049ed JMP 404908 |
0x404a00 VMOVUPS %YMM11,0x4a0(%RSP) |
0x404a09 VMOVUPS %YMM10,0x4c0(%RSP) |
0x404a12 VZEROUPPER |
0x404a15 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404a1a SUB 0x80(%RSP),%RAX |
0x404a22 MOV $0x20c49ba5e353f7cf,%RCX |
0x404a2c IMUL %RCX |
0x404a2f MOV %RDX,%RAX |
0x404a32 SHR $0x3f,%RAX |
0x404a36 SAR $0x7,%RDX |
0x404a3a ADD %RAX,%RDX |
0x404a3d ADD %RDX,0x8(%RSP) |
0x404a42 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404a47 MOV 0xb8(%RSP),%RSI |
0x404a4f MOV 0x140(%RSP),%R11 |
0x404a57 MOV %RAX,0x80(%RSP) |
0x404a5f XOR %EAX,%EAX |
0x404a61 XOR %ECX,%ECX |
0x404a63 VMOVUPS 0x480(%RSP),%YMM11 |
0x404a6c VMOVUPS 0x460(%RSP),%YMM12 |
0x404a75 MOV 0xd8(%RSP),%R10 |
0x404a7d VMOVDQU 0x1c0(%RSP),%YMM7 |
0x404a86 VPMOVSXBD 0x9831(%RIP),%YMM8 |
0x404a8f VPBROADCASTD 0x956c(%RIP),%YMM9 |
0x404a98 VMOVDQU 0x9580(%RIP),%YMM10 |
0x404aa0 VPMOVSXBQ 0x9816(%RIP),%ZMM13 |
0x404aaa VPMOVSXBD 0x980d(%RIP),%YMM14 |
0x404ab3 JMP 404add |
(35) 0x404ac0 LEA 0x1(%RCX),%EDX |
(35) 0x404ac3 MOV 0xb8(%RSP),%RSI |
(35) 0x404acb ADD %RSI,%RAX |
(35) 0x404ace CMP 0xac(%RSP),%ECX |
(35) 0x404ad5 MOV %EDX,%ECX |
(35) 0x404ad7 JE 404ca0 |
(35) 0x404add MOV %ECX,%EDX |
(35) 0x404adf IMUL %ESI,%EDX |
(35) 0x404ae2 VPBROADCASTD %EDX,%YMM0 |
(35) 0x404ae8 XOR %ESI,%ESI |
(35) 0x404aea JMP 404bd4 |
(36) 0x404af0 VXORPD %XMM2,%XMM2,%XMM2 |
(36) 0x404af4 XOR %EDI,%EDI |
(36) 0x404af6 VPBROADCASTQ %RDI,%ZMM3 |
(36) 0x404afc VMOVDQU64 0x340(%RSP),%ZMM4 |
(36) 0x404b04 VPSUBQ %ZMM3,%ZMM4,%ZMM4 |
(36) 0x404b0a VPCMPGTQ %ZMM13,%ZMM4,%K1 |
(36) 0x404b10 VPMOVQD %ZMM3,%YMM3 |
(36) 0x404b16 VPADDD %YMM3,%YMM14,%YMM3 |
(36) 0x404b1a VPADDD %YMM3,%YMM0,%YMM4 |
(36) 0x404b1e LEA (%RBX,%R14,1),%RDI |
(36) 0x404b22 VPBROADCASTD 0x94d9(%RIP),%YMM6 |
(36) 0x404b2b VPSUBD %YMM6,%YMM4,%YMM4 |
(36) 0x404b2f KMOVQ %K1,%K2 |
(36) 0x404b34 VXORPS %XMM5,%XMM5,%XMM5 |
(36) 0x404b38 VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} |
(36) 0x404b3f VMOVAPS %YMM5,%YMM12{%K1} |
(36) 0x404b45 VCVTPS2PD %YMM12,%ZMM4 |
(36) 0x404b4b VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 |
(36) 0x404b55 VPADDD %YMM3,%YMM1,%YMM1 |
(36) 0x404b59 MOV 0xd8(%RSP),%RDI |
(36) 0x404b61 LEA (%RDI,%R14,1),%RDI |
(36) 0x404b65 VPSUBD %YMM6,%YMM1,%YMM1 |
(36) 0x404b69 KMOVQ %K1,%K2 |
(36) 0x404b6e VPXOR %XMM3,%XMM3,%XMM3 |
(36) 0x404b72 VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} |
(36) 0x404b79 VMOVAPS %YMM3,%YMM11{%K1} |
(36) 0x404b7f VCVTPS2PD %YMM11,%ZMM1 |
(36) 0x404b85 VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
(36) 0x404b8b VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(36) 0x404b92 VADDPD %ZMM3,%ZMM1,%ZMM1 |
(36) 0x404b98 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(36) 0x404b9e VADDPD %XMM3,%XMM1,%XMM1 |
(36) 0x404ba2 VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
(36) 0x404ba7 VADDSD %XMM3,%XMM1,%XMM1 |
(36) 0x404bab VADDSD %XMM1,%XMM2,%XMM2 |
(36) 0x404baf VCVTSD2SS %XMM2,%XMM2,%XMM1 |
(36) 0x404bb3 LEA (%RDX,%RSI,1),%EDI |
(36) 0x404bb6 MOV 0xc0(%RSP),%R8 |
(36) 0x404bbe VMOVSS %XMM1,(%R8,%RDI,4) |
(36) 0x404bc4 LEA 0x1(%RSI),%RDI |
(36) 0x404bc8 CMP %R11,%RSI |
(36) 0x404bcb MOV %RDI,%RSI |
(36) 0x404bce JE 404ac0 |
(36) 0x404bd4 VPBROADCASTD %ESI,%YMM1 |
(36) 0x404bda TEST %R15,%R15 |
(36) 0x404bdd JE 404af0 |
(36) 0x404be3 VXORPD %XMM2,%XMM2,%XMM2 |
(36) 0x404be7 XOR %EDI,%EDI |
(36) 0x404be9 NOPL (%RAX) |
(37) 0x404bf0 LEA (%RAX,%RDI,1),%R8D |
(37) 0x404bf4 VPBROADCASTD %R8D,%YMM3 |
(37) 0x404bfa LEA (%RBX,%R14,1),%R8 |
(37) 0x404bfe VXORPD %XMM4,%XMM4,%XMM4 |
(37) 0x404c02 VPCMPEQB %XMM0,%XMM0,%K1 |
(37) 0x404c08 VPBROADCASTD %EDI,%YMM5 |
(37) 0x404c0e VPADDD %YMM3,%YMM10,%YMM3 |
(37) 0x404c12 VPADDD %YMM5,%YMM8,%YMM5 |
(37) 0x404c16 VPMULLD %YMM5,%YMM7,%YMM5 |
(37) 0x404c1b VPADDD %YMM5,%YMM1,%YMM5 |
(37) 0x404c1f LEA (%R10,%R14,1),%R9 |
(37) 0x404c23 VPSUBD %YMM9,%YMM5,%YMM5 |
(37) 0x404c28 VPXOR %XMM6,%XMM6,%XMM6 |
(37) 0x404c2c VGATHERDPS (%R8,%YMM3,4),%YMM4{%K1} |
(37) 0x404c33 VPCMPEQB %XMM0,%XMM0,%K1 |
(37) 0x404c39 VGATHERDPS (%R9,%YMM5,4),%YMM6{%K1} |
(37) 0x404c40 VCVTPS2PD %YMM4,%ZMM3 |
(37) 0x404c46 VCVTPS2PD %YMM6,%ZMM4 |
(37) 0x404c4c VFMADD231PD %ZMM4,%ZMM3,%ZMM2 |
(37) 0x404c52 ADD $0x8,%RDI |
(37) 0x404c56 CMP %R15,%RDI |
(37) 0x404c59 JB 404bf0 |
(36) 0x404c5b VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(36) 0x404c62 VADDPD %ZMM3,%ZMM2,%ZMM2 |
(36) 0x404c68 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(36) 0x404c6e VADDPD %XMM3,%XMM2,%XMM2 |
(36) 0x404c72 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(36) 0x404c77 VADDSD %XMM3,%XMM2,%XMM2 |
(36) 0x404c7b MOV %R15,%RDI |
(36) 0x404c7e TESTB $0x1,0x110(%RSP) |
(36) 0x404c86 JE 404af6 |
(36) 0x404c8c JMP 404baf |
0x404ca0 VMOVUPS %YMM12,0x460(%RSP) |
0x404ca9 VMOVUPS %YMM11,0x480(%RSP) |
0x404cb2 VZEROUPPER |
0x404cb5 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404cba SUB 0x80(%RSP),%RAX |
0x404cc2 MOV $0x20c49ba5e353f7cf,%RCX |
0x404ccc IMUL %RCX |
0x404ccf MOV %RDX,%RAX |
0x404cd2 SHR $0x3f,%RAX |
0x404cd6 SAR $0x7,%RDX |
0x404cda ADD %RAX,%RDX |
0x404cdd ADD %RDX,0x10(%RSP) |
0x404ce2 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404ce7 MOV 0xb8(%RSP),%RSI |
0x404cef MOV 0x140(%RSP),%R11 |
0x404cf7 MOV %RAX,0x80(%RSP) |
0x404cff XOR %EAX,%EAX |
0x404d01 XOR %ECX,%ECX |
0x404d03 VMOVUPS 0x440(%RSP),%YMM11 |
0x404d0c VMOVUPS 0x420(%RSP),%YMM12 |
0x404d15 MOV 0xd0(%RSP),%R10 |
0x404d1d VMOVDQU 0x1c0(%RSP),%YMM7 |
0x404d26 VPMOVSXBD 0x9591(%RIP),%YMM8 |
0x404d2f VPBROADCASTD 0x92cc(%RIP),%YMM9 |
0x404d38 VMOVDQU 0x92e0(%RIP),%YMM10 |
0x404d40 VPMOVSXBQ 0x9576(%RIP),%ZMM13 |
0x404d4a VPMOVSXBD 0x956d(%RIP),%YMM14 |
0x404d53 JMP 404d7d |
(32) 0x404d60 LEA 0x1(%RCX),%EDX |
(32) 0x404d63 MOV 0xb8(%RSP),%RSI |
(32) 0x404d6b ADD %RSI,%RAX |
(32) 0x404d6e CMP 0xac(%RSP),%ECX |
(32) 0x404d75 MOV %EDX,%ECX |
(32) 0x404d77 JE 404f40 |
(32) 0x404d7d MOV %ECX,%EDX |
(32) 0x404d7f IMUL %ESI,%EDX |
(32) 0x404d82 VPBROADCASTD %EDX,%YMM0 |
(32) 0x404d88 XOR %ESI,%ESI |
(32) 0x404d8a JMP 404e74 |
(33) 0x404d90 VXORPD %XMM2,%XMM2,%XMM2 |
(33) 0x404d94 XOR %EDI,%EDI |
(33) 0x404d96 VPBROADCASTQ %RDI,%ZMM3 |
(33) 0x404d9c VMOVDQU64 0x340(%RSP),%ZMM4 |
(33) 0x404da4 VPSUBQ %ZMM3,%ZMM4,%ZMM4 |
(33) 0x404daa VPCMPGTQ %ZMM13,%ZMM4,%K1 |
(33) 0x404db0 VPMOVQD %ZMM3,%YMM3 |
(33) 0x404db6 VPADDD %YMM3,%YMM14,%YMM3 |
(33) 0x404dba VPADDD %YMM3,%YMM0,%YMM4 |
(33) 0x404dbe LEA (%RBX,%R14,1),%RDI |
(33) 0x404dc2 VPBROADCASTD 0x9239(%RIP),%YMM6 |
(33) 0x404dcb VPSUBD %YMM6,%YMM4,%YMM4 |
(33) 0x404dcf VXORPS %XMM5,%XMM5,%XMM5 |
(33) 0x404dd3 KMOVQ %K1,%K2 |
(33) 0x404dd8 VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} |
(33) 0x404ddf VMOVAPS %YMM5,%YMM12{%K1} |
(33) 0x404de5 VCVTPS2PD %YMM12,%ZMM4 |
(33) 0x404deb VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 |
(33) 0x404df5 VPADDD %YMM3,%YMM1,%YMM1 |
(33) 0x404df9 MOV 0xd0(%RSP),%RDI |
(33) 0x404e01 LEA (%RDI,%R14,1),%RDI |
(33) 0x404e05 VPSUBD %YMM6,%YMM1,%YMM1 |
(33) 0x404e09 VPXOR %XMM3,%XMM3,%XMM3 |
(33) 0x404e0d KMOVQ %K1,%K2 |
(33) 0x404e12 VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} |
(33) 0x404e19 VMOVAPS %YMM3,%YMM11{%K1} |
(33) 0x404e1f VCVTPS2PD %YMM11,%ZMM1 |
(33) 0x404e25 VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
(33) 0x404e2b VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(33) 0x404e32 VADDPD %ZMM3,%ZMM1,%ZMM1 |
(33) 0x404e38 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(33) 0x404e3e VADDPD %XMM3,%XMM1,%XMM1 |
(33) 0x404e42 VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
(33) 0x404e47 VADDSD %XMM3,%XMM1,%XMM1 |
(33) 0x404e4b VADDSD %XMM1,%XMM2,%XMM2 |
(33) 0x404e4f VCVTSD2SS %XMM2,%XMM2,%XMM1 |
(33) 0x404e53 LEA (%RDX,%RSI,1),%EDI |
(33) 0x404e56 MOV 0xe8(%RSP),%R8 |
(33) 0x404e5e VMOVSS %XMM1,(%R8,%RDI,4) |
(33) 0x404e64 LEA 0x1(%RSI),%RDI |
(33) 0x404e68 CMP %R11,%RSI |
(33) 0x404e6b MOV %RDI,%RSI |
(33) 0x404e6e JE 404d60 |
(33) 0x404e74 VPBROADCASTD %ESI,%YMM1 |
(33) 0x404e7a TEST %R15,%R15 |
(33) 0x404e7d JE 404d90 |
(33) 0x404e83 VXORPD %XMM2,%XMM2,%XMM2 |
(33) 0x404e87 XOR %EDI,%EDI |
(33) 0x404e89 NOPL (%RAX) |
(34) 0x404e90 LEA (%RAX,%RDI,1),%R8D |
(34) 0x404e94 VPBROADCASTD %R8D,%YMM3 |
(34) 0x404e9a LEA (%RBX,%R14,1),%R8 |
(34) 0x404e9e VXORPD %XMM4,%XMM4,%XMM4 |
(34) 0x404ea2 VPCMPEQB %XMM0,%XMM0,%K1 |
(34) 0x404ea8 VPBROADCASTD %EDI,%YMM5 |
(34) 0x404eae VPADDD %YMM3,%YMM10,%YMM3 |
(34) 0x404eb2 VPADDD %YMM5,%YMM8,%YMM5 |
(34) 0x404eb6 VPMULLD %YMM5,%YMM7,%YMM5 |
(34) 0x404ebb VPADDD %YMM5,%YMM1,%YMM5 |
(34) 0x404ebf LEA (%R10,%R14,1),%R9 |
(34) 0x404ec3 VPSUBD %YMM9,%YMM5,%YMM5 |
(34) 0x404ec8 VXORPS %XMM6,%XMM6,%XMM6 |
(34) 0x404ecc VGATHERDPS (%R8,%YMM3,4),%YMM4{%K1} |
(34) 0x404ed3 VPCMPEQB %XMM0,%XMM0,%K1 |
(34) 0x404ed9 VGATHERDPS (%R9,%YMM5,4),%YMM6{%K1} |
(34) 0x404ee0 VCVTPS2PD %YMM4,%ZMM3 |
(34) 0x404ee6 VCVTPS2PD %YMM6,%ZMM4 |
(34) 0x404eec VFMADD231PD %ZMM4,%ZMM3,%ZMM2 |
(34) 0x404ef2 ADD $0x8,%RDI |
(34) 0x404ef6 CMP %R15,%RDI |
(34) 0x404ef9 JB 404e90 |
(33) 0x404efb VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(33) 0x404f02 VADDPD %ZMM3,%ZMM2,%ZMM2 |
(33) 0x404f08 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(33) 0x404f0e VADDPD %XMM3,%XMM2,%XMM2 |
(33) 0x404f12 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(33) 0x404f17 VADDSD %XMM3,%XMM2,%XMM2 |
(33) 0x404f1b MOV %R15,%RDI |
(33) 0x404f1e TESTB $0x1,0x110(%RSP) |
(33) 0x404f26 JE 404d96 |
(33) 0x404f2c JMP 404e4f |
0x404f40 VMOVUPS %YMM12,0x420(%RSP) |
0x404f49 VMOVUPS %YMM11,0x440(%RSP) |
0x404f52 VZEROUPPER |
0x404f55 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404f5a SUB 0x80(%RSP),%RAX |
0x404f62 MOV $0x20c49ba5e353f7cf,%RCX |
0x404f6c IMUL %RCX |
0x404f6f MOV %RDX,%RAX |
0x404f72 SHR $0x3f,%RAX |
0x404f76 SAR $0x7,%RDX |
0x404f7a ADD %RAX,%RDX |
0x404f7d ADD %RDX,0x18(%RSP) |
0x404f82 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404f87 MOV %RAX,0x150(%RSP) |
0x404f8f MOV 0xc0(%RSP),%RAX |
0x404f97 ADD $0x1c,%RAX |
0x404f9b MOV %RAX,0x118(%RSP) |
0x404fa3 XOR %EAX,%EAX |
0x404fa5 XOR %ESI,%ESI |
0x404fa7 JMP 404fd9 |
(29) 0x404fb0 MOV 0x128(%RSP),%RCX |
(29) 0x404fb8 LEA 0x1(%RCX),%RSI |
(29) 0x404fbc MOV 0x80(%RSP),%RAX |
(29) 0x404fc4 ADD 0xb8(%RSP),%EAX |
(29) 0x404fcb CMP 0x188(%RSP),%RCX |
(29) 0x404fd3 JE 405150 |
(29) 0x404fd9 MOV %RAX,0x80(%RSP) |
(29) 0x404fe1 MOV %EAX,%EAX |
(29) 0x404fe3 MOV %RAX,0x100(%RSP) |
(29) 0x404feb MOV %RSI,0x128(%RSP) |
(29) 0x404ff3 LEA (%R12,%RSI,4),%RSI |
(29) 0x404ff7 CMPL $0x8,0x148(%RSP) |
(29) 0x404fff MOV 0x120(%RSP),%RAX |
(29) 0x405007 MOV 0x198(%RSP),%ECX |
(29) 0x40500e MOV 0x240(%RSP),%RDI |
(29) 0x405016 MOV 0x238(%RSP),%RDX |
(29) 0x40501e JB 4050fc |
(29) 0x405024 MOV 0x118(%RSP),%R8 |
(29) 0x40502c MOV 0x100(%RSP),%R9 |
(29) 0x405034 LEA (%R8,%R9,4),%R8 |
(29) 0x405038 XOR %R9D,%R9D |
(29) 0x40503b XOR %R10D,%R10D |
(29) 0x40503e XCHG %AX,%AX |
(31) 0x405040 MOV %R9D,%R11D |
(31) 0x405043 VMOVSS -0x1c(%R8,%R10,1),%XMM0 |
(31) 0x40504a VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x405050 LEA (%RAX,%R9,1),%R11D |
(31) 0x405054 VMOVSS -0x18(%R8,%R10,1),%XMM0 |
(31) 0x40505b VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x405061 MOV 0x270(%RSP),%R11 |
(31) 0x405069 ADD %R9D,%R11D |
(31) 0x40506c VMOVSS -0x14(%R8,%R10,1),%XMM0 |
(31) 0x405073 VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x405079 MOV 0x268(%RSP),%R11 |
(31) 0x405081 LEA (%R11,%R9,1),%R11D |
(31) 0x405085 VMOVSS -0x10(%R8,%R10,1),%XMM0 |
(31) 0x40508c VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x405092 MOV 0x260(%RSP),%R11 |
(31) 0x40509a LEA (%R11,%R9,1),%R11D |
(31) 0x40509e VMOVSS -0xc(%R8,%R10,1),%XMM0 |
(31) 0x4050a5 VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x4050ab MOV 0x258(%RSP),%R11 |
(31) 0x4050b3 LEA (%R11,%R9,1),%R11D |
(31) 0x4050b7 VMOVSS -0x8(%R8,%R10,1),%XMM0 |
(31) 0x4050be VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x4050c4 LEA (%RDX,%R9,1),%R11D |
(31) 0x4050c8 VMOVSS -0x4(%R8,%R10,1),%XMM0 |
(31) 0x4050cf VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x4050d5 VMOVSS (%R8,%R10,1),%XMM0 |
(31) 0x4050db MOV 0x278(%RSP),%R11 |
(31) 0x4050e3 ADD %R9D,%R11D |
(31) 0x4050e6 VMOVSS %XMM0,(%RSI,%R11,4) |
(31) 0x4050ec ADD $0x20,%R10 |
(31) 0x4050f0 ADD %ECX,%R9D |
(31) 0x4050f3 CMP %R10,%RDI |
(31) 0x4050f6 JNE 405040 |
(29) 0x4050fc MOV 0x148(%RSP),%R11 |
(29) 0x405104 CMP %R11,%R15 |
(29) 0x405107 JAE 404fb0 |
(29) 0x40510d MOV 0xc0(%RSP),%RCX |
(29) 0x405115 MOV 0x100(%RSP),%RDX |
(29) 0x40511d LEA (%RCX,%RDX,4),%RDI |
(29) 0x405121 MOV 0x228(%RSP),%R8 |
(29) 0x405129 MOV %R15,%R9 |
(29) 0x40512c NOPL (%RAX) |
(30) 0x405130 VMOVSS (%RDI,%R9,4),%XMM0 |
(30) 0x405136 MOV %R8D,%R10D |
(30) 0x405139 VMOVSS %XMM0,(%RSI,%R10,4) |
(30) 0x40513f INC %R9 |
(30) 0x405142 ADD %RAX,%R8 |
(30) 0x405145 CMP %R9,%R11 |
(30) 0x405148 JNE 405130 |
(29) 0x40514a JMP 404fb0 |
0x405150 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405155 SUB 0x150(%RSP),%RAX |
0x40515d MOV $0x20c49ba5e353f7cf,%RCX |
0x405167 IMUL %RCX |
0x40516a MOV %RDX,%RAX |
0x40516d SHR $0x3f,%RAX |
0x405171 SAR $0x7,%RDX |
0x405175 ADD %RAX,%RDX |
0x405178 ADD %RDX,0x20(%RSP) |
0x40517d CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405182 MOV %RAX,0x80(%RSP) |
0x40518a KMOVW 0x116(%RSP),%K0 |
0x405193 KMOVD %K0,%EAX |
0x405197 XOR %ECX,%ECX |
0x405199 XOR %EDX,%EDX |
0x40519b MOV 0xb8(%RSP),%RDI |
0x4051a3 VMOVUPS 0x400(%RSP),%YMM11 |
0x4051ac VMOVUPS 0x3e0(%RSP),%YMM12 |
0x4051b5 VMOVDQU 0x320(%RSP),%YMM7 |
0x4051be MOV 0xc8(%RSP),%R11 |
0x4051c6 VPMOVSXBD 0x90f1(%RIP),%YMM8 |
0x4051cf VPBROADCASTD 0x8e2c(%RIP),%YMM9 |
0x4051d8 VMOVDQU 0x8e40(%RIP),%YMM10 |
0x4051e0 VPMOVSXBQ 0x90d6(%RIP),%ZMM13 |
0x4051ea VPMOVSXBD 0x90cd(%RIP),%YMM14 |
0x4051f3 JMP 40521d |
(26) 0x405200 LEA 0x1(%RDX),%ESI |
(26) 0x405203 MOV 0xb8(%RSP),%RDI |
(26) 0x40520b ADD %RDI,%RCX |
(26) 0x40520e CMP 0xac(%RSP),%EDX |
(26) 0x405215 MOV %ESI,%EDX |
(26) 0x405217 JE 4053f0 |
(26) 0x40521d MOV %EDX,%ESI |
(26) 0x40521f IMUL %EDI,%ESI |
(26) 0x405222 VPBROADCASTD %ESI,%YMM0 |
(26) 0x405228 MOV %EDX,%ESI |
(26) 0x40522a IMUL 0x120(%RSP),%ESI |
(26) 0x405232 XOR %EDI,%EDI |
(26) 0x405234 JMP 405333 |
(27) 0x405240 VXORPD %XMM2,%XMM2,%XMM2 |
(27) 0x405244 XOR %R8D,%R8D |
(27) 0x405247 VPBROADCASTQ %R8,%ZMM3 |
(27) 0x40524d VMOVDQU64 0x340(%RSP),%ZMM4 |
(27) 0x405255 VPSUBQ %ZMM3,%ZMM4,%ZMM4 |
(27) 0x40525b VPCMPGTQ %ZMM13,%ZMM4,%K1 |
(27) 0x405261 VPMOVQD %ZMM3,%YMM3 |
(27) 0x405267 VPADDD %YMM3,%YMM14,%YMM3 |
(27) 0x40526b VPADDD %YMM3,%YMM0,%YMM4 |
(27) 0x40526f MOV 0xc8(%RSP),%R8 |
(27) 0x405277 ADD %R14,%R8 |
(27) 0x40527a VPBROADCASTD 0x8d81(%RIP),%YMM6 |
(27) 0x405283 VPSUBD %YMM6,%YMM4,%YMM4 |
(27) 0x405287 VXORPS %XMM5,%XMM5,%XMM5 |
(27) 0x40528b KMOVQ %K1,%K2 |
(27) 0x405290 VGATHERDPS (%R8,%YMM4,4),%YMM5{%K2} |
(27) 0x405297 VMOVAPS %YMM5,%YMM12{%K1} |
(27) 0x40529d VCVTPS2PD %YMM12,%ZMM4 |
(27) 0x4052a3 VPMULLD 0x320(%RSP),%YMM3,%YMM3 |
(27) 0x4052ad VPADDD %YMM3,%YMM1,%YMM1 |
(27) 0x4052b1 LEA (%R12,%R14,1),%R8 |
(27) 0x4052b5 VPSUBD %YMM6,%YMM1,%YMM1 |
(27) 0x4052b9 VPXOR %XMM3,%XMM3,%XMM3 |
(27) 0x4052bd KMOVQ %K1,%K2 |
(27) 0x4052c2 VGATHERDPS (%R8,%YMM1,4),%YMM3{%K2} |
(27) 0x4052c9 VMOVAPS %YMM3,%YMM11{%K1} |
(27) 0x4052cf VCVTPS2PD %YMM11,%ZMM1 |
(27) 0x4052d5 VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
(27) 0x4052db VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(27) 0x4052e2 VADDPD %ZMM3,%ZMM1,%ZMM1 |
(27) 0x4052e8 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(27) 0x4052ee VADDPD %XMM3,%XMM1,%XMM1 |
(27) 0x4052f2 VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
(27) 0x4052f7 VADDSD %XMM3,%XMM1,%XMM1 |
(27) 0x4052fb VADDSD %XMM1,%XMM2,%XMM2 |
(27) 0x4052ff VCVTSD2SS %XMM2,%XMM2,%XMM1 |
(27) 0x405303 VMULSS 0x19c(%RSP),%XMM1,%XMM1 |
(27) 0x40530c LEA (%RSI,%RDI,1),%R8D |
(27) 0x405310 MOV 0xa0(%RSP),%R9 |
(27) 0x405318 VMOVSS %XMM1,(%R9,%R8,4) |
(27) 0x40531e LEA 0x1(%RDI),%R8 |
(27) 0x405322 CMP 0x188(%RSP),%RDI |
(27) 0x40532a MOV %R8,%RDI |
(27) 0x40532d JE 405200 |
(27) 0x405333 VPBROADCASTD %EDI,%YMM1 |
(27) 0x405339 TEST %R15,%R15 |
(27) 0x40533c JE 405240 |
(27) 0x405342 VXORPD %XMM2,%XMM2,%XMM2 |
(27) 0x405346 XOR %R8D,%R8D |
(27) 0x405349 NOPL (%RAX) |
(28) 0x405350 LEA (%RCX,%R8,1),%R9D |
(28) 0x405354 VPBROADCASTD %R9D,%YMM3 |
(28) 0x40535a LEA (%R11,%R14,1),%R9 |
(28) 0x40535e VXORPD %XMM4,%XMM4,%XMM4 |
(28) 0x405362 VPCMPEQB %XMM0,%XMM0,%K1 |
(28) 0x405368 VPBROADCASTD %R8D,%YMM5 |
(28) 0x40536e VPADDD %YMM3,%YMM10,%YMM3 |
(28) 0x405372 VPADDD %YMM5,%YMM8,%YMM5 |
(28) 0x405376 VPMULLD %YMM5,%YMM7,%YMM5 |
(28) 0x40537b VPADDD %YMM5,%YMM1,%YMM5 |
(28) 0x40537f LEA (%R12,%R14,1),%R10 |
(28) 0x405383 VPSUBD %YMM9,%YMM5,%YMM5 |
(28) 0x405388 VXORPS %XMM6,%XMM6,%XMM6 |
(28) 0x40538c VGATHERDPS (%R9,%YMM3,4),%YMM4{%K1} |
(28) 0x405393 VPCMPEQB %XMM0,%XMM0,%K1 |
(28) 0x405399 VGATHERDPS (%R10,%YMM5,4),%YMM6{%K1} |
(28) 0x4053a0 VCVTPS2PD %YMM4,%ZMM3 |
(28) 0x4053a6 VCVTPS2PD %YMM6,%ZMM4 |
(28) 0x4053ac VFMADD231PD %ZMM4,%ZMM3,%ZMM2 |
(28) 0x4053b2 ADD $0x8,%R8 |
(28) 0x4053b6 CMP %R15,%R8 |
(28) 0x4053b9 JB 405350 |
(27) 0x4053bb VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(27) 0x4053c2 VADDPD %ZMM3,%ZMM2,%ZMM2 |
(27) 0x4053c8 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(27) 0x4053ce VADDPD %XMM3,%XMM2,%XMM2 |
(27) 0x4053d2 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(27) 0x4053d7 VADDSD %XMM3,%XMM2,%XMM2 |
(27) 0x4053db MOV %R15,%R8 |
(27) 0x4053de TEST $0x1,%AL |
(27) 0x4053e0 JE 405247 |
(27) 0x4053e6 JMP 4052ff |
0x4053f0 VMOVUPS %YMM12,0x3e0(%RSP) |
0x4053f9 VMOVUPS %YMM11,0x400(%RSP) |
0x405402 VZEROUPPER |
0x405405 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x40540a SUB 0x80(%RSP),%RAX |
0x405412 MOV $0x20c49ba5e353f7cf,%RCX |
0x40541c IMUL %RCX |
0x40541f MOV %RDX,%RAX |
0x405422 SHR $0x3f,%RAX |
0x405426 SAR $0x7,%RDX |
0x40542a ADD %RAX,%RDX |
0x40542d ADD %RDX,0x28(%RSP) |
0x405432 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405437 MOV %RAX,0x218(%RSP) |
0x40543f MOV 0xa0(%RSP),%RAX |
0x405447 LEA 0x1c(%RAX),%RDX |
0x40544b MOV $0x1,%ESI |
0x405450 XOR %ECX,%ECX |
0x405452 MOV %RCX,0x118(%RSP) |
0x40545a MOV %RAX,%RDI |
0x40545d XOR %R8D,%R8D |
0x405460 VMOVUPS 0x2c0(%RSP),%ZMM21 |
0x405468 VMOVUPS 0x280(%RSP),%ZMM22 |
0x405470 JMP 4054e5 |
(22) 0x405480 MOV 0x130(%RSP),%R12 |
(22) 0x405488 MOV 0x150(%RSP),%RCX |
(22) 0x405490 VMOVSS %XMM20,(%R12,%RCX,4) |
(22) 0x405497 MOV 0x1b8(%RSP),%RAX |
(22) 0x40549f MOV 0x250(%RSP),%RDX |
(22) 0x4054a7 ADD %RAX,%RDX |
(22) 0x4054aa MOV 0x248(%RSP),%RSI |
(22) 0x4054b2 INC %RSI |
(22) 0x4054b5 MOV 0x128(%RSP),%RDI |
(22) 0x4054bd ADD %RAX,%RDI |
(22) 0x4054c0 MOV 0x118(%RSP),%RAX |
(22) 0x4054c8 ADD 0x194(%RSP),%EAX |
(22) 0x4054cf MOV %RAX,0x118(%RSP) |
(22) 0x4054d7 CMP 0x188(%RSP),%RCX |
(22) 0x4054df JE 405970 |
(22) 0x4054e5 LEA 0x1(%R8),%R9 |
(22) 0x4054e9 VMOVSS 0x8b15(%RIP),%XMM16 |
(22) 0x4054f3 CMP $0x8,%R9 |
(22) 0x4054f7 JB 405544 |
(22) 0x4054f9 MOV %RSI,%RAX |
(22) 0x4054fc SHR $0x3,%RAX |
(22) 0x405500 MOV %RDX,%RCX |
(22) 0x405503 VMOVSS 0x8afb(%RIP),%XMM16 |
(22) 0x40550d NOPL (%RAX) |
(25) 0x405510 VMAXSS -0x1c(%RCX),%XMM16,%XMM0 |
(25) 0x405517 VMAXSS -0x18(%RCX),%XMM0,%XMM0 |
(25) 0x40551c VMAXSS -0x14(%RCX),%XMM0,%XMM0 |
(25) 0x405521 VMAXSS -0x10(%RCX),%XMM0,%XMM0 |
(25) 0x405526 VMAXSS -0xc(%RCX),%XMM0,%XMM0 |
(25) 0x40552b VMAXSS -0x8(%RCX),%XMM0,%XMM0 |
(25) 0x405530 VMAXSS -0x4(%RCX),%XMM0,%XMM0 |
(25) 0x405535 VMAXSS (%RCX),%XMM0,%XMM16 |
(25) 0x40553b ADD $0x20,%RCX |
(25) 0x40553f DEC %RAX |
(25) 0x405542 JNE 405510 |
(22) 0x405544 MOV %R9,%RAX |
(22) 0x405547 AND $-0x8,%RAX |
(22) 0x40554b CMP %R9,%RAX |
(22) 0x40554e MOV 0x78(%RSP),%R12 |
(22) 0x405553 JE 40556f |
(22) 0x405555 NOPW %CS:(%RAX,%RAX,1) |
(24) 0x405560 VMAXSS (%RDI,%RAX,4),%XMM16,%XMM16 |
(24) 0x405567 INC %RAX |
(24) 0x40556a CMP %RAX,%RSI |
(24) 0x40556d JNE 405560 |
(22) 0x40556f MOV %RDI,0x128(%RSP) |
(22) 0x405577 MOV %RSI,0x248(%RSP) |
(22) 0x40557f MOV %RDX,0x250(%RSP) |
(22) 0x405587 MOV %R9,%RDI |
(22) 0x40558a AND $-0x10,%RDI |
(22) 0x40558e VPBROADCASTQ %RDI,%ZMM17 |
(22) 0x405594 MOV %R8,0x150(%RSP) |
(22) 0x40559c MOV %R9,0x100(%RSP) |
(22) 0x4055a4 MOV %RDI,0x2c0(%RSP) |
(22) 0x4055ac VPBROADCASTQ %R9,%ZMM19 |
(22) 0x4055b2 JE 405740 |
(22) 0x4055b8 DEC %RDI |
(22) 0x4055bb VBROADCASTSS %XMM16,%ZMM18 |
(22) 0x4055c1 MOV 0xe0(%RSP),%RAX |
(22) 0x4055c9 IMUL %R8,%RAX |
(22) 0x4055cd MOV %RAX,0x280(%RSP) |
(22) 0x4055d5 VPXORD %XMM20,%XMM20,%XMM20 |
(22) 0x4055db XOR %ESI,%ESI |
(22) 0x4055dd MOV $0x4069f0,%R12 |
(22) 0x4055e4 MOV 0x128(%RSP),%R13 |
(22) 0x4055ec NOPL (%RAX) |
(23) 0x4055f0 VMOVUPS (%R13,%RSI,4),%ZMM0 |
(23) 0x4055f8 VSUBPS %ZMM18,%ZMM0,%ZMM0 |
(23) 0x4055fe CALL %R12 |
(23) 0x405601 VADDPS %ZMM20,%ZMM0,%ZMM20 |
(23) 0x405607 ADD $0x10,%RSI |
(23) 0x40560b CMP %RDI,%RSI |
(23) 0x40560e JLE 4055f0 |
(22) 0x405610 VEXTRACTF64X4 $0x1,%ZMM20,%YMM0 |
(22) 0x405617 VADDPS %ZMM0,%ZMM20,%ZMM0 |
(22) 0x40561d VEXTRACTF128 $0x1,%YMM0,%XMM1 |
(22) 0x405623 VADDPS %XMM1,%XMM0,%XMM0 |
(22) 0x405627 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
(22) 0x40562c VADDPS %XMM1,%XMM0,%XMM0 |
(22) 0x405630 VMOVSHDUP %XMM0,%XMM1 |
(22) 0x405634 VADDSS %XMM1,%XMM0,%XMM20 |
(22) 0x40563a VPCMPEQQ %ZMM17,%ZMM19,%K0 |
(22) 0x405640 KMOVD %K0,%ECX |
(22) 0x405644 MOV 0x2c0(%RSP),%RDI |
(22) 0x40564c MOV %RDI,%RAX |
(22) 0x40564f TEST $0x1,%CL |
(22) 0x405652 MOV 0xa0(%RSP),%RSI |
(22) 0x40565a MOV 0x78(%RSP),%R12 |
(22) 0x40565f JE 40576a |
(22) 0x405665 TEST %RDI,%RDI |
(22) 0x405668 MOV 0x98(%RSP),%R13 |
(22) 0x405670 JE 40580e |
(22) 0x405676 MOV 0x118(%RSP),%EAX |
(22) 0x40567d LEA (%R12,%RAX,4),%RAX |
(22) 0x405681 MOV %RAX,0x80(%RSP) |
(22) 0x405689 LEA -0x1(%RDI),%RSI |
(22) 0x40568d VBROADCASTSS %XMM16,%ZMM18 |
(22) 0x405693 VBROADCASTSS %XMM20,%ZMM16 |
(22) 0x405699 VMOVSS 0x896b(%RIP),%XMM0 |
(22) 0x4056a1 VDIVSS %XMM20,%XMM0,%XMM0 |
(22) 0x4056a7 VBROADCASTSS %XMM0,%ZMM19 |
(22) 0x4056ad XOR %R12D,%R12D |
(22) 0x4056b0 MOV $0x4069f0,%R13 |
(22) 0x4056b7 MOV 0x128(%RSP),%RDI |
(22) 0x4056bf NOP |
(17) 0x4056c0 VMOVUPS (%RDI,%R12,4),%ZMM0 |
(17) 0x4056c7 VSUBPS %ZMM18,%ZMM0,%ZMM0 |
(17) 0x4056cd CALL %R13 |
(17) 0x4056d0 VMULPS %ZMM19,%ZMM0,%ZMM0 |
(17) 0x4056d6 MOV 0x80(%RSP),%RAX |
(17) 0x4056de VMOVUPS %ZMM0,(%RAX,%R12,4) |
(17) 0x4056e5 ADD $0x10,%R12 |
(17) 0x4056e9 CMP %RSI,%R12 |
(17) 0x4056ec JLE 4056c0 |
(22) 0x4056ee MOV 0x100(%RSP),%R8 |
(22) 0x4056f6 VPBROADCASTQ %R8,%ZMM0 |
(22) 0x4056fc VPCMPEQQ %ZMM17,%ZMM0,%K0 |
(22) 0x405702 KMOVD %K0,%EAX |
(22) 0x405706 TEST $0x1,%AL |
(22) 0x405708 MOV 0x98(%RSP),%R13 |
(22) 0x405710 MOV 0xa0(%RSP),%RSI |
(22) 0x405718 MOV 0x78(%RSP),%R12 |
(22) 0x40571d JE 405832 |
(22) 0x405723 CMP 0xe0(%RSP),%R8 |
(22) 0x40572b JAE 405480 |
(22) 0x405731 JMP 4058e5 |
(22) 0x405740 MOV 0xe0(%RSP),%RAX |
(22) 0x405748 IMUL %R8,%RAX |
(22) 0x40574c MOV %RAX,0x280(%RSP) |
(22) 0x405754 VBROADCASTSS %XMM16,%ZMM18 |
(22) 0x40575a VPXORD %XMM20,%XMM20,%XMM20 |
(22) 0x405760 XOR %EAX,%EAX |
(22) 0x405762 MOV 0xa0(%RSP),%RSI |
(22) 0x40576a VPBROADCASTQ %RAX,%ZMM0 |
(22) 0x405770 VPSUBQ %ZMM0,%ZMM19,%ZMM1 |
(22) 0x405776 VPSUBQ %ZMM0,%ZMM19,%ZMM0 |
(22) 0x40577c VPCMPNLEUQ 0x8a79(%RIP),%ZMM0,%K0 |
(22) 0x405787 VPCMPNLEUQ 0x8aae(%RIP),%ZMM1,%K1 |
(22) 0x405792 KUNPCKBW %K0,%K1,%K1 |
(22) 0x405796 KMOVW %K1,0x80(%RSP) |
(22) 0x40579f ADD 0x280(%RSP),%RAX |
(22) 0x4057a7 VMOVUPS (%RSI,%RAX,4),%ZMM0{%K1}{z} |
(22) 0x4057ae VMOVAPS %ZMM0,%ZMM21{%K1} |
(22) 0x4057b4 VSUBPS %ZMM18,%ZMM21,%ZMM1 |
(22) 0x4057ba CALL 406aa0 <__svml_expf16_mask_z0> |
(22) 0x4057c0 KMOVW 0x80(%RSP),%K1 |
(22) 0x4057c9 VMOVAPS %ZMM0,%ZMM0{%K1}{z} |
(22) 0x4057cf VEXTRACTF64X4 $0x1,%ZMM0,%YMM1 |
(22) 0x4057d6 VADDPS %ZMM1,%ZMM0,%ZMM0 |
(22) 0x4057dc VEXTRACTF128 $0x1,%YMM0,%XMM1 |
(22) 0x4057e2 VADDPS %XMM1,%XMM0,%XMM0 |
(22) 0x4057e6 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
(22) 0x4057eb VADDPS %XMM1,%XMM0,%XMM0 |
(22) 0x4057ef VMOVSHDUP %XMM0,%XMM1 |
(22) 0x4057f3 VADDSS %XMM1,%XMM0,%XMM0 |
(22) 0x4057f7 VADDSS %XMM0,%XMM20,%XMM20 |
(22) 0x4057fd TEST %RDI,%RDI |
(22) 0x405800 MOV 0x98(%RSP),%R13 |
(22) 0x405808 JNE 405676 |
(22) 0x40580e MOV 0x100(%RSP),%RAX |
(22) 0x405816 VPBROADCASTQ %RAX,%ZMM0 |
(22) 0x40581c VBROADCASTSS %XMM16,%ZMM18 |
(22) 0x405822 VBROADCASTSS %XMM20,%ZMM16 |
(22) 0x405828 XOR %EAX,%EAX |
(22) 0x40582a MOV %RAX,0x2c0(%RSP) |
(22) 0x405832 MOV %R12,0x78(%RSP) |
(22) 0x405837 MOV 0x280(%RSP),%RCX |
(22) 0x40583f MOV %ECX,%EDI |
(22) 0x405841 MOV 0x2c0(%RSP),%R12 |
(22) 0x405849 VPBROADCASTQ %R12,%ZMM1 |
(22) 0x40584f VPSUBQ %ZMM1,%ZMM0,%ZMM2 |
(22) 0x405855 VPSUBQ %ZMM1,%ZMM0,%ZMM0 |
(22) 0x40585b VPCMPNLEUQ 0x899a(%RIP),%ZMM0,%K0 |
(22) 0x405866 VPCMPNLEUQ 0x89cf(%RIP),%ZMM2,%K1 |
(22) 0x405871 KUNPCKBW %K0,%K1,%K1 |
(22) 0x405875 KMOVW %K1,0x80(%RSP) |
(22) 0x40587e ADD %R12,%RCX |
(22) 0x405881 VMOVUPS (%RSI,%RCX,4),%ZMM0{%K1}{z} |
(22) 0x405888 VMOVAPS %ZMM0,%ZMM22{%K1} |
(22) 0x40588e VSUBPS %ZMM18,%ZMM22,%ZMM1 |
(22) 0x405894 CALL 406aa0 <__svml_expf16_mask_z0> |
(22) 0x40589a MOV 0x100(%RSP),%R8 |
(22) 0x4058a2 VRCP14PS %ZMM16,%ZMM1 |
(22) 0x4058a8 VFMSUB213PS 0x40e00c{1to16},%ZMM1,%ZMM16 |
(22) 0x4058b3 VMULPS %ZMM0,%ZMM1,%ZMM0 |
(22) 0x4058b9 VFNMADD213PS %ZMM0,%ZMM16,%ZMM0 |
(22) 0x4058bf ADD %R12,%RDI |
(22) 0x4058c2 MOV 0x78(%RSP),%RAX |
(22) 0x4058c7 KMOVW 0x80(%RSP),%K1 |
(22) 0x4058d0 VMOVUPS %ZMM0,(%RAX,%RDI,4){%K1} |
(22) 0x4058d7 CMP 0xe0(%RSP),%R8 |
(22) 0x4058df JAE 405480 |
(22) 0x4058e5 MOV 0x220(%RSP),%RDI |
(22) 0x4058ed MOV 0x150(%RSP),%RCX |
(22) 0x4058f5 IMUL %RCX,%RDI |
(22) 0x4058f9 ADD $0x4,%RDI |
(22) 0x4058fd MOV $0x3fffffffc,%RAX |
(22) 0x405907 AND %RAX,%RDI |
(22) 0x40590a MOV 0x230(%RSP),%RAX |
(22) 0x405912 SUB %RCX,%RAX |
(22) 0x405915 ADD 0x78(%RSP),%RDI |
(22) 0x40591a MOV %EAX,%EAX |
(22) 0x40591c LEA 0x4(,%RAX,4),%RDX |
(22) 0x405924 XOR %ESI,%ESI |
(22) 0x405926 VMOVUPS %ZMM21,0x2c0(%RSP) |
(22) 0x40592e VMOVUPS %ZMM22,0x280(%RSP) |
(22) 0x405936 VMOVUPS %XMM20,0x80(%RSP) |
(22) 0x40593e VZEROUPPER |
(22) 0x405941 CALL 406bf0 <_intel_fast_memset> |
(22) 0x405946 VMOVUPS 0x80(%RSP),%XMM20 |
(22) 0x40594e MOV 0x100(%RSP),%R8 |
(22) 0x405956 VMOVUPS 0x280(%RSP),%ZMM22 |
(22) 0x40595e VMOVUPS 0x2c0(%RSP),%ZMM21 |
(22) 0x405966 JMP 405480 |
0x405970 VMOVUPS %ZMM22,0x280(%RSP) |
0x405978 VMOVUPS %ZMM21,0x2c0(%RSP) |
0x405980 VZEROUPPER |
0x405983 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405988 SUB 0x218(%RSP),%RAX |
0x405990 MOV $0x20c49ba5e353f7cf,%RCX |
0x40599a IMUL %RCX |
0x40599d MOV %RDX,%RAX |
0x4059a0 SHR $0x3f,%RAX |
0x4059a4 SAR $0x7,%RDX |
0x4059a8 ADD %RAX,%RDX |
0x4059ab ADD %RDX,0x30(%RSP) |
0x4059b0 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x4059b5 MOV %RAX,0x80(%RSP) |
0x4059bd XOR %EAX,%EAX |
0x4059bf XOR %ECX,%ECX |
0x4059c1 MOV 0x120(%RSP),%RSI |
0x4059c9 MOV 0x208(%RSP),%R9 |
0x4059d1 VMOVUPS 0x3c0(%RSP),%YMM8 |
0x4059da MOV 0x140(%RSP),%R10 |
0x4059e2 VMOVUPS 0x3a0(%RSP),%YMM9 |
0x4059eb VPBROADCASTD 0x8610(%RIP),%YMM7 |
0x4059f4 MOV 0xe8(%RSP),%R11 |
0x4059fc VPMOVSXBQ 0x88ba(%RIP),%ZMM10 |
0x405a06 VPMOVSXBD 0x88b1(%RIP),%YMM11 |
0x405a0f JMP 405a3d |
(19) 0x405a20 LEA 0x1(%RCX),%EDX |
(19) 0x405a23 MOV 0x120(%RSP),%RSI |
(19) 0x405a2b ADD %RSI,%RAX |
(19) 0x405a2e CMP 0xac(%RSP),%ECX |
(19) 0x405a35 MOV %EDX,%ECX |
(19) 0x405a37 JE 405c10 |
(19) 0x405a3d MOV %ECX,%EDX |
(19) 0x405a3f IMUL %ESI,%EDX |
(19) 0x405a42 VPBROADCASTD %EDX,%YMM0 |
(19) 0x405a48 MOV %ECX,%EDX |
(19) 0x405a4a IMUL 0xb8(%RSP),%EDX |
(19) 0x405a52 XOR %ESI,%ESI |
(19) 0x405a54 JMP 405b45 |
(20) 0x405a60 VXORPD %XMM2,%XMM2,%XMM2 |
(20) 0x405a64 XOR %EDI,%EDI |
(20) 0x405a66 MOV 0xe0(%RSP),%R8 |
(20) 0x405a6e SUB %RDI,%R8 |
(20) 0x405a71 VPBROADCASTQ %R8,%ZMM3 |
(20) 0x405a77 VPCMPGTQ %ZMM10,%ZMM3,%K1 |
(20) 0x405a7d VPBROADCASTD %EDI,%YMM3 |
(20) 0x405a83 VPADDD %YMM3,%YMM11,%YMM3 |
(20) 0x405a87 VPADDD %YMM3,%YMM0,%YMM4 |
(20) 0x405a8b MOV 0x78(%RSP),%RDI |
(20) 0x405a90 ADD %R14,%RDI |
(20) 0x405a93 VPBROADCASTD 0x8568(%RIP),%YMM6 |
(20) 0x405a9c VPSUBD %YMM6,%YMM4,%YMM4 |
(20) 0x405aa0 VPXOR %XMM5,%XMM5,%XMM5 |
(20) 0x405aa4 KMOVQ %K1,%K2 |
(20) 0x405aa9 VGATHERDPS (%RDI,%YMM4,4),%YMM5{%K2} |
(20) 0x405ab0 VMOVAPS %YMM5,%YMM9{%K1} |
(20) 0x405ab6 VCVTPS2PD %YMM9,%ZMM4 |
(20) 0x405abc VPMULLD 0x1c0(%RSP),%YMM3,%YMM3 |
(20) 0x405ac6 VPADDD %YMM3,%YMM1,%YMM1 |
(20) 0x405aca MOV 0xe8(%RSP),%RDI |
(20) 0x405ad2 LEA (%RDI,%R14,1),%RDI |
(20) 0x405ad6 VPSUBD %YMM6,%YMM1,%YMM1 |
(20) 0x405ada VPXOR %XMM3,%XMM3,%XMM3 |
(20) 0x405ade KMOVQ %K1,%K2 |
(20) 0x405ae3 VGATHERDPS (%RDI,%YMM1,4),%YMM3{%K2} |
(20) 0x405aea VMOVAPS %YMM3,%YMM8{%K1} |
(20) 0x405af0 VCVTPS2PD %YMM8,%ZMM1 |
(20) 0x405af6 VMULPD %ZMM4,%ZMM1,%ZMM1{%K1}{z} |
(20) 0x405afc VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(20) 0x405b03 VADDPD %ZMM3,%ZMM1,%ZMM1 |
(20) 0x405b09 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(20) 0x405b0f VADDPD %XMM3,%XMM1,%XMM1 |
(20) 0x405b13 VSHUFPD $0x1,%XMM1,%XMM1,%XMM3 |
(20) 0x405b18 VADDSD %XMM3,%XMM1,%XMM1 |
(20) 0x405b1c VADDSD %XMM1,%XMM2,%XMM2 |
(20) 0x405b20 VCVTSD2SS %XMM2,%XMM2,%XMM1 |
(20) 0x405b24 LEA (%RDX,%RSI,1),%EDI |
(20) 0x405b27 MOV 0x108(%RSP),%R8 |
(20) 0x405b2f VMOVSS %XMM1,(%R8,%RDI,4) |
(20) 0x405b35 LEA 0x1(%RSI),%RDI |
(20) 0x405b39 CMP %R10,%RSI |
(20) 0x405b3c MOV %RDI,%RSI |
(20) 0x405b3f JE 405a20 |
(20) 0x405b45 VPBROADCASTD %ESI,%YMM1 |
(20) 0x405b4b TEST %R9,%R9 |
(20) 0x405b4e JE 405a60 |
(20) 0x405b54 VXORPD %XMM2,%XMM2,%XMM2 |
(20) 0x405b58 XOR %EDI,%EDI |
(20) 0x405b5a VMOVDQU 0x1c0(%RSP),%YMM5 |
(20) 0x405b63 VPMOVSXBD 0x8754(%RIP),%YMM6 |
(20) 0x405b6c MOV 0x78(%RSP),%R12 |
(20) 0x405b71 NOPW %CS:(%RAX,%RAX,1) |
(21) 0x405b80 VPBROADCASTD %EDI,%YMM3 |
(21) 0x405b86 VPADDD %YMM6,%YMM3,%YMM3 |
(21) 0x405b8a VPMULLD %YMM3,%YMM5,%YMM3 |
(21) 0x405b8f VPADDD %YMM3,%YMM1,%YMM3 |
(21) 0x405b93 LEA (%R11,%R14,1),%R8 |
(21) 0x405b97 VPCMPEQB %XMM0,%XMM0,%K1 |
(21) 0x405b9d VPSUBD %YMM7,%YMM3,%YMM3 |
(21) 0x405ba1 VXORPD %XMM4,%XMM4,%XMM4 |
(21) 0x405ba5 VGATHERDPS (%R8,%YMM3,4),%YMM4{%K1} |
(21) 0x405bac LEA (%RAX,%RDI,1),%R8D |
(21) 0x405bb0 VCVTPS2PD (%R12,%R8,4),%ZMM3 |
(21) 0x405bb7 VCVTPS2PD %YMM4,%ZMM4 |
(21) 0x405bbd VFMADD231PD %ZMM4,%ZMM3,%ZMM2 |
(21) 0x405bc3 ADD $0x8,%RDI |
(21) 0x405bc7 CMP %R9,%RDI |
(21) 0x405bca JB 405b80 |
(20) 0x405bcc VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(20) 0x405bd3 VADDPD %ZMM3,%ZMM2,%ZMM2 |
(20) 0x405bd9 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(20) 0x405bdf VADDPD %XMM3,%XMM2,%XMM2 |
(20) 0x405be3 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(20) 0x405be8 VADDSD %XMM3,%XMM2,%XMM2 |
(20) 0x405bec MOV %R9,%RDI |
(20) 0x405bef CMP %R9,0xe0(%RSP) |
(20) 0x405bf7 MOV 0x130(%RSP),%R12 |
(20) 0x405bff JNE 405a66 |
(20) 0x405c05 JMP 405b20 |
0x405c10 VMOVUPS %YMM9,0x3a0(%RSP) |
0x405c19 VMOVUPS %YMM8,0x3c0(%RSP) |
0x405c22 VZEROUPPER |
0x405c25 CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405c2a SUB 0x80(%RSP),%RAX |
0x405c32 MOV $0x20c49ba5e353f7cf,%RCX |
0x405c3c IMUL %RCX |
0x405c3f MOV %RDX,%RAX |
0x405c42 SHR $0x3f,%RAX |
0x405c46 SAR $0x7,%RDX |
0x405c4a ADD %RAX,%RDX |
0x405c4d ADD %RDX,0x38(%RSP) |
0x405c52 MOVB $0x1,0x80(%RSP) |
0x405c5a MOV 0x180(%RSP),%RAX |
0x405c62 CMP 0x210(%RSP),%RAX |
0x405c6a JNE 405d65 |
0x405c70 MOV 0xa0(%RSP),%RDI |
0x405c78 MOV 0x78(%RSP),%RSI |
0x405c7d MOV %R12,%RDX |
0x405c80 MOV 0x120(%RSP),%RCX |
0x405c88 VMOVSS 0x8384(%RIP),%XMM0 |
0x405c90 CALL 402d90 <_Z15ValidateSoftmaxPKfS0_S0_if> |
0x405c95 MOV %AL,0x80(%RSP) |
0x405c9c MOV $0x415140,%EDI |
0x405ca1 MOV $0x40e3e8,%ESI |
0x405ca6 MOV $0x14,%EDX |
0x405cab CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405cb0 MOV $0x415140,%EDI |
0x405cb5 MOV $0x40e3fd,%ESI |
0x405cba MOV $0x1b,%EDX |
0x405cbf CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405cc4 MOVZX 0x80(%RSP),%ECX |
0x405ccc TEST %CL,%CL |
0x405cce MOV $0x40e41c,%ESI |
0x405cd3 MOV $0x40e419,%EAX |
0x405cd8 CMOVNE %RAX,%RSI |
0x405cdc MOV %ECX,%EAX |
0x405cde XOR $0x1,%AL |
0x405ce0 MOVZX %AL,%EAX |
0x405ce3 LEA 0x2(,%RAX,4),%RDX |
0x405ceb MOV $0x415140,%EDI |
0x405cf0 CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405cf5 MOV $0x415140,%EDI |
0x405cfa MOV $0x40e38a,%ESI |
0x405cff MOV $0x1,%EDX |
0x405d04 CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405d09 MOV $0x415140,%EDI |
0x405d0e MOV $0x40e423,%ESI |
0x405d13 MOV $0x15,%EDX |
0x405d18 CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405d1d MOV $0x415140,%EDI |
0x405d22 MOV $0x40e439,%ESI |
0x405d27 MOV $0x3,%EDX |
0x405d2c CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405d31 MOV $0x415140,%EDI |
0x405d36 MOV $0x40e38a,%ESI |
0x405d3b MOV $0x1,%EDX |
0x405d40 CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x405d45 CMPB $0,0x80(%RSP) |
0x405d4d MOV 0x160(%RSP),%RAX |
0x405d55 MOV $0x1,%ECX |
0x405d5a CMOVE %ECX,%EAX |
0x405d5d MOV %RAX,0x160(%RSP) |
0x405d65 LEA 0x1880(%RSP),%RDI |
0x405d6d CALL 4020d0 <_ZNSt13random_device7_M_finiEv@plt> |
0x405d72 TEST %R12,%R12 |
0x405d75 JE 405d7f |
0x405d77 MOV %R12,%RDI |
0x405d7a CALL 4020e0 <_ZdlPv@plt> |
0x405d7f MOV 0x78(%RSP),%RDI |
0x405d84 CALL 4020e0 <_ZdlPv@plt> |
0x405d89 MOV 0xa0(%RSP),%RDI |
0x405d91 TEST %RDI,%RDI |
0x405d94 JE 405d9b |
0x405d96 CALL 4020e0 <_ZdlPv@plt> |
0x405d9b MOV 0xe8(%RSP),%RDI |
0x405da3 CALL 4020e0 <_ZdlPv@plt> |
0x405da8 MOV 0x138(%RSP),%RDI |
0x405db0 TEST %RDI,%RDI |
0x405db3 JE 405dba |
0x405db5 CALL 4020e0 <_ZdlPv@plt> |
0x405dba MOV 0xc0(%RSP),%RDI |
0x405dc2 TEST %RDI,%RDI |
0x405dc5 JE 405dcc |
0x405dc7 CALL 4020e0 <_ZdlPv@plt> |
0x405dcc MOV 0xc8(%RSP),%RDI |
0x405dd4 TEST %RDI,%RDI |
0x405dd7 JE 405dde |
0x405dd9 CALL 4020e0 <_ZdlPv@plt> |
0x405dde MOV 0x108(%RSP),%RDI |
0x405de6 CALL 4020e0 <_ZdlPv@plt> |
0x405deb MOV 0xd0(%RSP),%RDI |
0x405df3 TEST %RDI,%RDI |
0x405df6 JE 405dfd |
0x405df8 CALL 4020e0 <_ZdlPv@plt> |
0x405dfd MOV 0xd8(%RSP),%RDI |
0x405e05 TEST %RDI,%RDI |
0x405e08 JE 405e0f |
0x405e0a CALL 4020e0 <_ZdlPv@plt> |
0x405e0f TEST %R13,%R13 |
0x405e12 JE 405e1c |
0x405e14 MOV %R13,%RDI |
0x405e17 CALL 4020e0 <_ZdlPv@plt> |
0x405e1c TEST %RBX,%RBX |
0x405e1f JE 405e29 |
0x405e21 MOV %RBX,%RDI |
0x405e24 CALL 4020e0 <_ZdlPv@plt> |
0x405e29 CMPB $0,0x80(%RSP) |
0x405e31 JE 406084 |
0x405e37 MOV 0x180(%RSP),%RSI |
0x405e3f INC %RSI |
0x405e42 MOV %RSI,%RAX |
0x405e45 MOV %RSI,0x180(%RSP) |
0x405e4d CMP 0x200(%RSP),%RSI |
0x405e55 MOV 0xb0(%RSP),%RSI |
0x405e5d JNE 4036a0 |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h: 355 - 432 |
-------------------------------------------------------------------------------- |
355: __c1 = __c2; |
[...] |
396: return __builtin_strlen(__s); |
[...] |
432: return static_cast<char_type*>(__builtin_memcpy(__s1, __s2, __n)); |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h: 389 - 2205 |
-------------------------------------------------------------------------------- |
389: return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer(); |
[...] |
397: if (__p) |
[...] |
1254: return *(this->_M_impl._M_start + __n); |
[...] |
2205: if (__n > _S_max_size(_Tp_alloc_type(__a))) |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_string.h: 204 - 279 |
-------------------------------------------------------------------------------- |
204: : allocator_type(__a), _M_p(__dat) { } |
[...] |
233: { _M_string_length = __length; } |
234: |
235: _GLIBCXX20_CONSTEXPR |
236: pointer |
237: _M_data() const |
238: { return _M_dataplus._M_p; } |
[...] |
279: if (_M_data() == _M_local_data()) |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h: 162 - 183 |
-------------------------------------------------------------------------------- |
162: return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp))); |
[...] |
183: _GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n)); |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h: 585 - 2393 |
-------------------------------------------------------------------------------- |
585: __res %= __m; |
[...] |
2371: random_device() { _M_init("default"); } |
[...] |
2377: { _M_fini(); } |
[...] |
2393: { return this->_M_getval(); } |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.tcc: 330 - 3558 |
-------------------------------------------------------------------------------- |
330: _M_x[0] = __detail::__mod<_UIntType, |
331: __detail::_Shift<_UIntType, __w>::__value>(__sd); |
332: |
333: for (size_t __i = 1; __i < state_size; ++__i) |
334: { |
335: _UIntType __x = _M_x[__i - 1]; |
336: __x ^= __x >> (__w - 2); |
337: __x *= __f; |
338: __x += __detail::__mod<_UIntType, __n>(__i); |
339: _M_x[__i] = __detail::__mod<_UIntType, |
340: __detail::_Shift<_UIntType, __w>::__value>(__x); |
341: } |
342: _M_p = state_size; |
[...] |
404: for (size_t __k = 0; __k < (__n - __m); ++__k) |
405: { |
406: _UIntType __y = ((_M_x[__k] & __upper_mask) |
407: | (_M_x[__k + 1] & __lower_mask)); |
408: _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1) |
409: ^ ((__y & 0x01) ? __a : 0)); |
410: } |
411: |
412: for (size_t __k = (__n - __m); __k < (__n - 1); ++__k) |
413: { |
414: _UIntType __y = ((_M_x[__k] & __upper_mask) |
415: | (_M_x[__k + 1] & __lower_mask)); |
416: _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1) |
417: ^ ((__y & 0x01) ? __a : 0)); |
418: } |
419: |
420: _UIntType __y = ((_M_x[__n - 1] & __upper_mask) |
421: | (_M_x[0] & __lower_mask)); |
422: _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1) |
423: ^ ((__y & 0x01) ? __a : 0)); |
[...] |
458: if (_M_p >= state_size) |
459: _M_gen_rand(); |
460: |
461: // Calculate o(x(i)). |
462: result_type __z = _M_x[_M_p++]; |
463: __z ^= (__z >> __u) & __d; |
464: __z ^= (__z << __s) & __b; |
465: __z ^= (__z << __t) & __c; |
466: __z ^= (__z >> __l); |
[...] |
3557: const _RealT __ret = _RealT(__sum >> __log2_x) / _RealT(__rd); |
3558: if (__ret < _RealT(1.0)) |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h: 739 - 739 |
-------------------------------------------------------------------------------- |
739: __ostream_insert(__out, __s, |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/chrono.h: 218 - 720 |
-------------------------------------------------------------------------------- |
218: static_cast<_CR>(__d.count()) / static_cast<_CR>(_CF::den))); |
[...] |
631: __r += __d.count(); |
[...] |
720: return __cd(__cd(__lhs).count() - __cd(__rhs).count()); |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_construct.h: 133 - 133 |
-------------------------------------------------------------------------------- |
133: ::new(static_cast<void*>(__p)) _Tp(std::forward<_Args>(__args)...); |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h: 923 - 1147 |
-------------------------------------------------------------------------------- |
923: *__first = __val; |
[...] |
1147: if (__n <= 0) |
/usr/lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_uninitialized.h: 946 - 946 |
-------------------------------------------------------------------------------- |
946: ++__first; |
/home/eoseret/Applications/llm-attention/attention_v2.cpp: 26 - 317 |
-------------------------------------------------------------------------------- |
26: for (unsigned int i = 0; i < M; ++i) { |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
[...] |
43: for (int row = 0; row < N; ++row) { |
44: const float *S_row = &S[row * N]; |
45: |
46: float max_val = -FLT_MAX; |
47: for (int idx = 0; idx <= row; ++idx) // vectorised |
48: if (S_row[idx] > max_val) max_val = S_row[idx]; |
49: |
50: float sum = 0.0f; |
51: #pragma clang loop vectorize(enable) |
52: for (int idx = 0; idx <= row; ++idx) // vectorised |
53: sum += expf(S_row[idx] - max_val); |
54: |
55: for (int idx = 0; idx <= row; ++idx) //vectorised |
56: P[row * N + idx] = expf(S_row[idx] - max_val) / sum; |
57: |
58: for (int idx = row + 1; idx < N; ++idx) |
59: P[row * N + idx] = 0.0f; |
60: |
61: D[row] = sum; |
[...] |
98: if (argc < 4) { |
[...] |
144: for (size_t r = 0; r < rept; r++) { |
[...] |
160: std::mt19937 rng(rd()); |
161: std::uniform_real_distribution<float> dist(0.0f, 1.0f); |
162: |
163: for (size_t i = 0; i < elemsX; ++i) h_X[i] = dist(rng); |
164: for (size_t i = 0; i < elemsW; ++i) { |
165: h_WQ[i] = dist(rng); |
166: h_WK[i] = dist(rng); |
167: h_WV[i] = dist(rng); |
[...] |
175: start = std::chrono::steady_clock::now(); |
[...] |
185: end = std::chrono::steady_clock::now(); |
[...] |
194: start = std::chrono::steady_clock::now(); |
[...] |
204: end = std::chrono::steady_clock::now(); |
[...] |
213: start = std::chrono::steady_clock::now(); |
[...] |
223: end = std::chrono::steady_clock::now(); |
[...] |
233: start = std::chrono::steady_clock::now(); |
234: #endif |
235: |
236: for (int i = 0; i < context_size; ++i) |
237: for (int j = 0; j < dim; ++j)// vectorized |
238: h_KT[j * context_size + i] = h_K[i * dim + j]; |
[...] |
245: end = std::chrono::steady_clock::now(); |
[...] |
254: start = std::chrono::steady_clock::now(); |
[...] |
264: end = std::chrono::steady_clock::now(); |
[...] |
273: start = std::chrono::steady_clock::now(); |
[...] |
283: end = std::chrono::steady_clock::now(); |
[...] |
292: start = std::chrono::steady_clock::now(); |
[...] |
302: end = std::chrono::steady_clock::now(); |
303: elapsed[6] += std::chrono::duration_cast<std::chrono::microseconds>(end - start); |
304: #endif |
305: |
306: if (r == rept - 1) { |
307: bool softmax_ok = ValidateSoftmax(h_S.data(), h_P.data(), h_D.data(), context_size); |
308: |
309: std::cout << "Validation results:\n"; |
310: std::cout << " Softmax (rows sum & D) : " << (softmax_ok ? "OK" : "FAILED") << "\n"; |
[...] |
317: if (!(softmax_ok && all_finite)) return 1; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __libc_init_first | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | attention-icx-skl512 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.77 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.74 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | char_traits.h:355-355,char_traits.h:396-396,char_traits.h:432-432,stl_vector.h:389-389,stl_vector.h:397-397,stl_vector.h:2205-2205,basic_string.h:204-204,basic_string.h:233-233,basic_string.h:238-238,basic_string.h:279-279,new_allocator.h:162-162,new_allocator.h:183-183,random.h:585-585,random.h:2371-2371,random.h:2377-2377,random.h:2393-2393,random.tcc:330-330,random.tcc:336-336,random.tcc:339-339,random.tcc:342-342,random.tcc:422-422,ostream.h:739-739,chrono.h:218-218,chrono.h:631-631,chrono.h:720-720,stl_construct.h:133-133,stl_algobase.h:923-923,stl_algobase.h:1147-1147,stl_uninitialized.h:946-946,attention_v2.cpp:30-31,attention_v2.cpp:59-59,attention_v2.cpp:144-144,attention_v2.cpp:160-160,attention_v2.cpp:163-164,attention_v2.cpp:175-175,attention_v2.cpp:185-185,attention_v2.cpp:194-194,attention_v2.cpp:204-204,attention_v2.cpp:213-213,attention_v2.cpp:223-223,attention_v2.cpp:233-233,attention_v2.cpp:245-245,attention_v2.cpp:254-254,attention_v2.cpp:264-264,attention_v2.cpp:273-273,attention_v2.cpp:283-283,attention_v2.cpp:292-292,attention_v2.cpp:302-302,attention_v2.cpp:306-307,attention_v2.cpp:310-310,attention_v2.cpp:317-317 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 177.00 |
| CQA cycles if no scalar integer | 47.00 |
| CQA cycles if FP arith vectorized | 177.00 |
| CQA cycles if fully vectorized | 101.75 |
| Front-end cycles | 177.00 |
| P0 cycles | 74.50 |
| P1 cycles | 74.50 |
| P2 cycles | 104.67 |
| P3 cycles | 104.67 |
| P4 cycles | 142.00 |
| P5 cycles | 74.50 |
| P6 cycles | 74.50 |
| P7 cycles | 104.67 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 583.00 |
| Nb uops | 708.00 |
| Nb loads | 172.00 |
| Nb stores | 80.00 |
| Nb stack references | 72.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 15.39 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1809.00 |
| Bytes stored | 915.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 14.97 |
| Vectorization ratio load | 21.85 |
| Vectorization ratio store | 15.19 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 6.92 |
| Vector-efficiency ratio all | 14.98 |
| Vector-efficiency ratio load | 17.04 |
| Vector-efficiency ratio store | 17.92 |
| Vector-efficiency ratio mul | 12.02 |
| Vector-efficiency ratio add_sub | 12.25 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 11.03 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.77 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.74 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | char_traits.h:355-355,char_traits.h:396-396,char_traits.h:432-432,stl_vector.h:389-389,stl_vector.h:397-397,stl_vector.h:2205-2205,basic_string.h:204-204,basic_string.h:233-233,basic_string.h:238-238,basic_string.h:279-279,new_allocator.h:162-162,new_allocator.h:183-183,random.h:585-585,random.h:2371-2371,random.h:2377-2377,random.h:2393-2393,random.tcc:330-330,random.tcc:336-336,random.tcc:339-339,random.tcc:342-342,random.tcc:422-422,ostream.h:739-739,chrono.h:218-218,chrono.h:631-631,chrono.h:720-720,stl_construct.h:133-133,stl_algobase.h:923-923,stl_algobase.h:1147-1147,stl_uninitialized.h:946-946,attention_v2.cpp:30-31,attention_v2.cpp:59-59,attention_v2.cpp:144-144,attention_v2.cpp:160-160,attention_v2.cpp:163-164,attention_v2.cpp:175-175,attention_v2.cpp:185-185,attention_v2.cpp:194-194,attention_v2.cpp:204-204,attention_v2.cpp:213-213,attention_v2.cpp:223-223,attention_v2.cpp:233-233,attention_v2.cpp:245-245,attention_v2.cpp:254-254,attention_v2.cpp:264-264,attention_v2.cpp:273-273,attention_v2.cpp:283-283,attention_v2.cpp:292-292,attention_v2.cpp:302-302,attention_v2.cpp:306-307,attention_v2.cpp:310-310,attention_v2.cpp:317-317 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 177.00 |
| CQA cycles if no scalar integer | 47.00 |
| CQA cycles if FP arith vectorized | 177.00 |
| CQA cycles if fully vectorized | 101.75 |
| Front-end cycles | 177.00 |
| P0 cycles | 74.50 |
| P1 cycles | 74.50 |
| P2 cycles | 104.67 |
| P3 cycles | 104.67 |
| P4 cycles | 142.00 |
| P5 cycles | 74.50 |
| P6 cycles | 74.50 |
| P7 cycles | 104.67 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 583.00 |
| Nb uops | 708.00 |
| Nb loads | 172.00 |
| Nb stores | 80.00 |
| Nb stack references | 72.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 15.39 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1809.00 |
| Bytes stored | 915.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 14.97 |
| Vectorization ratio load | 21.85 |
| Vectorization ratio store | 15.19 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 6.92 |
| Vector-efficiency ratio all | 14.98 |
| Vector-efficiency ratio load | 17.04 |
| Vector-efficiency ratio store | 17.92 |
| Vector-efficiency ratio mul | 12.02 |
| Vector-efficiency ratio add_sub | 12.25 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 11.03 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:26-317 |
| Module | attention-icx-skl512 |
 |
 |
| nb instructions | 583 |
| nb uops | 708 |
| loop length | 3332 |
| used x86 registers | 13 |
| used mmx registers | 0 |
| used xmm registers | 19 |
| used ymm registers | 12 |
| used zmm registers | 5 |
| nb stack references | 72 |
| micro-operation queue | 177.00 cycles |
| front end | 177.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 74.50 | 74.50 | 104.67 | 104.67 | 142.00 | 74.50 | 74.50 | 104.67 |
| cycles | 74.50 | 74.50 | 104.67 | 104.67 | 142.00 | 74.50 | 74.50 | 104.67 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 177.00 |
| Dispatch | 142.00 |
| Overall L1 | 177.00 |
| all | 9% |
| load | 16% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 72% |
| load | 57% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 14% |
| load | 21% |
| store | 15% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| all | 12% |
| load | 13% |
| store | 10% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 11% |
| all | 44% |
| load | 36% |
| store | 58% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 14% |
| load | 17% |
| store | 17% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 11% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 403910 <main+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMP $0x1,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 4036e1 <main+0x431> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403921 <main+0x671> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40372a <main+0x47a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40376e <main+0x4be> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4037b2 <main+0x502> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPQ $0,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403938 <main+0x688> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403805 <main+0x555> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x108(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403849 <main+0x599> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40388d <main+0x5dd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4038c4 <main+0x614> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JE 403963 <main+0x6b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| JMP 403963 <main+0x6b3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 4036f0 <main+0x440> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0x178(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| SHR $0x3d,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R12,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JNE 406091 <main+0x2de1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CMPQ $0,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a60 <main+0x7b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x178(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4039db <main+0x72b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x178(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a19 <main+0x769> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x1b8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPL $0x1,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JE 403a7b <main+0x7cb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1f8(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| JMP 403a7b <main+0x7cb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| LEA 0x508(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %RAX,0x4f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0x746c7561,0x3(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| MOVL $0x61666564,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| MOVB $0,0x50f(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (1.6%) |
| MOVQ $0x7,0x500(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| LEA 0x4f8(%RSP),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021c0 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x4f8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| LEA 0x508(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP %RAX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 403ade <main+0x82e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 402170 <_ZNSt13random_device9_M_getvalEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x4f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| IMUL $0x6c078965,%RSI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x269,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RCX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26a,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %EDX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x1e,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| XOR %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26b,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RSI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%RDI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26c,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RDI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%R8,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26d,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %R8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%R9,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26e,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %R9D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %R9D,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| IMUL $0x6c078965,%R10D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| ADD $0x26f,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1840(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %EDX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1848(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %ESI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1850(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1858(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1860(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R9D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1868(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R10,0x1870(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVQ $0x270,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403fd0 <main+0xd20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV $0x270,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0x1a8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV $-0x80000000,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| VPBROADCASTQ 0xa5bb(%RIP),%YMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5ba(%RIP),%YMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5b9(%RIP),%YMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5b8(%RIP),%YMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa597(%RIP),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa596(%RIP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa595(%RIP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa594(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0xa294(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0xa288(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| JMP 403de1 <main+0xb31> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV %RDX,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 403ff3 <main+0xd43> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP 4047b8 <main+0x1508> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV $0x270,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV 0x1a8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV $-0x80000000,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4047b8 <main+0x1508> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VPBROADCASTQ 0xa2f2(%RIP),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2f1(%RIP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2f0(%RIP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2ef(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9fef(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9fe3(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VPBROADCASTQ 0xa2be(%RIP),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2bd(%RIP),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2bc(%RIP),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2ba(%RIP),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9fb8(%RIP),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9faa(%RIP),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VPBROADCASTQ 0xa284(%RIP),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa282(%RIP),%XMM20 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa280(%RIP),%XMM21 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa27e(%RIP),%XMM22 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9f7c(%RIP),%XMM23 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9f6e(%RIP),%XMM24 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| JMP 4040b9 <main+0xe09> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV %RDX,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVUPS 0x4c0(%RSP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x4a0(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0x140(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBD 0x9ac9(%RIP),%YMM7 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x9804(%RIP),%YMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x9818(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9aae(%RIP),%ZMM12 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x9aa5(%RIP),%YMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 40483d <main+0x158d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM11,0x4a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM10,0x4c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x8(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x480(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x460(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0xd8(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVDQU 0x1c0(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x9831(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x956c(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x9580(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9816(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x980d(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 404add <main+0x182d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x460(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x480(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x10(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x440(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x420(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVDQU 0x1c0(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x9591(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x92cc(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x92e0(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9576(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x956d(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 404d7d <main+0x1acd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x420(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x440(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x18(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| ADD $0x1c,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JMP 404fd9 <main+0x1d29> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x150(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x20(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| KMOVW 0x116(%RSP),%K0 | 3 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 2 | 1 | N/A |
| KMOVD %K0,%EAX | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x400(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x3e0(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVDQU 0x320(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| MOV 0xc8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBD 0x90f1(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x8e2c(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x8e40(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x90d6(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x90cd(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 40521d <main+0x1f6d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x3e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x400(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x28(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x218(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| LEA 0x1c(%RAX),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x1,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x2c0(%RSP),%ZMM21 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (100.0%) |
| VMOVUPS 0x280(%RSP),%ZMM22 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (100.0%) |
| JMP 4054e5 <main+0x2235> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %ZMM22,0x280(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (100.0%) |
| VMOVUPS %ZMM21,0x2c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (100.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x218(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x30(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0x120(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x208(%RSP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x3c0(%RSP),%YMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0x140(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x3a0(%RSP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VPBROADCASTD 0x8610(%RIP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| MOV 0xe8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBQ 0x88ba(%RIP),%ZMM10 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x88b1(%RIP),%YMM11 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 405a3d <main+0x278d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM9,0x3a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM8,0x3c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x38(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| MOVB $0x1,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (1.6%) |
| MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| CMP 0x210(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 405d65 <main+0x2ab5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVSS 0x8384(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| CALL 402d90 <_Z15ValidateSoftmaxPKfS0_S0_if> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %AL,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e3e8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x14,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e3fd,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1b,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVZX 0x80(%RSP),%ECX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (1.6%) |
| TEST %CL,%CL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x40e41c,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x40e419,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| CMOVNE %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR $0x1,%AL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOVZX %AL,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA 0x2(,%RAX,4),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e38a,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e423,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x15,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e439,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x3,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e38a,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPB $0,0x80(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (1.6%) |
| MOV 0x160(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CMOVE %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 4020d0 <_ZNSt13random_device7_M_finiEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405d7f <main+0x2acf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405d9b <main+0x2aeb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x138(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dba <main+0x2b0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dcc <main+0x2b1c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dde <main+0x2b2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x108(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dfd <main+0x2b4d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e0f <main+0x2b5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e1c <main+0x2b6c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e29 <main+0x2b79> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPB $0,0x80(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (1.6%) |
| JE 406084 <main+0x2dd4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| INC %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RSI,0x180(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| CMP 0x200(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| JNE 4036a0 <main+0x3f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:26-317 |
| Module | attention-icx-skl512 |
|
|
| nb instructions | 583 |
| nb uops | 708 |
| loop length | 3332 |
| used x86 registers | 13 |
| used mmx registers | 0 |
| used xmm registers | 19 |
| used ymm registers | 12 |
| used zmm registers | 5 |
| nb stack references | 72 |
| micro-operation queue | 177.00 cycles |
| front end | 177.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 74.50 | 74.50 | 104.67 | 104.67 | 142.00 | 74.50 | 74.50 | 104.67 |
| cycles | 74.50 | 74.50 | 104.67 | 104.67 | 142.00 | 74.50 | 74.50 | 104.67 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 177.00 |
| Dispatch | 142.00 |
| Overall L1 | 177.00 |
| all | 9% |
| load | 16% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 72% |
| load | 57% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 14% |
| load | 21% |
| store | 15% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 6% |
| all | 12% |
| load | 13% |
| store | 10% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 11% |
| all | 44% |
| load | 36% |
| store | 58% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 14% |
| load | 17% |
| store | 17% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 11% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 403910 <main+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMP $0x1,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 4036e1 <main+0x431> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403921 <main+0x671> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40372a <main+0x47a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40376e <main+0x4be> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x168(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4037b2 <main+0x502> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPQ $0,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403938 <main+0x688> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403805 <main+0x555> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x108(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403849 <main+0x599> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 40388d <main+0x5dd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4038c4 <main+0x614> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JE 403963 <main+0x6b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| JMP 403963 <main+0x6b3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 4036f0 <main+0x440> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0x178(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| SHR $0x3d,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R12,0x138(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JNE 406091 <main+0x2de1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CMPQ $0,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a60 <main+0x7b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x178(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4039db <main+0x72b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0x1,0x178(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a19 <main+0x769> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x1b8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 402100 <_Znwm@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPL $0x1,0xe0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| JE 403a7b <main+0x7cb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| ADD $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV 0x1f8(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 406bf0 <_intel_fast_memset> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| JMP 403a7b <main+0x7cb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| LEA 0x508(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %RAX,0x4f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVL $0x746c7561,0x3(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| MOVL $0x61666564,(%RAX) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| MOVB $0,0x50f(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (1.6%) |
| MOVQ $0x7,0x500(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| LEA 0x4f8(%RSP),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021c0 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x4f8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| LEA 0x508(%RSP),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP %RAX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 403ade <main+0x82e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 402170 <_ZNSt13random_device9_M_getvalEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RAX,0x4f8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| IMUL $0x6c078965,%RSI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x269,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RCX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26a,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %EDX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x1e,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| XOR %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26b,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RSI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%RDI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26c,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %RDI,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%R8,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26d,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %R8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL $0x6c078965,%R9,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| ADD $0x26e,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| MOV %R9D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| SHR $0x1e,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %R9D,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| IMUL $0x6c078965,%R10D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| ADD $0x26f,%R10D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1840(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %EDX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1848(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %ESI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1850(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1858(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1860(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R9D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x1868(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %R10,0x1870(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOVQ $0x270,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (6.3%) |
| CMPQ $0,0xb0(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403fd0 <main+0xd20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV $0x270,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0x1a8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV $-0x80000000,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| VPBROADCASTQ 0xa5bb(%RIP),%YMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5ba(%RIP),%YMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5b9(%RIP),%YMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa5b8(%RIP),%YMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa597(%RIP),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa596(%RIP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa595(%RIP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa594(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0xa294(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0xa288(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| JMP 403de1 <main+0xb31> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV %RDX,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 403ff3 <main+0xd43> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP 4047b8 <main+0x1508> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV $0x270,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV 0x1a8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV $-0x80000000,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CMPQ $0,0x148(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4047b8 <main+0x1508> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VPBROADCASTQ 0xa2f2(%RIP),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2f1(%RIP),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2f0(%RIP),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2ef(%RIP),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9fef(%RIP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9fe3(%RIP),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VPBROADCASTQ 0xa2be(%RIP),%XMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2bd(%RIP),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2bc(%RIP),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa2ba(%RIP),%XMM16 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9fb8(%RIP),%XMM17 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9faa(%RIP),%XMM18 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VPBROADCASTQ 0xa284(%RIP),%XMM19 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa282(%RIP),%XMM20 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa280(%RIP),%XMM21 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPBROADCASTQ 0xa27e(%RIP),%XMM22 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VMOVSS 0x9f7c(%RIP),%XMM23 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| VMOVSS 0x9f6e(%RIP),%XMM24 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| JMP 4040b9 <main+0xe09> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV %RDX,0x1878(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVUPS 0x4c0(%RSP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x4a0(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0x140(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBD 0x9ac9(%RIP),%YMM7 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x9804(%RIP),%YMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x9818(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9aae(%RIP),%ZMM12 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x9aa5(%RIP),%YMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 40483d <main+0x158d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM11,0x4a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM10,0x4c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x8(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x480(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x460(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0xd8(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVDQU 0x1c0(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x9831(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x956c(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x9580(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9816(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x980d(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 404add <main+0x182d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x460(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x480(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x10(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x440(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x420(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVDQU 0x1c0(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBD 0x9591(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x92cc(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x92e0(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x9576(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x956d(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 404d7d <main+0x1acd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x420(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x440(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x18(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| ADD $0x1c,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JMP 404fd9 <main+0x1d29> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x150(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x20(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| KMOVW 0x116(%RSP),%K0 | 3 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 2 | 1 | N/A |
| KMOVD %K0,%EAX | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x400(%RSP),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVUPS 0x3e0(%RSP),%YMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VMOVDQU 0x320(%RSP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| MOV 0xc8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBD 0x90f1(%RIP),%YMM8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x8e2c(%RIP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| VMOVDQU 0x8e40(%RIP),%YMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VPMOVSXBQ 0x90d6(%RIP),%ZMM13 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x90cd(%RIP),%YMM14 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 40521d <main+0x1f6d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM12,0x3e0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM11,0x400(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x28(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x218(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| LEA 0x1c(%RAX),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x1,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV %RCX,0x118(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| VMOVUPS 0x2c0(%RSP),%ZMM21 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (100.0%) |
| VMOVUPS 0x280(%RSP),%ZMM22 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (100.0%) |
| JMP 4054e5 <main+0x2235> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %ZMM22,0x280(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (100.0%) |
| VMOVUPS %ZMM21,0x2c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (100.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x218(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x30(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
| MOV 0x120(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV 0x208(%RSP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x3c0(%RSP),%YMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| MOV 0x140(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVUPS 0x3a0(%RSP),%YMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 | vect (50.0%) |
| VPBROADCASTD 0x8610(%RIP),%YMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
| MOV 0xe8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VPMOVSXBQ 0x88ba(%RIP),%ZMM10 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x88b1(%RIP),%YMM11 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 1 | 0 | 0 | 3 | 1 | vect (12.5%) |
| JMP 405a3d <main+0x278d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| VMOVUPS %YMM9,0x3a0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VMOVUPS %YMM8,0x3c0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | vect (50.0%) |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402160 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| SUB 0x80(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | scal (12.5%) |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| ADD %RDX,0x38(%RSP) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 | scal (12.5%) |
| MOVB $0x1,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 | scal (1.6%) |
| MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| CMP 0x210(%RSP),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| JNE 405d65 <main+0x2ab5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| VMOVSS 0x8384(%RIP),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (6.3%) |
| CALL 402d90 <_Z15ValidateSoftmaxPKfS0_S0_if> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV %AL,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e3e8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x14,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e3fd,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1b,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOVZX 0x80(%RSP),%ECX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (1.6%) |
| TEST %CL,%CL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x40e41c,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x40e419,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| CMOVNE %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| XOR $0x1,%AL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOVZX %AL,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LEA 0x2(,%RAX,4),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e38a,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e423,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x15,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e439,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x3,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV $0x415140,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| MOV $0x40e38a,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV $0x1,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CALL 402130 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPB $0,0x80(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (1.6%) |
| MOV 0x160(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| MOV $0x1,%ECX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (6.3%) |
| CMOVE %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 | N/A |
| MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| LEA 0x1880(%RSP),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CALL 4020d0 <_ZNSt13random_device7_M_finiEv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405d7f <main+0x2acf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xa0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405d9b <main+0x2aeb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x138(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dba <main+0x2b0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dcc <main+0x2b1c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dde <main+0x2b2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0x108(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405dfd <main+0x2b4d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e0f <main+0x2b5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e1c <main+0x2b6c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 405e29 <main+0x2b79> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (12.5%) |
| CALL 4020e0 <_ZdlPv@plt> | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 | N/A |
| CMPB $0,0x80(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (1.6%) |
| JE 406084 <main+0x2dd4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| INC %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %RSI,0x180(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (12.5%) |
| CMP 0x200(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| JNE 4036a0 <main+0x3f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |