| Function: _intel_fast_memset | Module: attention-icx-skl512 | Source: :0-0 | Coverage (incl. loops): 0.07% | (excl. loops): 0.07% |
|---|
| Function: _intel_fast_memset | Module: attention-icx-skl512 | Source: :0-0 | Coverage (incl. loops): 0.07% | (excl. loops): 0.07% |
|---|
*** This Panel is Intentionally Left Blank. *** It is due to a lack of debug symbols in the given object |
0x406bf0 ENDBR64 |
0x406bf4 MOV 0xe77d(%RIP),%RAX |
0x406bfb TEST %RAX,%RAX |
0x406bfe JE 406c10 |
0x406c04 JMP %RAX |
0x406c06 NOPW %CS:(%RAX,%RAX,1) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __libc_init_first | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | attention-icx-skl512 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.07% of application time for run run_0
| Source file and lines | |
| Module | attention-icx-skl512 |
| nb instructions | 5 |
| nb uops | 4 |
| loop length | 22 |
| used x86 registers | 1 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 1.00 cycles |
| front end | 1.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 0.50 | 0.50 | 0.50 | 0.00 | 0.50 | 1.00 | 0.00 |
| cycles | 1.00 | 0.50 | 0.50 | 0.50 | 0.00 | 0.50 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 1.00 |
| Dispatch | 1.00 |
| Overall L1 | 1.00 |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ENDBR64 | N/A | |||||||||||
| MOV 0xe77d(%RIP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| JE 406c10 <__real_memset_impl_setup> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.07% of application time for run run_0
| Source file and lines | |
| Module | attention-icx-skl512 |
| nb instructions | 5 |
| nb uops | 4 |
| loop length | 22 |
| used x86 registers | 1 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 1.00 cycles |
| front end | 1.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 0.50 | 0.50 | 0.50 | 0.00 | 0.50 | 1.00 | 0.00 |
| cycles | 1.00 | 0.50 | 0.50 | 0.50 | 0.00 | 0.50 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 1.00 |
| Dispatch | 1.00 |
| Overall L1 | 1.00 |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ENDBR64 | N/A | |||||||||||
| MOV 0xe77d(%RIP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| JE 406c10 <__real_memset_impl_setup> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ○_intel_fast_memset | 0.07 | 0.01 |
