| Loop Id: 47 | Module: attention-icx-skl256 | Source: attention_v2.cpp:27-33 | Coverage: 0.68% |
|---|
| Loop Id: 47 | Module: attention-icx-skl256 | Source: attention_v2.cpp:27-33 | Coverage: 0.68% |
|---|
0x4046a0 ADD %EDX,%EDI |
0x4046a2 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
0x4046a6 MOV 0xd8(%RSP),%R8 |
0x4046ae VMOVSS %XMM0,(%R8,%RDI,4) |
0x4046b4 LEA 0x1(%RSI),%RDI |
0x4046b8 CMP 0x158(%RSP),%RSI |
0x4046c0 MOV %RDI,%RSI |
0x4046c3 JE 404680 |
0x4046c5 TEST %R15,%R15 |
0x4046c8 JE 404770 |
0x4046ce MOV %ESI,%EDI |
0x4046d0 VPBROADCASTD %ESI,%XMM1 |
0x4046d6 VXORPS %XMM0,%XMM0,%XMM0 |
0x4046da XOR %R8D,%R8D |
0x4046dd NOPL (%RAX) |
(48) 0x4046e0 LEA (%RAX,%R8,1),%R9D |
(48) 0x4046e4 VPBROADCASTD %R9D,%XMM2 |
(48) 0x4046ea LEA (%RBX,%R12,1),%R9 |
(48) 0x4046ee VPCMPEQB %XMM0,%XMM0,%K1 |
(48) 0x4046f4 VPXOR %XMM3,%XMM3,%XMM3 |
(48) 0x4046f8 VPBROADCASTD %R8D,%XMM4 |
(48) 0x4046fe VPADDD %XMM6,%XMM2,%XMM2 |
(48) 0x404702 VPADDD %XMM7,%XMM4,%XMM4 |
(48) 0x404706 VPMULLD %XMM4,%XMM5,%XMM4 |
(48) 0x40470b VPADDD %XMM4,%XMM1,%XMM4 |
(48) 0x40470f LEA (%R11,%R12,1),%R10 |
(48) 0x404713 VPSUBD %XMM8,%XMM4,%XMM4 |
(48) 0x404718 VPCMPEQB %XMM0,%XMM0,%K2 |
(48) 0x40471e VGATHERDPS (%R9,%XMM2,4),%XMM3{%K1} |
(48) 0x404725 VXORPS %XMM2,%XMM2,%XMM2 |
(48) 0x404729 VGATHERDPS (%R10,%XMM4,4),%XMM2{%K2} |
(48) 0x404730 VCVTPS2PD %XMM3,%YMM3 |
(48) 0x404734 VCVTPS2PD %XMM2,%YMM2 |
(48) 0x404738 VFMADD231PD %YMM2,%YMM3,%YMM0 |
(48) 0x40473d ADD $0x4,%R8 |
(48) 0x404741 CMP %R15,%R8 |
(48) 0x404744 JB 4046e0 |
0x404746 VEXTRACTF128 $0x1,%YMM0,%XMM1 |
0x40474c VADDPD %XMM1,%XMM0,%XMM0 |
0x404750 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
0x404755 VADDSD %XMM1,%XMM0,%XMM0 |
0x404759 MOV %R15,%R8 |
0x40475c TESTB $0x1,0xe4(%RSP) |
0x404764 JNE 4046a0 |
0x40476a JMP 404777 |
0x404770 VXORPS %XMM0,%XMM0,%XMM0 |
0x404774 XOR %R8D,%R8D |
0x404777 MOV %R13,%RDI |
0x40477a IMUL %R8,%RDI |
0x40477e ADD %RSI,%RDI |
0x404781 MOV 0x100(%RSP),%R10 |
0x404789 NOPL (%RAX) |
(20) 0x404790 LEA (%RAX,%R8,1),%R9D |
(20) 0x404794 VMOVSS (%RBX,%R9,4),%XMM1 |
(20) 0x40479a VCVTSS2SD %XMM1,%XMM1,%XMM1 |
(20) 0x40479e MOV %EDI,%R9D |
(20) 0x4047a1 VMOVSS (%R10,%R9,4),%XMM2 |
(20) 0x4047a7 VCVTSS2SD %XMM2,%XMM2,%XMM2 |
(20) 0x4047ab VFMADD231SD %XMM2,%XMM1,%XMM0 |
(20) 0x4047b0 INC %R8 |
(20) 0x4047b3 ADD %R13,%RDI |
(20) 0x4047b6 CMP %R8,%R14 |
(20) 0x4047b9 JNE 404790 |
0x4047bb MOV %ESI,%EDI |
0x4047bd JMP 4046a0 |
/home/eoseret/Applications/llm-attention/attention_v2.cpp: 27 - 33 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __libc_init_first | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | attention-icx-skl256 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.68 |
| CQA speedup if FP arith vectorized | 1.42 |
| CQA speedup if fully vectorized | 10.55 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.61 |
| Bottlenecks | |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 6.17 |
| CQA cycles if no scalar integer | 3.67 |
| CQA cycles if FP arith vectorized | 4.33 |
| CQA cycles if fully vectorized | 0.58 |
| Front-end cycles | 6.17 |
| P0 cycles | 3.75 |
| P1 cycles | 3.75 |
| P2 cycles | 1.67 |
| P3 cycles | 1.67 |
| P4 cycles | 1.00 |
| P5 cycles | 3.83 |
| P6 cycles | 3.67 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 23.67 |
| Nb uops | 24.67 |
| Nb loads | 3.33 |
| Nb stores | 1.00 |
| Nb stack references | 3.33 |
| FLOP/cycle | 0.32 |
| Nb FLOP add-sub | 2.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 4.33 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 22.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.33 |
| Stride indirect | 1.33 |
| Vectorization ratio all | 30.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 50.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 35.12 |
| Vector-efficiency ratio all | 14.84 |
| Vector-efficiency ratio load | 11.28 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 18.75 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 15.88 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.82 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 13.22 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.82 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 5.00 |
| CQA cycles if no scalar integer | 2.75 |
| CQA cycles if FP arith vectorized | 5.00 |
| CQA cycles if fully vectorized | 0.38 |
| Front-end cycles | 5.00 |
| P0 cycles | 2.75 |
| P1 cycles | 2.75 |
| P2 cycles | 1.50 |
| P3 cycles | 1.50 |
| P4 cycles | 1.00 |
| P5 cycles | 2.75 |
| P6 cycles | 2.75 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 20.00 |
| Nb loads | 3.00 |
| Nb stores | 1.00 |
| Nb stack references | 3.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 5.60 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 24.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 16.67 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 25.00 |
| Vector-efficiency ratio all | 13.54 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 15.63 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.82 |
| CQA speedup if FP arith vectorized | 1.94 |
| CQA speedup if fully vectorized | 11.27 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.63 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.75 |
| CQA cycles if no scalar integer | 4.25 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 0.69 |
| Front-end cycles | 7.75 |
| P0 cycles | 4.75 |
| P1 cycles | 4.75 |
| P2 cycles | 2.00 |
| P3 cycles | 2.00 |
| P4 cycles | 1.00 |
| P5 cycles | 4.75 |
| P6 cycles | 4.75 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 30.00 |
| Nb uops | 31.00 |
| Nb loads | 4.00 |
| Nb stores | 1.00 |
| Nb stack references | 4.00 |
| FLOP/cycle | 0.39 |
| Nb FLOP add-sub | 3.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 3.74 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 25.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 33.33 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 50.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 37.50 |
| Vector-efficiency ratio all | 14.71 |
| Vector-efficiency ratio load | 8.85 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 18.75 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 15.04 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.44 |
| CQA speedup if FP arith vectorized | 1.44 |
| CQA speedup if fully vectorized | 8.36 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.44 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 5.75 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 0.69 |
| Front-end cycles | 5.75 |
| P0 cycles | 3.75 |
| P1 cycles | 3.75 |
| P2 cycles | 1.50 |
| P3 cycles | 1.50 |
| P4 cycles | 1.00 |
| P5 cycles | 4.00 |
| P6 cycles | 3.50 |
| P7 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 22.00 |
| Nb uops | 23.00 |
| Nb loads | 3.00 |
| Nb stores | 1.00 |
| Nb stack references | 3.00 |
| FLOP/cycle | 0.52 |
| Nb FLOP add-sub | 3.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 3.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 17.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 40.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 50.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 42.86 |
| Vector-efficiency ratio all | 16.25 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 18.75 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 16.96 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-icx-skl256 |
| nb instructions | 23.67 |
| nb uops | 24.67 |
| loop length | 106.33 |
| used x86 registers | 8.33 |
| used mmx registers | 0 |
| used xmm registers | 1.67 |
| used ymm registers | 0.67 |
| used zmm registers | 0 |
| nb stack references | 3.33 |
| micro-operation queue | 6.17 cycles |
| front end | 6.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 3.75 | 3.75 | 1.67 | 1.67 | 1.00 | 3.83 | 3.67 | 1.00 |
| cycles | 3.75 | 3.75 | 1.67 | 1.67 | 1.00 | 3.83 | 3.67 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 6.17 |
| Dispatch | 3.83 |
| Data deps. | 0.00 |
| Overall L1 | 6.17 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 49% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 66% |
| all | 30% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 35% |
| all | 10% |
| load | 11% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 17% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 20% |
| all | 14% |
| load | 11% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 15% |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-icx-skl256 |
| nb instructions | 19 |
| nb uops | 20 |
| loop length | 85 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 3 |
| micro-operation queue | 5.00 cycles |
| front end | 5.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.75 | 2.75 | 1.50 | 1.50 | 1.00 | 2.75 | 2.75 | 1.00 |
| cycles | 2.75 | 2.75 | 1.50 | 1.50 | 1.00 | 2.75 | 2.75 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 5.00 |
| Dispatch | 2.75 |
| Data deps. | 0.00 |
| Overall L1 | 5.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 33% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 16% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 12% |
| all | 14% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 18% |
| all | 13% |
| load | 12% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 15% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ADD %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM0,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP 0x158(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 404680 <main+0x1560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| TEST %R15,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 404770 <main+0x1650> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| IMUL %R8,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RSI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JMP 4046a0 <main+0x1580> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-icx-skl256 |
| nb instructions | 30 |
| nb uops | 31 |
| loop length | 134 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 4 |
| micro-operation queue | 7.75 cycles |
| front end | 7.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 4.75 | 4.75 | 2.00 | 2.00 | 1.00 | 4.75 | 4.75 | 1.00 |
| cycles | 4.75 | 4.75 | 2.00 | 2.00 | 1.00 | 4.75 | 4.75 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 7.75 |
| Dispatch | 4.75 |
| Data deps. | 0.00 |
| Overall L1 | 7.75 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 57% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 75% |
| all | 33% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 37% |
| all | 9% |
| load | 8% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 8% |
| all | 18% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 21% |
| all | 14% |
| load | 8% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 15% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ADD %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM0,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP 0x158(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 404680 <main+0x1560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| TEST %R15,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 404770 <main+0x1650> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VPBROADCASTD %ESI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R15,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| TESTB $0x1,0xe4(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (1.6%) |
| JNE 4046a0 <main+0x1580> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| JMP 404777 <main+0x1657> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| IMUL %R8,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RSI,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | scal (12.5%) |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JMP 4046a0 <main+0x1580> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-33 |
| Module | attention-icx-skl256 |
| nb instructions | 22 |
| nb uops | 23 |
| loop length | 100 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 3 |
| micro-operation queue | 5.75 cycles |
| front end | 5.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 3.75 | 3.75 | 1.50 | 1.50 | 1.00 | 4.00 | 3.50 | 1.00 |
| cycles | 3.75 | 3.75 | 1.50 | 1.50 | 1.00 | 4.00 | 3.50 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 5.75 |
| Dispatch | 4.00 |
| Data deps. | 0.00 |
| Overall L1 | 5.75 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 57% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 75% |
| all | 40% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 42% |
| all | 10% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 18% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 21% |
| all | 16% |
| load | 12% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 18% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 16% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ADD %EDX,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | N/A |
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 5 | 1 | scal (12.5%) |
| MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 | N/A |
| VMOVSS %XMM0,(%R8,%RDI,4) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 | scal (6.3%) |
| LEA 0x1(%RSI),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| CMP 0x158(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| JE 404680 <main+0x1560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| TEST %R15,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 | scal (12.5%) |
| JE 404770 <main+0x1650> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VPBROADCASTD %ESI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | vect (25.0%) |
| VADDSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
| MOV %R15,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
| TESTB $0x1,0xe4(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 | N/A |
| JNE 4046a0 <main+0x1580> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 | N/A |
