OV - attention-clang-skl512

	Function: main	Module: attention-clang-skl512	Source: attention_v2.cpp:26-332 [...]	Coverage (incl. loops): 91.83% \| (excl. loops): 0.00%

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_construct.h: 133 - 133

--------------------------------------------------------------------------------

133:       ::new(static_cast<void*>(__p)) _Tp(std::forward<_Args>(__args)...);

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h: 375 - 2206

--------------------------------------------------------------------------------

375: 	ptrdiff_t __n = _M_impl._M_end_of_storage - _M_impl._M_start;

[...]

389: 	return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer();

[...]

397: 	if (__p)

[...]

409: 	this->_M_impl._M_end_of_storage = this->_M_impl._M_start + __n;

[...]

2205: 	if (__n > _S_max_size(_Tp_alloc_type(__a)))

2206: 	  __throw_length_error(

/usr/include/stdlib.h: 487 - 487

--------------------------------------------------------------------------------

487:   return (int) strtol (__nptr, (char **) NULL, 10);

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_uninitialized.h: 946 - 946

--------------------------------------------------------------------------------

946: 	      ++__first;

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h: 585 - 2393

--------------------------------------------------------------------------------

585: 	    __res %= __m;

[...]

2371:     random_device() { _M_init("default"); }

[...]

2377:     { _M_fini(); }

[...]

2393:     { return this->_M_getval(); }

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.tcc: 330 - 3558

--------------------------------------------------------------------------------

330:       _M_x[0] = __detail::__mod<_UIntType,

331: 	__detail::_Shift<_UIntType, __w>::__value>(__sd);

332:

333:       for (size_t __i = 1; __i < state_size; ++__i)

334: 	{

335: 	  _UIntType __x = _M_x[__i - 1];

336: 	  __x ^= __x >> (__w - 2);

337: 	  __x *= __f;

338: 	  __x += __detail::__mod<_UIntType, __n>(__i);

339: 	  _M_x[__i] = __detail::__mod<_UIntType,

340: 	    __detail::_Shift<_UIntType, __w>::__value>(__x);

341: 	}

342:       _M_p = state_size;

[...]

404:       for (size_t __k = 0; __k < (__n - __m); ++__k)

405:         {

406: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

407: 			   | (_M_x[__k + 1] & __lower_mask));

408: 	  _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1)

409: 		       ^ ((__y & 0x01) ? __a : 0));

410:         }

411:

412:       for (size_t __k = (__n - __m); __k < (__n - 1); ++__k)

413: 	{

414: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

415: 			   | (_M_x[__k + 1] & __lower_mask));

416: 	  _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1)

417: 		       ^ ((__y & 0x01) ? __a : 0));

418: 	}

419:

420:       _UIntType __y = ((_M_x[__n - 1] & __upper_mask)

421: 		       | (_M_x[0] & __lower_mask));

422:       _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1)

423: 		       ^ ((__y & 0x01) ? __a : 0));

[...]

458:       if (_M_p >= state_size)

459: 	_M_gen_rand();

460:

461:       // Calculate o(x(i)).

462:       result_type __z = _M_x[_M_p++];

463:       __z ^= (__z >> __u) & __d;

464:       __z ^= (__z << __s) & __b;

465:       __z ^= (__z << __t) & __c;

466:       __z ^= (__z >> __l);

[...]

3557: 	  const _RealT __ret = _RealT(__sum >> __log2_x) / _RealT(__rd);

3558: 	  if (__ret < _RealT(1.0))

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_ios.h: 148 - 168

--------------------------------------------------------------------------------

148:       { return _M_streambuf_state; }

[...]

168:       { this->clear(this->rdstate() | __state); }

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h: 175 - 739

--------------------------------------------------------------------------------

175:       { return _M_insert(__n); }

[...]

736:       if (!__s)

737: 	__out.setstate(ios_base::badbit);

738:       else

739: 	__ostream_insert(__out, __s,

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h: 923 - 1147

--------------------------------------------------------------------------------

923: 	*__first = __val;

[...]

1147:       if (__n <= 0)

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/chrono.h: 218 - 720

--------------------------------------------------------------------------------

218: 	      static_cast<_CR>(__d.count()) / static_cast<_CR>(_CF::den)));

[...]

631: 	  __r += __d.count();

[...]

720: 	return __cd(__cd(__lhs).count() - __cd(__rhs).count());

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ios_base.h: 198 - 198

--------------------------------------------------------------------------------

198:   { return _Ios_Iostate(static_cast<int>(__a) | static_cast<int>(__b)); }

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h: 162 - 183

--------------------------------------------------------------------------------

162: 	  return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

183: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/home/eoseret/Applications/llm-attention/attention_v2.cpp: 26 - 332

--------------------------------------------------------------------------------

26:    for (unsigned int i = 0; i < M; ++i) {

27:       for (unsigned int j = 0; j < N; ++j) {  //vectorized

28:          double sum = 0.0;

29: #pragma clang loop vectorize(enable)

30:          for (unsigned int k = 0; k < K; ++k) { //vectorized

31:             sum += (double)A[i * K + k] * (double)B[k * N + j];

32:          }

33:          C[i * N + j] = alpha * static_cast<float>(sum);

[...]

43:    for (int row = 0; row < N; ++row) {

44:       const float *S_row = &S[row * N];

45:

46:       float max_val = -FLT_MAX;

47:       for (int idx = 0; idx <= row; ++idx) // vectorised

48:          if (S_row[idx] > max_val) max_val = S_row[idx];

49:

50:       float sum = 0.0f;

51: #pragma clang loop vectorize(enable)

52:       for (int idx = 0; idx <= row; ++idx) // vectorised

53:          sum += expf(S_row[idx] - max_val);

54:

55:       for (int idx = 0; idx <= row; ++idx)  //vectorised

56:          P[row * N + idx] = expf(S_row[idx] - max_val) / sum;

57:

58:       for (int idx = row + 1; idx < N; ++idx)

59:          P[row * N + idx] = 0.0f;

60:

61:       D[row] = sum;

[...]

97: {

98:    if (argc < 4) {

99:       std::cerr << "Usage: " << argv[0] << " <context_size> <dim> <rept>\n";

100:       return 1;

101:    }

102:

103:    int context_size = std::atoi(argv[1]);

104:    int dim = std::atoi(argv[2]);

105:    int rept = std::atoi(argv[3]);

106:

107:    if (context_size <= 0 || dim <= 0) {

[...]

144:    for (size_t r = 0; r < rept; r++) {

[...]

160:       std::mt19937 rng(rd());

161:       std::uniform_real_distribution<float> dist(0.0f, 1.0f);

162:

163:       for (size_t i = 0; i < elemsX; ++i) h_X[i] = dist(rng);

164:       for (size_t i = 0; i < elemsW; ++i) {

165:          h_WQ[i] = dist(rng);

166:          h_WK[i] = dist(rng);

167:          h_WV[i] = dist(rng);

[...]

175:       start = std::chrono::steady_clock::now();

[...]

185:       end = std::chrono::steady_clock::now();

[...]

194:       start = std::chrono::steady_clock::now();

[...]

204:       end = std::chrono::steady_clock::now();

[...]

213:       start = std::chrono::steady_clock::now();

[...]

223:       end = std::chrono::steady_clock::now();

[...]

233:       start = std::chrono::steady_clock::now();

234: #endif

235:

236:       for (int i = 0; i < context_size; ++i)

237:          for (int j = 0; j < dim; ++j)// vectorized

238:             h_KT[j * context_size + i] = h_K[i * dim + j];

[...]

245:       end = std::chrono::steady_clock::now();

[...]

254:       start = std::chrono::steady_clock::now();

[...]

264:       end = std::chrono::steady_clock::now();

[...]

273:       start = std::chrono::steady_clock::now();

[...]

283:       end = std::chrono::steady_clock::now();

[...]

292:       start = std::chrono::steady_clock::now();

[...]

302:       end = std::chrono::steady_clock::now();

303:       elapsed[6] += std::chrono::duration_cast<std::chrono::microseconds>(end - start);

304: #endif

305:

306:       if (r == rept - 1) {

307:          bool softmax_ok = ValidateSoftmax(h_S.data(), h_P.data(), h_D.data(), context_size);

308:

309:          std::cout << "Validation results:\n";

310:          std::cout << "  Softmax (rows sum & D) : " << (softmax_ok ? "OK" : "FAILED") << "\n";

[...]

332: }

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h: 355 - 432

--------------------------------------------------------------------------------

355: 	__c1 = __c2;

[...]

396: 	return __builtin_strlen(__s);

[...]

432: 	return static_cast<char_type*>(__builtin_memcpy(__s1, __s2, __n));

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_string.h: 204 - 304

--------------------------------------------------------------------------------

204: 	: allocator_type(__a), _M_p(__dat) { }

[...]

233:       { _M_string_length = __length; }

234:

235:       _GLIBCXX20_CONSTEXPR

236:       pointer

237:       _M_data() const

238:       { return _M_dataplus._M_p; }

[...]

279: 	if (_M_data() == _M_local_data())

[...]

298: 	  _M_destroy(_M_allocated_capacity);

[...]

304:       { _Alloc_traits::deallocate(_M_get_allocator(), _M_data(), __size + 1); }

0x25a0 PUSH	%RBP

0x25a1 MOV	%RSP,%RBP

0x25a4 PUSH	%R15

0x25a6 PUSH	%R14

0x25a8 PUSH	%R13

0x25aa PUSH	%R12

0x25ac PUSH	%RBX

0x25ad AND	$-0x40,%RSP

0x25b1 SUB	$0x2b40,%RSP

0x25b8 MOV	%RSI,%RBX

0x25bb MOV	%FS:0x28,%RAX

0x25c4 MOV	%RAX,0x2b00(%RSP)

0x25cc CMP	$0x3,%EDI

0x25cf JG	2617

0x25d1 MOV	0x5a08(%RIP),%R14

0x25d8 LEA	0x3bbd(%RIP),%RSI

0x25df MOV	$0x7,%EDX

0x25e4 MOV	%R14,%RDI

0x25e7 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x25ec MOV	(%RBX),%RBX

0x25ef TEST	%RBX,%RBX

0x25f2 JE	57af

0x25f8 MOV	%RBX,%RDI

0x25fb CALL	1050 <strlen@plt>

0x2600 MOV	0x59d9(%RIP),%RDI

0x2607 MOV	%RBX,%RSI

0x260a MOV	%RAX,%RDX

0x260d CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2612 JMP	57c7

0x2617 MOV	0x8(%RBX),%RDI

0x261b XOR	%ESI,%ESI

0x261d MOV	$0xa,%EDX

0x2622 CALL	11a0 <__isoc23_strtol@plt>

0x2627 MOV	%RAX,%R14

0x262a MOV	0x10(%RBX),%RDI

0x262e XOR	%ESI,%ESI

0x2630 MOV	$0xa,%EDX

0x2635 CALL	11a0 <__isoc23_strtol@plt>

0x263a MOV	%RAX,%R12

0x263d MOV	0x18(%RBX),%RDI

0x2641 XOR	%ESI,%ESI

0x2643 MOV	$0xa,%EDX

0x2648 CALL	11a0 <__isoc23_strtol@plt>

0x264d TEST	%R14D,%R14D

0x2650 JLE	579a

0x2656 TEST	%R12D,%R12D

0x2659 JLE	579a

0x265f MOV	%RAX,%RCX

0x2662 SAL	$0x20,%RCX

0x2666 JE	580a

0x266c MOV	%RCX,%RSI

0x266f MOV	%R14D,%ECX

0x2672 AND	$0x7fffffff,%ECX

0x2678 MOV	%R12D,%R9D

0x267b AND	$0x7fffffff,%R9D

0x2682 MOV	%R9,%R15

0x2685 MOV	%RCX,0x50(%RSP)

0x268a IMUL	%RCX,%R15

0x268e MOV	%R15,%RCX

0x2691 SHR	$0x3d,%RCX

0x2695 JNE	5a06

0x269b MOV	%R9,%RDX

0x269e IMUL	%R9,%RDX

0x26a2 MOV	$0x1fffffffffffffff,%RDI

0x26ac LEA	(,%R15,4),%RCX

0x26b4 MOV	%RCX,0x80(%RSP)

0x26bc LEA	-0x4(,%R15,4),%RCX

0x26c4 MOV	%RCX,0x88(%RSP)

0x26cc CMP	%RDI,%RDX

0x26cf MOV	%R15,0x68(%RSP)

0x26d4 JA	5a29

0x26da MOV	0x50(%RSP),%R8

0x26df MOV	%R8,%RDI

0x26e2 IMUL	%R8,%RDI

0x26e6 CLTQ

0x26e8 MOV	%RAX,0x1f8(%RSP)

0x26f0 VCVTSI2SS	%R12D,%XMM15,%XMM0

0x26f5 VSQRTSS	%XMM0,%XMM0,%XMM0

0x26f9 VMOVSS	%XMM0,0x1d4(%RSP)

0x2702 MOV	$-0x100000000,%RAX

0x270c ADD	%RAX,%RSI

0x270f SAR	$0x20,%RSI

0x2713 MOV	%RSI,0x200(%RSP)

0x271b MOV	%R14D,%EAX

0x271e AND	$0x7fffffff,%EAX

0x2723 LEA	-0x1(%R8),%RSI

0x2727 LEA	-0x1(%R9),%RCX

0x272b MOV	%R12D,%R10D

0x272e AND	$0x3,%R10D

0x2732 MOV	%R10,0xd0(%RSP)

0x273a MOV	%R12D,%R10D

0x273d AND	$0x7ffffffc,%R10D

0x2744 MOV	%R10,0xc8(%RSP)

0x274c MOV	%R12D,%R10D

0x274f AND	$0x7ffffff0,%R10D

0x2756 MOV	%R10,0x1e0(%RSP)

0x275e MOV	%RAX,0x238(%RSP)

0x2766 VPBROADCASTQ	%RAX,%ZMM0

0x276c VMOVDQA64	%ZMM0,0x380(%RSP)

0x2774 MOV	%RCX,%RAX

0x2777 MOV	%RCX,0xd8(%RSP)

0x277f SHR	$0x20,%RAX

0x2783 MOV	%R14,%RCX

0x2786 XOR	$0x1,%RCX

0x278a OR	%RAX,%RCX

0x278d SETNEB	0x1f(%RSP)

0x2792 MOV	%R12D,%EAX

0x2795 AND	$0x7fffffe0,%EAX

0x279a MOV	%RAX,0x258(%RSP)

0x27a2 MOV	%RSI,%RAX

0x27a5 MOV	%RSI,0x1e8(%RSP)

0x27ad SHR	$0x20,%RAX

0x27b1 MOV	%R12,%RCX

0x27b4 XOR	$0x1,%RCX

0x27b8 OR	%RAX,%RCX

0x27bb SETNEB	0x1e(%RSP)

0x27c0 MOV	%R14D,%EAX

0x27c3 AND	$0x7fffffe0,%EAX

0x27c8 MOV	%RAX,0x250(%RSP)

0x27d0 MOV	%R14D,%EAX

0x27d3 AND	$0x7ffffffc,%EAX

0x27d8 MOV	%RAX,0x260(%RSP)

0x27e0 MOV	%R14D,%EAX

0x27e3 AND	$0x3,%EAX

0x27e6 MOV	%RAX,0x278(%RSP)

0x27ee MOV	$-0x66f74f21,%ECX

0x27f3 LEA	(,%RDX,4),%RAX

0x27fb MOV	%RAX,0x90(%RSP)

0x2803 MOV	%RDX,0x58(%RSP)

0x2808 LEA	-0x4(,%RDX,4),%RAX

0x2810 MOV	%RAX,0x158(%RSP)

0x2818 LEA	(,%RDI,4),%RAX

0x2820 MOV	%RAX,0x110(%RSP)

0x2828 MOV	%RDI,0x140(%RSP)

0x2830 LEA	-0x4(,%RDI,4),%RAX

0x2838 MOV	%RAX,0x1d8(%RSP)

0x2840 LEA	(,%R8,4),%RAX

0x2848 MOV	%RAX,0xb8(%RSP)

0x2850 LEA	-0x4(,%R8,4),%RAX

0x2858 MOV	%RAX,0x1f0(%RSP)

0x2860 LEA	0x66f74f1f(%R14,%RCX,1),%RAX

0x2868 MOV	%RAX,0x220(%RSP)

0x2870 LEA	0x4(,%R14,4),%RAX

0x2878 MOV	%RAX,0x218(%RSP)

0x2880 LEA	(,%R12,4),%R13

0x2888 MOV	%R9,0x30(%RSP)

0x288d LEA	(,%R9,4),%RAX

0x2895 MOV	%RAX,0x230(%RSP)

0x289d LEA	(,%R14,4),%RAX

0x28a5 MOV	%RAX,0x270(%RSP)

0x28ad MOVQ	$0,0x160(%RSP)

0x28b9 MOVQ	$0,0x168(%RSP)

0x28c5 MOVQ	$0,0x170(%RSP)

0x28d1 MOVQ	$0,0x178(%RSP)

0x28dd MOVQ	$0,0x180(%RSP)

0x28e9 MOVQ	$0,0x188(%RSP)

0x28f5 MOV	%R14,0x48(%RSP)

0x28fa XOR	%R14D,%R14D

0x28fd MOVL	$0,0xa4(%RSP)

0x2908 MOVQ	$0,0x1c0(%RSP)

0x2914 MOV	%R12,0x228(%RSP)

0x291c NOPL	(%RAX)

(39) 0x2920 MOV	%R14,0x208(%RSP)

(39) 0x2928 TEST	%R15,%R15

(39) 0x292b JE	2bd0

(39) 0x2931 LEA	(,%R15,4),%RDI

(39) 0x2939 VZEROUPPER

(39) 0x293c CALL	10b0 <_Znwm@plt>

(39) 0x2941 MOV	%RAX,%R14

(39) 0x2944 LEA	(%RAX,%R15,4),%RAX

(39) 0x2948 MOV	%RAX,0xb0(%RSP)

(39) 0x2950 MOVL	$0,(%R14)

(39) 0x2957 CMP	$0x1,%R15

(39) 0x295b JE	2973

(39) 0x295d MOV	%R14,%RDI

(39) 0x2960 ADD	$0x4,%RDI

(39) 0x2964 XOR	%ESI,%ESI

(39) 0x2966 MOV	0x88(%RSP),%RDX

(39) 0x296e CALL	1070 <memset@plt>

(39) 0x2973 CMPQ	$0,0x30(%RSP)

(39) 0x2979 JE	2beb

(39) 0x297f MOV	0x90(%RSP),%RDI

(39) 0x2987 VZEROUPPER

(39) 0x298a CALL	10b0 <_Znwm@plt>

(39) 0x298f MOV	%RAX,%RBX

(39) 0x2992 MOVL	$0,(%RAX)

(39) 0x2998 CMPQ	$0x1,0x58(%RSP)

(39) 0x299e JE	29b3

(39) 0x29a0 LEA	0x4(%RBX),%RDI

(39) 0x29a4 XOR	%ESI,%ESI

(39) 0x29a6 MOV	0x158(%RSP),%RDX

(39) 0x29ae CALL	1070 <memset@plt>

(39) 0x29b3 MOV	0x90(%RSP),%RDI

(39) 0x29bb CALL	10b0 <_Znwm@plt>

(39) 0x29c0 MOV	%RAX,0x60(%RSP)

(39) 0x29c5 MOVL	$0,(%RAX)

(39) 0x29cb CMPQ	$0x1,0x58(%RSP)

(39) 0x29d1 JE	29eb

(39) 0x29d3 MOV	0x60(%RSP),%RAX

(39) 0x29d8 LEA	0x4(%RAX),%RDI

(39) 0x29dc XOR	%ESI,%ESI

(39) 0x29de MOV	0x158(%RSP),%RDX

(39) 0x29e6 CALL	1070 <memset@plt>

(39) 0x29eb MOV	0x58(%RSP),%RAX

(39) 0x29f0 LEA	(%RBX,%RAX,4),%RAX

(39) 0x29f4 MOV	%RAX,0x1b0(%RSP)

(39) 0x29fc MOV	0x90(%RSP),%RDI

(39) 0x2a04 CALL	10b0 <_Znwm@plt>

(39) 0x2a09 MOV	%RAX,%R15

(39) 0x2a0c MOVL	$0,(%RAX)

(39) 0x2a12 CMPQ	$0x1,0x58(%RSP)

(39) 0x2a18 JE	2a2d

(39) 0x2a1a LEA	0x4(%R15),%RDI

(39) 0x2a1e XOR	%ESI,%ESI

(39) 0x2a20 MOV	0x158(%RSP),%RDX

(39) 0x2a28 CALL	1070 <memset@plt>

(39) 0x2a2d MOV	0x60(%RSP),%RAX

(39) 0x2a32 MOV	0x58(%RSP),%RCX

(39) 0x2a37 LEA	(%RAX,%RCX,4),%RAX

(39) 0x2a3b MOV	%RAX,0x1a8(%RSP)

(39) 0x2a43 MOV	%R15,0x98(%RSP)

(39) 0x2a4b LEA	(%R15,%RCX,4),%RAX

(39) 0x2a4f MOV	%RAX,0x1a0(%RSP)

(39) 0x2a57 MOV	0x68(%RSP),%R15

(39) 0x2a5c TEST	%R15,%R15

(39) 0x2a5f JE	2c26

(39) 0x2a65 LEA	(,%R15,4),%RDI

(39) 0x2a6d CALL	10b0 <_Znwm@plt>

(39) 0x2a72 MOV	%RAX,0x70(%RSP)

(39) 0x2a77 MOVL	$0,(%RAX)

(39) 0x2a7d CMP	$0x1,%R15

(39) 0x2a81 JE	2a9b

(39) 0x2a83 MOV	0x70(%RSP),%RAX

(39) 0x2a88 LEA	0x4(%RAX),%RDI

(39) 0x2a8c XOR	%ESI,%ESI

(39) 0x2a8e MOV	0x88(%RSP),%RDX

(39) 0x2a96 CALL	1070 <memset@plt>

(39) 0x2a9b MOV	0x68(%RSP),%R15

(39) 0x2aa0 LEA	(,%R15,4),%RDI

(39) 0x2aa8 CALL	10b0 <_Znwm@plt>

(39) 0x2aad MOV	%RAX,0x20(%RSP)

(39) 0x2ab2 MOVL	$0,(%RAX)

(39) 0x2ab8 CMP	$0x1,%R15

(39) 0x2abc JE	2ad6

(39) 0x2abe MOV	0x20(%RSP),%RAX

(39) 0x2ac3 LEA	0x4(%RAX),%RDI

(39) 0x2ac7 XOR	%ESI,%ESI

(39) 0x2ac9 MOV	0x88(%RSP),%RDX

(39) 0x2ad1 CALL	1070 <memset@plt>

(39) 0x2ad6 MOV	0x68(%RSP),%R15

(39) 0x2adb MOV	0x70(%RSP),%RAX

(39) 0x2ae0 LEA	(%RAX,%R15,4),%RAX

(39) 0x2ae4 MOV	%RAX,0x138(%RSP)

(39) 0x2aec LEA	(,%R15,4),%RDI

(39) 0x2af4 CALL	10b0 <_Znwm@plt>

(39) 0x2af9 MOV	%RAX,0x38(%RSP)

(39) 0x2afe MOVL	$0,(%RAX)

(39) 0x2b04 CMP	$0x1,%R15

(39) 0x2b08 JE	2b22

(39) 0x2b0a MOV	0x38(%RSP),%RAX

(39) 0x2b0f LEA	0x4(%RAX),%RDI

(39) 0x2b13 XOR	%ESI,%ESI

(39) 0x2b15 MOV	0x88(%RSP),%RDX

(39) 0x2b1d CALL	1070 <memset@plt>

(39) 0x2b22 MOV	0x68(%RSP),%R15

(39) 0x2b27 MOV	0x20(%RSP),%RAX

(39) 0x2b2c LEA	(%RAX,%R15,4),%RAX

(39) 0x2b30 MOV	%RAX,0x128(%RSP)

(39) 0x2b38 LEA	(,%R15,4),%RDI

(39) 0x2b40 CALL	10b0 <_Znwm@plt>

(39) 0x2b45 MOV	%RAX,0x28(%RSP)

(39) 0x2b4a MOVL	$0,(%RAX)

(39) 0x2b50 CMP	$0x1,%R15

(39) 0x2b54 JE	2b6e

(39) 0x2b56 MOV	0x28(%RSP),%RAX

(39) 0x2b5b LEA	0x4(%RAX),%RDI

(39) 0x2b5f XOR	%ESI,%ESI

(39) 0x2b61 MOV	0x88(%RSP),%RDX

(39) 0x2b69 CALL	1070 <memset@plt>

(39) 0x2b6e MOV	0x68(%RSP),%R15

(39) 0x2b73 MOV	0x38(%RSP),%RAX

(39) 0x2b78 LEA	(%RAX,%R15,4),%RAX

(39) 0x2b7c MOV	%RAX,0x120(%RSP)

(39) 0x2b84 LEA	(,%R15,4),%RDI

(39) 0x2b8c CALL	10b0 <_Znwm@plt>

(39) 0x2b91 MOV	%RAX,%RCX

(39) 0x2b94 MOV	0x28(%RSP),%RAX

(39) 0x2b99 LEA	(%RAX,%R15,4),%RAX

(39) 0x2b9d MOV	%RAX,0x118(%RSP)

(39) 0x2ba5 LEA	(%RCX,%R15,4),%RAX

(39) 0x2ba9 MOV	%RAX,0x130(%RSP)

(39) 0x2bb1 MOVL	$0,(%RCX)

(39) 0x2bb7 CMP	$0x1,%R15

(39) 0x2bbb JNE	2c84

(39) 0x2bc1 MOV	%RCX,%R15

(39) 0x2bc4 JMP	2c9d

0x2bc9 NOPL	(%RAX)

(39) 0x2bd0 MOVQ	$0,0xb0(%RSP)

(39) 0x2bdc XOR	%R14D,%R14D

(39) 0x2bdf CMPQ	$0,0x30(%RSP)

(39) 0x2be5 JNE	297f

(39) 0x2beb MOVQ	$0,0x98(%RSP)

(39) 0x2bf7 MOVQ	$0,0x1a0(%RSP)

(39) 0x2c03 XOR	%EBX,%EBX

(39) 0x2c05 MOVQ	$0,0x1b0(%RSP)

(39) 0x2c11 MOVQ	$0,0x1a8(%RSP)

(39) 0x2c1d MOVQ	$0,0x60(%RSP)

(39) 0x2c26 MOVQ	$0,0x118(%RSP)

(39) 0x2c32 MOVQ	$0,0x28(%RSP)

(39) 0x2c3b MOVQ	$0,0x20(%RSP)

(39) 0x2c44 MOVQ	$0,0x128(%RSP)

(39) 0x2c50 MOVQ	$0,0x138(%RSP)

(39) 0x2c5c XOR	%EAX,%EAX

(39) 0x2c5e MOVQ	$0,0x120(%RSP)

(39) 0x2c6a MOVQ	$0,0x38(%RSP)

(39) 0x2c73 XOR	%R15D,%R15D

(39) 0x2c76 MOVQ	$0,0x130(%RSP)

(39) 0x2c82 JMP	2ca2

(39) 0x2c84 MOV	%RCX,%R15

(39) 0x2c87 MOV	%RCX,%RDI

(39) 0x2c8a ADD	$0x4,%RDI

(39) 0x2c8e XOR	%ESI,%ESI

(39) 0x2c90 MOV	0x88(%RSP),%RDX

(39) 0x2c98 CALL	1070 <memset@plt>

(39) 0x2c9d MOV	0x70(%RSP),%RAX

(39) 0x2ca2 MOV	%RAX,0x70(%RSP)

(39) 0x2ca7 MOV	$0x1fffffffffffffff,%RAX

(39) 0x2cb1 CMP	%RAX,0x140(%RSP)

(39) 0x2cb9 MOV	%RBX,0x40(%RSP)

(39) 0x2cbe MOV	%R15,0x150(%RSP)

(39) 0x2cc6 JA	59e0

(39) 0x2ccc CMPQ	$0,0x50(%RSP)

(39) 0x2cd2 JE	2dd0

(39) 0x2cd8 MOV	0x110(%RSP),%RDI

(39) 0x2ce0 VZEROUPPER

(39) 0x2ce3 CALL	10b0 <_Znwm@plt>

(39) 0x2ce8 MOV	%RAX,0x78(%RSP)

(39) 0x2ced MOVL	$0,(%RAX)

(39) 0x2cf3 CMPQ	$0x1,0x140(%RSP)

(39) 0x2cfc JE	2d16

(39) 0x2cfe MOV	0x78(%RSP),%RAX

(39) 0x2d03 LEA	0x4(%RAX),%RDI

(39) 0x2d07 XOR	%ESI,%ESI

(39) 0x2d09 MOV	0x1d8(%RSP),%RDX

(39) 0x2d11 CALL	1070 <memset@plt>

(39) 0x2d16 MOV	0x110(%RSP),%RDI

(39) 0x2d1e CALL	10b0 <_Znwm@plt>

(39) 0x2d23 MOV	%RAX,0x10(%RSP)

(39) 0x2d28 MOVL	$0,(%RAX)

(39) 0x2d2e CMPQ	$0x1,0x140(%RSP)

(39) 0x2d37 JE	2d51

(39) 0x2d39 MOV	0x10(%RSP),%RAX

(39) 0x2d3e LEA	0x4(%RAX),%RDI

(39) 0x2d42 XOR	%ESI,%ESI

(39) 0x2d44 MOV	0x1d8(%RSP),%RDX

(39) 0x2d4c CALL	1070 <memset@plt>

(39) 0x2d51 MOV	0x140(%RSP),%RCX

(39) 0x2d59 MOV	0x78(%RSP),%RAX

(39) 0x2d5e MOV	%RCX,%R15

(39) 0x2d61 LEA	(%RAX,%RCX,4),%RAX

(39) 0x2d65 MOV	%RAX,0x198(%RSP)

(39) 0x2d6d MOV	0xb8(%RSP),%RDI

(39) 0x2d75 CALL	10b0 <_Znwm@plt>

(39) 0x2d7a MOV	%RAX,%RDI

(39) 0x2d7d MOV	0x10(%RSP),%RAX

(39) 0x2d82 LEA	(%RAX,%R15,4),%RAX

(39) 0x2d86 MOV	%RAX,0x1b8(%RSP)

(39) 0x2d8e MOV	0x50(%RSP),%RAX

(39) 0x2d93 LEA	(%RDI,%RAX,4),%RCX

(39) 0x2d97 MOV	%RCX,0x190(%RSP)

(39) 0x2d9f MOVL	$0,(%RDI)

(39) 0x2da5 CMP	$0x1,%RAX

(39) 0x2da9 MOV	%RDI,0xa8(%RSP)

(39) 0x2db1 JE	2e12

(39) 0x2db3 ADD	$0x4,%RDI

(39) 0x2db7 XOR	%ESI,%ESI

(39) 0x2db9 MOV	0x1f0(%RSP),%RDX

(39) 0x2dc1 CALL	1070 <memset@plt>

(39) 0x2dc6 JMP	2e12

0x2dc8 NOPL	(%RAX,%RAX,1)

(39) 0x2dd0 MOVQ	$0,0x1b8(%RSP)

(39) 0x2ddc MOVQ	$0,0x10(%RSP)

(39) 0x2de5 MOVQ	$0,0x78(%RSP)

(39) 0x2dee MOVQ	$0,0x198(%RSP)

(39) 0x2dfa MOVQ	$0,0xa8(%RSP)

(39) 0x2e06 MOVQ	$0,0x190(%RSP)

(39) 0x2e12 LEA	0x400(%RSP),%RAX

(39) 0x2e1a MOV	%RAX,0x3f0(%RSP)

(39) 0x2e22 MOVL	$0x746c7561,0x3(%RAX)

(39) 0x2e29 MOV	%RAX,%R15

(39) 0x2e2c MOVL	$0x61666564,(%RAX)

(39) 0x2e32 MOVB	$0,0x407(%RSP)

(39) 0x2e3a MOVQ	$0x7,0x3f8(%RSP)

(39) 0x2e46 LEA	0x1778(%RSP),%RDI

(39) 0x2e4e LEA	0x3f0(%RSP),%RSI

(39) 0x2e56 VZEROUPPER

(39) 0x2e59 CALL	1140 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>

(39) 0x2e5e MOV	0x3f0(%RSP),%RDI

(39) 0x2e66 CMP	%R15,%RDI

(39) 0x2e69 JE	2e7b

(39) 0x2e6b MOV	0x400(%RSP),%RSI

(39) 0x2e73 INC	%RSI

(39) 0x2e76 CALL	10c0 <_ZdlPvm@plt>

(39) 0x2e7b LEA	0x1778(%RSP),%RDI

(39) 0x2e83 CALL	1110 <_ZNSt13random_device9_M_getvalEv@plt>

(39) 0x2e88 MOV	%EAX,%ECX

(39) 0x2e8a MOV	%RCX,0x3f0(%RSP)

(39) 0x2e92 MOV	$0x4,%EAX

(39) 0x2e97 NOPW	(%RAX,%RAX,1)

  (81) 0x2ea0 MOV	%RCX,%RDX

  (81) 0x2ea3 SHR	$0x1e,%RDX

  (81) 0x2ea7 XOR	%RCX,%RDX

  (81) 0x2eaa IMUL	$0x6c078965,%RDX,%RCX

  (81) 0x2eb1 ADD	%RAX,%RCX

  (81) 0x2eb4 ADD	$-0x3,%RCX

  (81) 0x2eb8 MOV	%ECX,%EDX

  (81) 0x2eba MOV	%RDX,0x3d8(%RSP,%RAX,8)

  (81) 0x2ec2 MOV	%ECX,%EDX

  (81) 0x2ec4 SHR	$0x1e,%EDX

  (81) 0x2ec7 XOR	%RCX,%RDX

  (81) 0x2eca IMUL	$0x6c078965,%RDX,%RCX

  (81) 0x2ed1 ADD	%RAX,%RCX

  (81) 0x2ed4 ADD	$-0x2,%RCX

  (81) 0x2ed8 MOV	%ECX,%EDX

  (81) 0x2eda MOV	%RDX,0x3e0(%RSP,%RAX,8)

  (81) 0x2ee2 MOV	%ECX,%EDX

  (81) 0x2ee4 SHR	$0x1e,%EDX

  (81) 0x2ee7 XOR	%RCX,%RDX

  (81) 0x2eea IMUL	$0x6c078965,%RDX,%RCX

  (81) 0x2ef1 ADD	%RAX,%RCX

  (81) 0x2ef4 DEC	%RCX

  (81) 0x2ef7 MOV	%ECX,%EDX

  (81) 0x2ef9 MOV	%RDX,0x3e8(%RSP,%RAX,8)

  (81) 0x2f01 CMP	$0x270,%RAX

  (81) 0x2f07 JE	2f30

  (81) 0x2f09 SHR	$0x1e,%EDX

  (81) 0x2f0c XOR	%EDX,%ECX

  (81) 0x2f0e IMUL	$0x6c078965,%ECX,%ECX

  (81) 0x2f14 ADD	%EAX,%ECX

  (81) 0x2f16 MOV	%RCX,0x3f0(%RSP,%RAX,8)

  (81) 0x2f1e ADD	$0x4,%RAX

  (81) 0x2f22 JMP	2ea0

0x2f27 NOPW	(%RAX,%RAX,1)

(39) 0x2f30 MOVQ	$0x270,0x1770(%RSP)

(39) 0x2f3c CMPQ	$0,0x68(%RSP)

(39) 0x2f42 JE	3370

(39) 0x2f48 MOV	$0x270,%ECX

(39) 0x2f4d XOR	%EAX,%EAX

(39) 0x2f4f JMP	2fc3

0x2f51 NOPW	%CS:(%RAX,%RAX,1)

  (78) 0x2f60 MOV	%RCX,%RDX

  (78) 0x2f63 INC	%RCX

  (78) 0x2f66 MOV	%RCX,0x1770(%RSP)

  (78) 0x2f6e MOV	0x3f0(%RSP,%RDX,8),%RDX

  (78) 0x2f76 MOV	%RDX,%RSI

  (78) 0x2f79 SHR	$0xb,%RSI

  (78) 0x2f7d MOV	%ESI,%ESI

  (78) 0x2f7f XOR	%RDX,%RSI

  (78) 0x2f82 MOV	%ESI,%EDX

  (78) 0x2f84 SAL	$0x7,%EDX

  (78) 0x2f87 AND	$-0x62d3a980,%EDX

  (78) 0x2f8d XOR	%RSI,%RDX

  (78) 0x2f90 MOV	%EDX,%ESI

  (78) 0x2f92 SAL	$0xf,%ESI

  (78) 0x2f95 AND	$-0x103a0000,%ESI

  (78) 0x2f9b XOR	%RDX,%RSI

  (78) 0x2f9e MOV	%RSI,%RDX

  (78) 0x2fa1 SHR	$0x12,%RDX

  (78) 0x2fa5 XOR	%ESI,%EDX

  (78) 0x2fa7 VCVTUSI2SS	%EDX,%XMM15,%XMM0

  (78) 0x2fad VMULSS	0x3053(%RIP),%XMM0,%XMM0

  (78) 0x2fb5 VUCOMISS	0x304f(%RIP),%XMM0

  (78) 0x2fbd JB	3345

  (78) 0x2fc3 CMP	$0x270,%RCX

  (78) 0x2fca JB	2f60

  (78) 0x2fcc VPBROADCASTQ	0x3f0(%RSP),%ZMM0

  (78) 0x2fd4 XOR	%ECX,%ECX

  (78) 0x2fd6 VPBROADCASTQ	0x3058(%RIP),%ZMM12

  (78) 0x2fe0 VPBROADCASTQ	0x3056(%RIP),%ZMM13

  (78) 0x2fea VPBROADCASTQ	0x3054(%RIP),%ZMM14

  (78) 0x2ff4 VPBROADCASTQ	0x3052(%RIP),%ZMM15

  (78) 0x2ffe XCHG	%AX,%AX

    (79) 0x3000 VMOVDQA64	%ZMM0,%ZMM1

    (79) 0x3006 VMOVDQU64	0x3f8(%RSP,%RCX,8),%ZMM2

    (79) 0x3011 VMOVDQU64	0x438(%RSP,%RCX,8),%ZMM3

    (79) 0x301c VMOVDQU64	0x478(%RSP,%RCX,8),%ZMM4

    (79) 0x3027 VMOVDQU64	0x4b8(%RSP,%RCX,8),%ZMM0

    (79) 0x3032 VALIGNQ	$0x7,%ZMM1,%ZMM2,%ZMM1

    (79) 0x3039 VALIGNQ	$0x7,%ZMM2,%ZMM3,%ZMM5

    (79) 0x3040 VALIGNQ	$0x7,%ZMM3,%ZMM4,%ZMM6

    (79) 0x3047 VALIGNQ	$0x7,%ZMM4,%ZMM0,%ZMM7

    (79) 0x304e VPANDQ	%ZMM13,%ZMM2,%ZMM8

    (79) 0x3054 VPANDQ	%ZMM13,%ZMM3,%ZMM9

    (79) 0x305a VPANDQ	%ZMM13,%ZMM4,%ZMM10

    (79) 0x3060 VPANDQ	%ZMM13,%ZMM0,%ZMM11

    (79) 0x3066 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM1,%ZMM8

    (79) 0x306d VPTERNLOGQ	$-0x8,%ZMM12,%ZMM5,%ZMM9

    (79) 0x3074 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM6,%ZMM10

    (79) 0x307b VPTERNLOGQ	$-0x8,%ZMM12,%ZMM7,%ZMM11

    (79) 0x3082 VPSRLQ	$0x1,%ZMM8,%ZMM1

    (79) 0x3089 VPSRLQ	$0x1,%ZMM9,%ZMM5

    (79) 0x3090 VPSRLQ	$0x1,%ZMM10,%ZMM6

    (79) 0x3097 VPSRLQ	$0x1,%ZMM11,%ZMM7

    (79) 0x309e VPXORQ	0x1058(%RSP,%RCX,8),%ZMM1,%ZMM1

    (79) 0x30a9 VPXORQ	0x1098(%RSP,%RCX,8),%ZMM5,%ZMM5

    (79) 0x30b4 VPXORQ	0x10d8(%RSP,%RCX,8),%ZMM6,%ZMM6

    (79) 0x30bf VPXORQ	0x1118(%RSP,%RCX,8),%ZMM7,%ZMM7

    (79) 0x30ca VPTESTMQ	%ZMM14,%ZMM2,%K1

    (79) 0x30d0 VPTESTMQ	%ZMM14,%ZMM3,%K2

    (79) 0x30d6 VPTESTMQ	%ZMM14,%ZMM4,%K3

    (79) 0x30dc VPTESTMQ	%ZMM14,%ZMM0,%K4

    (79) 0x30e2 VPXORQ	%ZMM15,%ZMM1,%ZMM1{%K1}

    (79) 0x30e8 VPXORQ	%ZMM15,%ZMM5,%ZMM5{%K2}

    (79) 0x30ee VPXORQ	%ZMM15,%ZMM6,%ZMM6{%K3}

    (79) 0x30f4 VPXORQ	%ZMM15,%ZMM7,%ZMM7{%K4}

    (79) 0x30fa VMOVDQU64	%ZMM1,0x3f0(%RSP,%RCX,8)

    (79) 0x3105 VMOVDQU64	%ZMM5,0x430(%RSP,%RCX,8)

    (79) 0x3110 VMOVDQU64	%ZMM6,0x470(%RSP,%RCX,8)

    (79) 0x311b VMOVDQU64	%ZMM7,0x4b0(%RSP,%RCX,8)

    (79) 0x3126 ADD	$0x20,%RCX

    (79) 0x312a CMP	$0xe0,%RCX

    (79) 0x3131 JNE	3000

  (78) 0x3137 VEXTRACTI32X4	$0x3,%ZMM0,%XMM0

  (78) 0x313e VPEXTRQ	$0x1,%XMM0,%RSI

  (78) 0x3144 AND	$-0x80000000,%RSI

  (78) 0x314b MOV	0xaf8(%RSP),%RDX

  (78) 0x3153 MOV	0xb00(%RSP),%RCX

  (78) 0x315b MOV	%EDX,%EDI

  (78) 0x315d AND	$0x7ffffffe,%EDI

  (78) 0x3163 OR	%RSI,%RDI

  (78) 0x3166 SHR	$0x1,%RDI

  (78) 0x3169 XOR	0x1758(%RSP),%RDI

  (78) 0x3171 MOV	%EDX,%ESI

  (78) 0x3173 AND	$0x1,%ESI

  (78) 0x3176 NEG	%ESI

  (78) 0x3178 MOV	$-0x66f74f21,%R8D

  (78) 0x317e AND	%R8D,%ESI

  (78) 0x3181 XOR	%RDI,%RSI

  (78) 0x3184 MOV	%RSI,0xaf0(%RSP)

  (78) 0x318c AND	$-0x80000000,%RDX

  (78) 0x3193 MOV	%ECX,%ESI

  (78) 0x3195 AND	$0x7ffffffe,%ESI

  (78) 0x319b OR	%RDX,%RSI

  (78) 0x319e SHR	$0x1,%RSI

  (78) 0x31a1 XOR	0x1760(%RSP),%RSI

  (78) 0x31a9 MOV	%ECX,%EDX

  (78) 0x31ab AND	$0x1,%EDX

  (78) 0x31ae NEG	%EDX

  (78) 0x31b0 AND	%R8D,%EDX

  (78) 0x31b3 XOR	%RSI,%RDX

  (78) 0x31b6 MOV	%RDX,0xaf8(%RSP)

  (78) 0x31be AND	$-0x80000000,%RCX

  (78) 0x31c5 MOV	0xb08(%RSP),%RDX

  (78) 0x31cd MOV	%EDX,%ESI

  (78) 0x31cf VPBROADCASTQ	%RDX,%XMM0

  (78) 0x31d5 AND	$0x7ffffffe,%EDX

  (78) 0x31db OR	%RCX,%RDX

  (78) 0x31de SHR	$0x1,%RDX

  (78) 0x31e1 XOR	0x1768(%RSP),%RDX

  (78) 0x31e9 AND	$0x1,%ESI

  (78) 0x31ec NEG	%ESI

  (78) 0x31ee MOV	$-0x66f74f21,%EDI

  (78) 0x31f3 AND	%R8D,%ESI

  (78) 0x31f6 XOR	%RDX,%RSI

  (78) 0x31f9 MOV	%RSI,0xb00(%RSP)

  (78) 0x3201 MOV	$0xe8,%ECX

  (78) 0x3206 VPBROADCASTQ	0x2e29(%RIP),%XMM5

  (78) 0x320f VPBROADCASTQ	0x2e28(%RIP),%XMM6

  (78) 0x3218 VPBROADCASTQ	0x2e27(%RIP),%XMM7

  (78) 0x3221 VPBROADCASTQ	0x2e26(%RIP),%XMM8

  (78) 0x322a NOPW	(%RAX,%RAX,1)

    (80) 0x3230 VMOVDQU	0x3d0(%RSP,%RCX,8),%XMM1

    (80) 0x3239 VMOVDQU	0x3e0(%RSP,%RCX,8),%XMM2

    (80) 0x3242 VPALIGNR	$0x8,%XMM0,%XMM1,%XMM0

    (80) 0x3248 VMOVDQU	0x3f0(%RSP,%RCX,8),%XMM3

    (80) 0x3251 VPAND	%XMM6,%XMM1,%XMM4

    (80) 0x3255 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM4

    (80) 0x325c VPSRLQ	$0x1,%XMM4,%XMM0

    (80) 0x3261 VPXOR	-0x350(%RSP,%RCX,8),%XMM0,%XMM0

    (80) 0x326a VPTESTMQ	%XMM7,%XMM1,%K1

    (80) 0x3270 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (80) 0x3276 VMOVDQU	%XMM0,0x3c8(%RSP,%RCX,8)

    (80) 0x327f VPALIGNR	$0x8,%XMM1,%XMM2,%XMM0

    (80) 0x3285 VPAND	%XMM6,%XMM2,%XMM1

    (80) 0x3289 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

    (80) 0x3290 VPSRLQ	$0x1,%XMM1,%XMM0

    (80) 0x3295 VPXOR	-0x340(%RSP,%RCX,8),%XMM0,%XMM0

    (80) 0x329e VPTESTMQ	%XMM7,%XMM2,%K1

    (80) 0x32a4 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (80) 0x32aa VMOVDQU	%XMM0,0x3d8(%RSP,%RCX,8)

    (80) 0x32b3 VPALIGNR	$0x8,%XMM2,%XMM3,%XMM0

    (80) 0x32b9 VPAND	%XMM6,%XMM3,%XMM1

    (80) 0x32bd VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

    (80) 0x32c4 VPSRLQ	$0x1,%XMM1,%XMM0

    (80) 0x32c9 VPXOR	-0x330(%RSP,%RCX,8),%XMM0,%XMM0

    (80) 0x32d2 VPTESTMQ	%XMM7,%XMM3,%K1

    (80) 0x32d8 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (80) 0x32de VMOVDQU	%XMM0,0x3e8(%RSP,%RCX,8)

    (80) 0x32e7 ADD	$0x6,%RCX

    (80) 0x32eb VMOVDQA	%XMM3,%XMM0

    (80) 0x32ef CMP	$0x274,%RCX

    (80) 0x32f6 JNE	3230

  (78) 0x32fc MOV	0x1768(%RSP),%RCX

  (78) 0x3304 MOV	$-0x80000000,%RDX

  (78) 0x330b AND	%RDX,%RCX

  (78) 0x330e MOV	0x3f0(%RSP),%RDX

  (78) 0x3316 MOV	%EDX,%ESI

  (78) 0x3318 AND	$0x7ffffffe,%ESI

  (78) 0x331e OR	%RCX,%RSI

  (78) 0x3321 SHR	$0x1,%RSI

  (78) 0x3324 XOR	0x1050(%RSP),%RSI

  (78) 0x332c AND	$0x1,%EDX

  (78) 0x332f NEG	%EDX

  (78) 0x3331 AND	%EDI,%EDX

  (78) 0x3333 XOR	%RSI,%RDX

  (78) 0x3336 MOV	%RDX,0x1768(%RSP)

  (78) 0x333e XOR	%ECX,%ECX

  (78) 0x3340 JMP	2f60

  (78) 0x3345 VMOVSS	%XMM0,(%R14,%RAX,4)

  (78) 0x334b INC	%RAX

  (78) 0x334e CMP	0x68(%RSP),%RAX

  (78) 0x3353 JNE	2fc3

(39) 0x3359 CMPQ	$0,0x30(%RSP)

(39) 0x335f JNE	3381

(39) 0x3361 JMP	3f80

0x3366 NOPW	%CS:(%RAX,%RAX,1)

(39) 0x3370 MOV	$0x270,%ECX

(39) 0x3375 CMPQ	$0,0x30(%RSP)

(39) 0x337b JE	3f80

(39) 0x3381 XOR	%EAX,%EAX

(39) 0x3383 JMP	33f3

0x3385 NOPW	%CS:(%RAX,%RAX,1)

  (69) 0x3390 MOV	%RCX,%RDX

  (69) 0x3393 INC	%RCX

  (69) 0x3396 MOV	%RCX,0x1770(%RSP)

  (69) 0x339e MOV	0x3f0(%RSP,%RDX,8),%RDX

  (69) 0x33a6 MOV	%RDX,%RSI

  (69) 0x33a9 SHR	$0xb,%RSI

  (69) 0x33ad MOV	%ESI,%ESI

  (69) 0x33af XOR	%RDX,%RSI

  (69) 0x33b2 MOV	%ESI,%EDX

  (69) 0x33b4 SAL	$0x7,%EDX

  (69) 0x33b7 AND	$-0x62d3a980,%EDX

  (69) 0x33bd XOR	%RSI,%RDX

  (69) 0x33c0 MOV	%EDX,%ESI

  (69) 0x33c2 SAL	$0xf,%ESI

  (69) 0x33c5 AND	$-0x103a0000,%ESI

  (69) 0x33cb XOR	%RDX,%RSI

  (69) 0x33ce MOV	%RSI,%RDX

  (69) 0x33d1 SHR	$0x12,%RDX

  (69) 0x33d5 XOR	%ESI,%EDX

  (69) 0x33d7 VCVTUSI2SS	%EDX,%XMM15,%XMM0

  (69) 0x33dd VMULSS	0x2c23(%RIP),%XMM0,%XMM0

  (69) 0x33e5 VUCOMISS	0x2c1f(%RIP),%XMM0

  (69) 0x33ed JB	3775

  (69) 0x33f3 CMP	$0x270,%RCX

  (69) 0x33fa JB	3390

  (69) 0x33fc VPBROADCASTQ	0x3f0(%RSP),%ZMM0

  (69) 0x3404 XOR	%ECX,%ECX

  (69) 0x3406 VPBROADCASTQ	0x2c28(%RIP),%ZMM12

  (69) 0x3410 VPBROADCASTQ	0x2c26(%RIP),%ZMM13

  (69) 0x341a VPBROADCASTQ	0x2c24(%RIP),%ZMM14

  (69) 0x3424 VPBROADCASTQ	0x2c22(%RIP),%ZMM15

  (69) 0x342e XCHG	%AX,%AX

    (76) 0x3430 VMOVDQA64	%ZMM0,%ZMM1

    (76) 0x3436 VMOVDQU64	0x3f8(%RSP,%RCX,8),%ZMM2

    (76) 0x3441 VMOVDQU64	0x438(%RSP,%RCX,8),%ZMM3

    (76) 0x344c VMOVDQU64	0x478(%RSP,%RCX,8),%ZMM4

    (76) 0x3457 VMOVDQU64	0x4b8(%RSP,%RCX,8),%ZMM0

    (76) 0x3462 VALIGNQ	$0x7,%ZMM1,%ZMM2,%ZMM1

    (76) 0x3469 VALIGNQ	$0x7,%ZMM2,%ZMM3,%ZMM5

    (76) 0x3470 VALIGNQ	$0x7,%ZMM3,%ZMM4,%ZMM6

    (76) 0x3477 VALIGNQ	$0x7,%ZMM4,%ZMM0,%ZMM7

    (76) 0x347e VPANDQ	%ZMM13,%ZMM2,%ZMM8

    (76) 0x3484 VPANDQ	%ZMM13,%ZMM3,%ZMM9

    (76) 0x348a VPANDQ	%ZMM13,%ZMM4,%ZMM10

    (76) 0x3490 VPANDQ	%ZMM13,%ZMM0,%ZMM11

    (76) 0x3496 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM1,%ZMM8

    (76) 0x349d VPTERNLOGQ	$-0x8,%ZMM12,%ZMM5,%ZMM9

    (76) 0x34a4 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM6,%ZMM10

    (76) 0x34ab VPTERNLOGQ	$-0x8,%ZMM12,%ZMM7,%ZMM11

    (76) 0x34b2 VPSRLQ	$0x1,%ZMM8,%ZMM1

    (76) 0x34b9 VPSRLQ	$0x1,%ZMM9,%ZMM5

    (76) 0x34c0 VPSRLQ	$0x1,%ZMM10,%ZMM6

    (76) 0x34c7 VPSRLQ	$0x1,%ZMM11,%ZMM7

    (76) 0x34ce VPXORQ	0x1058(%RSP,%RCX,8),%ZMM1,%ZMM1

    (76) 0x34d9 VPXORQ	0x1098(%RSP,%RCX,8),%ZMM5,%ZMM5

    (76) 0x34e4 VPXORQ	0x10d8(%RSP,%RCX,8),%ZMM6,%ZMM6

    (76) 0x34ef VPXORQ	0x1118(%RSP,%RCX,8),%ZMM7,%ZMM7

    (76) 0x34fa VPTESTMQ	%ZMM14,%ZMM2,%K1

    (76) 0x3500 VPTESTMQ	%ZMM14,%ZMM3,%K2

    (76) 0x3506 VPTESTMQ	%ZMM14,%ZMM4,%K3

    (76) 0x350c VPTESTMQ	%ZMM14,%ZMM0,%K4

    (76) 0x3512 VPXORQ	%ZMM15,%ZMM1,%ZMM1{%K1}

    (76) 0x3518 VPXORQ	%ZMM15,%ZMM5,%ZMM5{%K2}

    (76) 0x351e VPXORQ	%ZMM15,%ZMM6,%ZMM6{%K3}

    (76) 0x3524 VPXORQ	%ZMM15,%ZMM7,%ZMM7{%K4}

    (76) 0x352a VMOVDQU64	%ZMM1,0x3f0(%RSP,%RCX,8)

    (76) 0x3535 VMOVDQU64	%ZMM5,0x430(%RSP,%RCX,8)

    (76) 0x3540 VMOVDQU64	%ZMM6,0x470(%RSP,%RCX,8)

    (76) 0x354b VMOVDQU64	%ZMM7,0x4b0(%RSP,%RCX,8)

    (76) 0x3556 ADD	$0x20,%RCX

    (76) 0x355a CMP	$0xe0,%RCX

    (76) 0x3561 JNE	3430

  (69) 0x3567 VEXTRACTI32X4	$0x3,%ZMM0,%XMM0

  (69) 0x356e VPEXTRQ	$0x1,%XMM0,%RSI

  (69) 0x3574 AND	$-0x80000000,%RSI

  (69) 0x357b MOV	0xaf8(%RSP),%RDX

  (69) 0x3583 MOV	0xb00(%RSP),%RCX

  (69) 0x358b MOV	%EDX,%EDI

  (69) 0x358d AND	$0x7ffffffe,%EDI

  (69) 0x3593 OR	%RSI,%RDI

  (69) 0x3596 SHR	$0x1,%RDI

  (69) 0x3599 XOR	0x1758(%RSP),%RDI

  (69) 0x35a1 MOV	%EDX,%ESI

  (69) 0x35a3 AND	$0x1,%ESI

  (69) 0x35a6 NEG	%ESI

  (69) 0x35a8 MOV	$-0x66f74f21,%R8D

  (69) 0x35ae AND	%R8D,%ESI

  (69) 0x35b1 XOR	%RDI,%RSI

  (69) 0x35b4 MOV	%RSI,0xaf0(%RSP)

  (69) 0x35bc AND	$-0x80000000,%RDX

  (69) 0x35c3 MOV	%ECX,%ESI

  (69) 0x35c5 AND	$0x7ffffffe,%ESI

  (69) 0x35cb OR	%RDX,%RSI

  (69) 0x35ce SHR	$0x1,%RSI

  (69) 0x35d1 XOR	0x1760(%RSP),%RSI

  (69) 0x35d9 MOV	%ECX,%EDX

  (69) 0x35db AND	$0x1,%EDX

  (69) 0x35de NEG	%EDX

  (69) 0x35e0 AND	%R8D,%EDX

  (69) 0x35e3 XOR	%RSI,%RDX

  (69) 0x35e6 MOV	%RDX,0xaf8(%RSP)

  (69) 0x35ee AND	$-0x80000000,%RCX

  (69) 0x35f5 MOV	0xb08(%RSP),%RDX

  (69) 0x35fd MOV	%EDX,%ESI

  (69) 0x35ff VPBROADCASTQ	%RDX,%XMM0

  (69) 0x3605 AND	$0x7ffffffe,%EDX

  (69) 0x360b OR	%RCX,%RDX

  (69) 0x360e SHR	$0x1,%RDX

  (69) 0x3611 XOR	0x1768(%RSP),%RDX

  (69) 0x3619 AND	$0x1,%ESI

  (69) 0x361c NEG	%ESI

  (69) 0x361e MOV	$-0x66f74f21,%EDI

  (69) 0x3623 AND	%R8D,%ESI

  (69) 0x3626 XOR	%RDX,%RSI

  (69) 0x3629 MOV	%RSI,0xb00(%RSP)

  (69) 0x3631 MOV	$0xe8,%ECX

  (69) 0x3636 VPBROADCASTQ	0x29f9(%RIP),%XMM5

  (69) 0x363f VPBROADCASTQ	0x29f8(%RIP),%XMM6

  (69) 0x3648 VPBROADCASTQ	0x29f7(%RIP),%XMM7

  (69) 0x3651 VPBROADCASTQ	0x29f6(%RIP),%XMM8

  (69) 0x365a NOPW	(%RAX,%RAX,1)

    (77) 0x3660 VMOVDQU	0x3d0(%RSP,%RCX,8),%XMM1

    (77) 0x3669 VMOVDQU	0x3e0(%RSP,%RCX,8),%XMM2

    (77) 0x3672 VPALIGNR	$0x8,%XMM0,%XMM1,%XMM0

    (77) 0x3678 VMOVDQU	0x3f0(%RSP,%RCX,8),%XMM3

    (77) 0x3681 VPAND	%XMM6,%XMM1,%XMM4

    (77) 0x3685 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM4

    (77) 0x368c VPSRLQ	$0x1,%XMM4,%XMM0

    (77) 0x3691 VPXOR	-0x350(%RSP,%RCX,8),%XMM0,%XMM0

    (77) 0x369a VPTESTMQ	%XMM7,%XMM1,%K1

    (77) 0x36a0 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (77) 0x36a6 VMOVDQU	%XMM0,0x3c8(%RSP,%RCX,8)

    (77) 0x36af VPALIGNR	$0x8,%XMM1,%XMM2,%XMM0

    (77) 0x36b5 VPAND	%XMM6,%XMM2,%XMM1

    (77) 0x36b9 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

    (77) 0x36c0 VPSRLQ	$0x1,%XMM1,%XMM0

    (77) 0x36c5 VPXOR	-0x340(%RSP,%RCX,8),%XMM0,%XMM0

    (77) 0x36ce VPTESTMQ	%XMM7,%XMM2,%K1

    (77) 0x36d4 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (77) 0x36da VMOVDQU	%XMM0,0x3d8(%RSP,%RCX,8)

    (77) 0x36e3 VPALIGNR	$0x8,%XMM2,%XMM3,%XMM0

    (77) 0x36e9 VPAND	%XMM6,%XMM3,%XMM1

    (77) 0x36ed VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

    (77) 0x36f4 VPSRLQ	$0x1,%XMM1,%XMM0

    (77) 0x36f9 VPXOR	-0x330(%RSP,%RCX,8),%XMM0,%XMM0

    (77) 0x3702 VPTESTMQ	%XMM7,%XMM3,%K1

    (77) 0x3708 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

    (77) 0x370e VMOVDQU	%XMM0,0x3e8(%RSP,%RCX,8)

    (77) 0x3717 ADD	$0x6,%RCX

    (77) 0x371b VMOVDQA	%XMM3,%XMM0

    (77) 0x371f CMP	$0x274,%RCX

    (77) 0x3726 JNE	3660

  (69) 0x372c MOV	0x1768(%RSP),%RCX

  (69) 0x3734 MOV	$-0x80000000,%RDX

  (69) 0x373b AND	%RDX,%RCX

  (69) 0x373e MOV	0x3f0(%RSP),%RDX

  (69) 0x3746 MOV	%EDX,%ESI

  (69) 0x3748 AND	$0x7ffffffe,%ESI

  (69) 0x374e OR	%RCX,%RSI

  (69) 0x3751 SHR	$0x1,%RSI

  (69) 0x3754 XOR	0x1050(%RSP),%RSI

  (69) 0x375c AND	$0x1,%EDX

  (69) 0x375f NEG	%EDX

  (69) 0x3761 AND	%EDI,%EDX

  (69) 0x3763 XOR	%RSI,%RDX

  (69) 0x3766 MOV	%RDX,0x1768(%RSP)

  (69) 0x376e XOR	%ECX,%ECX

  (69) 0x3770 JMP	3390

  (69) 0x3775 VMOVSS	%XMM0,(%RBX,%RAX,4)

  (69) 0x377a JMP	37e3

0x377c NOPL	(%RAX)

    (73) 0x3780 MOV	%RCX,%RDX

    (73) 0x3783 INC	%RCX

    (73) 0x3786 MOV	%RCX,0x1770(%RSP)

    (73) 0x378e MOV	0x3f0(%RSP,%RDX,8),%RDX

    (73) 0x3796 MOV	%RDX,%RSI

    (73) 0x3799 SHR	$0xb,%RSI

    (73) 0x379d MOV	%ESI,%ESI

    (73) 0x379f XOR	%RDX,%RSI

    (73) 0x37a2 MOV	%ESI,%EDX

    (73) 0x37a4 SAL	$0x7,%EDX

    (73) 0x37a7 AND	$-0x62d3a980,%EDX

    (73) 0x37ad XOR	%RSI,%RDX

    (73) 0x37b0 MOV	%EDX,%ESI

    (73) 0x37b2 SAL	$0xf,%ESI

    (73) 0x37b5 AND	$-0x103a0000,%ESI

    (73) 0x37bb XOR	%RDX,%RSI

    (73) 0x37be MOV	%RSI,%RDX

    (73) 0x37c1 SHR	$0x12,%RDX

    (73) 0x37c5 XOR	%ESI,%EDX

    (73) 0x37c7 VCVTUSI2SS	%EDX,%XMM15,%XMM0

    (73) 0x37cd VMULSS	0x2833(%RIP),%XMM0,%XMM0

    (73) 0x37d5 VUCOMISS	0x282f(%RIP),%XMM0

    (73) 0x37dd JB	3b65

    (73) 0x37e3 CMP	$0x270,%RCX

    (73) 0x37ea JB	3780

    (73) 0x37ec VPBROADCASTQ	0x3f0(%RSP),%ZMM0

    (73) 0x37f4 XOR	%ECX,%ECX

    (73) 0x37f6 VPBROADCASTQ	0x2838(%RIP),%ZMM12

    (73) 0x3800 VPBROADCASTQ	0x2836(%RIP),%ZMM13

    (73) 0x380a VPBROADCASTQ	0x2834(%RIP),%ZMM14

    (73) 0x3814 VPBROADCASTQ	0x2832(%RIP),%ZMM15

    (73) 0x381e XCHG	%AX,%AX

      (74) 0x3820 VMOVDQA64	%ZMM0,%ZMM1

      (74) 0x3826 VMOVDQU64	0x3f8(%RSP,%RCX,8),%ZMM2

      (74) 0x3831 VMOVDQU64	0x438(%RSP,%RCX,8),%ZMM3

      (74) 0x383c VMOVDQU64	0x478(%RSP,%RCX,8),%ZMM4

      (74) 0x3847 VMOVDQU64	0x4b8(%RSP,%RCX,8),%ZMM0

      (74) 0x3852 VALIGNQ	$0x7,%ZMM1,%ZMM2,%ZMM1

      (74) 0x3859 VALIGNQ	$0x7,%ZMM2,%ZMM3,%ZMM5

      (74) 0x3860 VALIGNQ	$0x7,%ZMM3,%ZMM4,%ZMM6

      (74) 0x3867 VALIGNQ	$0x7,%ZMM4,%ZMM0,%ZMM7

      (74) 0x386e VPANDQ	%ZMM13,%ZMM2,%ZMM8

      (74) 0x3874 VPANDQ	%ZMM13,%ZMM3,%ZMM9

      (74) 0x387a VPANDQ	%ZMM13,%ZMM4,%ZMM10

      (74) 0x3880 VPANDQ	%ZMM13,%ZMM0,%ZMM11

      (74) 0x3886 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM1,%ZMM8

      (74) 0x388d VPTERNLOGQ	$-0x8,%ZMM12,%ZMM5,%ZMM9

      (74) 0x3894 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM6,%ZMM10

      (74) 0x389b VPTERNLOGQ	$-0x8,%ZMM12,%ZMM7,%ZMM11

      (74) 0x38a2 VPSRLQ	$0x1,%ZMM8,%ZMM1

      (74) 0x38a9 VPSRLQ	$0x1,%ZMM9,%ZMM5

      (74) 0x38b0 VPSRLQ	$0x1,%ZMM10,%ZMM6

      (74) 0x38b7 VPSRLQ	$0x1,%ZMM11,%ZMM7

      (74) 0x38be VPXORQ	0x1058(%RSP,%RCX,8),%ZMM1,%ZMM1

      (74) 0x38c9 VPXORQ	0x1098(%RSP,%RCX,8),%ZMM5,%ZMM5

      (74) 0x38d4 VPXORQ	0x10d8(%RSP,%RCX,8),%ZMM6,%ZMM6

      (74) 0x38df VPXORQ	0x1118(%RSP,%RCX,8),%ZMM7,%ZMM7

      (74) 0x38ea VPTESTMQ	%ZMM14,%ZMM2,%K1

      (74) 0x38f0 VPTESTMQ	%ZMM14,%ZMM3,%K2

      (74) 0x38f6 VPTESTMQ	%ZMM14,%ZMM4,%K3

      (74) 0x38fc VPTESTMQ	%ZMM14,%ZMM0,%K4

      (74) 0x3902 VPXORQ	%ZMM15,%ZMM1,%ZMM1{%K1}

      (74) 0x3908 VPXORQ	%ZMM15,%ZMM5,%ZMM5{%K2}

      (74) 0x390e VPXORQ	%ZMM15,%ZMM6,%ZMM6{%K3}

      (74) 0x3914 VPXORQ	%ZMM15,%ZMM7,%ZMM7{%K4}

      (74) 0x391a VMOVDQU64	%ZMM1,0x3f0(%RSP,%RCX,8)

      (74) 0x3925 VMOVDQU64	%ZMM5,0x430(%RSP,%RCX,8)

      (74) 0x3930 VMOVDQU64	%ZMM6,0x470(%RSP,%RCX,8)

      (74) 0x393b VMOVDQU64	%ZMM7,0x4b0(%RSP,%RCX,8)

      (74) 0x3946 ADD	$0x20,%RCX

      (74) 0x394a CMP	$0xe0,%RCX

      (74) 0x3951 JNE	3820

    (73) 0x3957 VEXTRACTI32X4	$0x3,%ZMM0,%XMM0

    (73) 0x395e VPEXTRQ	$0x1,%XMM0,%RSI

    (73) 0x3964 AND	$-0x80000000,%RSI

    (73) 0x396b MOV	0xaf8(%RSP),%RDX

    (73) 0x3973 MOV	0xb00(%RSP),%RCX

    (73) 0x397b MOV	%EDX,%EDI

    (73) 0x397d AND	$0x7ffffffe,%EDI

    (73) 0x3983 OR	%RSI,%RDI

    (73) 0x3986 SHR	$0x1,%RDI

    (73) 0x3989 XOR	0x1758(%RSP),%RDI

    (73) 0x3991 MOV	%EDX,%ESI

    (73) 0x3993 AND	$0x1,%ESI

    (73) 0x3996 NEG	%ESI

    (73) 0x3998 MOV	$-0x66f74f21,%R8D

    (73) 0x399e AND	%R8D,%ESI

    (73) 0x39a1 XOR	%RDI,%RSI

    (73) 0x39a4 MOV	%RSI,0xaf0(%RSP)

    (73) 0x39ac AND	$-0x80000000,%RDX

    (73) 0x39b3 MOV	%ECX,%ESI

    (73) 0x39b5 AND	$0x7ffffffe,%ESI

    (73) 0x39bb OR	%RDX,%RSI

    (73) 0x39be SHR	$0x1,%RSI

    (73) 0x39c1 XOR	0x1760(%RSP),%RSI

    (73) 0x39c9 MOV	%ECX,%EDX

    (73) 0x39cb AND	$0x1,%EDX

    (73) 0x39ce NEG	%EDX

    (73) 0x39d0 AND	%R8D,%EDX

    (73) 0x39d3 XOR	%RSI,%RDX

    (73) 0x39d6 MOV	%RDX,0xaf8(%RSP)

    (73) 0x39de AND	$-0x80000000,%RCX

    (73) 0x39e5 MOV	0xb08(%RSP),%RDX

    (73) 0x39ed MOV	%EDX,%ESI

    (73) 0x39ef VPBROADCASTQ	%RDX,%XMM0

    (73) 0x39f5 AND	$0x7ffffffe,%EDX

    (73) 0x39fb OR	%RCX,%RDX

    (73) 0x39fe SHR	$0x1,%RDX

    (73) 0x3a01 XOR	0x1768(%RSP),%RDX

    (73) 0x3a09 AND	$0x1,%ESI

    (73) 0x3a0c NEG	%ESI

    (73) 0x3a0e MOV	$-0x66f74f21,%EDI

    (73) 0x3a13 AND	%R8D,%ESI

    (73) 0x3a16 XOR	%RDX,%RSI

    (73) 0x3a19 MOV	%RSI,0xb00(%RSP)

    (73) 0x3a21 MOV	$0xe8,%ECX

    (73) 0x3a26 VPBROADCASTQ	0x2609(%RIP),%XMM5

    (73) 0x3a2f VPBROADCASTQ	0x2608(%RIP),%XMM6

    (73) 0x3a38 VPBROADCASTQ	0x2607(%RIP),%XMM7

    (73) 0x3a41 VPBROADCASTQ	0x2606(%RIP),%XMM8

    (73) 0x3a4a NOPW	(%RAX,%RAX,1)

      (75) 0x3a50 VMOVDQU	0x3d0(%RSP,%RCX,8),%XMM1

      (75) 0x3a59 VMOVDQU	0x3e0(%RSP,%RCX,8),%XMM2

      (75) 0x3a62 VPALIGNR	$0x8,%XMM0,%XMM1,%XMM0

      (75) 0x3a68 VMOVDQU	0x3f0(%RSP,%RCX,8),%XMM3

      (75) 0x3a71 VPAND	%XMM6,%XMM1,%XMM4

      (75) 0x3a75 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM4

      (75) 0x3a7c VPSRLQ	$0x1,%XMM4,%XMM0

      (75) 0x3a81 VPXOR	-0x350(%RSP,%RCX,8),%XMM0,%XMM0

      (75) 0x3a8a VPTESTMQ	%XMM7,%XMM1,%K1

      (75) 0x3a90 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (75) 0x3a96 VMOVDQU	%XMM0,0x3c8(%RSP,%RCX,8)

      (75) 0x3a9f VPALIGNR	$0x8,%XMM1,%XMM2,%XMM0

      (75) 0x3aa5 VPAND	%XMM6,%XMM2,%XMM1

      (75) 0x3aa9 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

      (75) 0x3ab0 VPSRLQ	$0x1,%XMM1,%XMM0

      (75) 0x3ab5 VPXOR	-0x340(%RSP,%RCX,8),%XMM0,%XMM0

      (75) 0x3abe VPTESTMQ	%XMM7,%XMM2,%K1

      (75) 0x3ac4 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (75) 0x3aca VMOVDQU	%XMM0,0x3d8(%RSP,%RCX,8)

      (75) 0x3ad3 VPALIGNR	$0x8,%XMM2,%XMM3,%XMM0

      (75) 0x3ad9 VPAND	%XMM6,%XMM3,%XMM1

      (75) 0x3add VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

      (75) 0x3ae4 VPSRLQ	$0x1,%XMM1,%XMM0

      (75) 0x3ae9 VPXOR	-0x330(%RSP,%RCX,8),%XMM0,%XMM0

      (75) 0x3af2 VPTESTMQ	%XMM7,%XMM3,%K1

      (75) 0x3af8 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (75) 0x3afe VMOVDQU	%XMM0,0x3e8(%RSP,%RCX,8)

      (75) 0x3b07 ADD	$0x6,%RCX

      (75) 0x3b0b VMOVDQA	%XMM3,%XMM0

      (75) 0x3b0f CMP	$0x274,%RCX

      (75) 0x3b16 JNE	3a50

    (73) 0x3b1c MOV	0x1768(%RSP),%RCX

    (73) 0x3b24 MOV	$-0x80000000,%RDX

    (73) 0x3b2b AND	%RDX,%RCX

    (73) 0x3b2e MOV	0x3f0(%RSP),%RDX

    (73) 0x3b36 MOV	%EDX,%ESI

    (73) 0x3b38 AND	$0x7ffffffe,%ESI

    (73) 0x3b3e OR	%RCX,%RSI

    (73) 0x3b41 SHR	$0x1,%RSI

    (73) 0x3b44 XOR	0x1050(%RSP),%RSI

    (73) 0x3b4c AND	$0x1,%EDX

    (73) 0x3b4f NEG	%EDX

    (73) 0x3b51 AND	%EDI,%EDX

    (73) 0x3b53 XOR	%RSI,%RDX

    (73) 0x3b56 MOV	%RDX,0x1768(%RSP)

    (73) 0x3b5e XOR	%ECX,%ECX

    (73) 0x3b60 JMP	3780

  (69) 0x3b65 MOV	0x60(%RSP),%RDX

  (69) 0x3b6a VMOVSS	%XMM0,(%RDX,%RAX,4)

  (69) 0x3b6f JMP	3be3

0x3b71 NOPW	%CS:(%RAX,%RAX,1)

    (70) 0x3b80 MOV	%RCX,%RDX

    (70) 0x3b83 INC	%RCX

    (70) 0x3b86 MOV	%RCX,0x1770(%RSP)

    (70) 0x3b8e MOV	0x3f0(%RSP,%RDX,8),%RDX

    (70) 0x3b96 MOV	%RDX,%RSI

    (70) 0x3b99 SHR	$0xb,%RSI

    (70) 0x3b9d MOV	%ESI,%ESI

    (70) 0x3b9f XOR	%RDX,%RSI

    (70) 0x3ba2 MOV	%ESI,%EDX

    (70) 0x3ba4 SAL	$0x7,%EDX

    (70) 0x3ba7 AND	$-0x62d3a980,%EDX

    (70) 0x3bad XOR	%RSI,%RDX

    (70) 0x3bb0 MOV	%EDX,%ESI

    (70) 0x3bb2 SAL	$0xf,%ESI

    (70) 0x3bb5 AND	$-0x103a0000,%ESI

    (70) 0x3bbb XOR	%RDX,%RSI

    (70) 0x3bbe MOV	%RSI,%RDX

    (70) 0x3bc1 SHR	$0x12,%RDX

    (70) 0x3bc5 XOR	%ESI,%EDX

    (70) 0x3bc7 VCVTUSI2SS	%EDX,%XMM15,%XMM0

    (70) 0x3bcd VMULSS	0x2433(%RIP),%XMM0,%XMM0

    (70) 0x3bd5 VUCOMISS	0x242f(%RIP),%XMM0

    (70) 0x3bdd JB	3f65

    (70) 0x3be3 CMP	$0x270,%RCX

    (70) 0x3bea JB	3b80

    (70) 0x3bec VPBROADCASTQ	0x3f0(%RSP),%ZMM0

    (70) 0x3bf4 XOR	%ECX,%ECX

    (70) 0x3bf6 VPBROADCASTQ	0x2438(%RIP),%ZMM12

    (70) 0x3c00 VPBROADCASTQ	0x2436(%RIP),%ZMM13

    (70) 0x3c0a VPBROADCASTQ	0x2434(%RIP),%ZMM14

    (70) 0x3c14 VPBROADCASTQ	0x2432(%RIP),%ZMM15

    (70) 0x3c1e XCHG	%AX,%AX

      (71) 0x3c20 VMOVDQA64	%ZMM0,%ZMM1

      (71) 0x3c26 VMOVDQU64	0x3f8(%RSP,%RCX,8),%ZMM2

      (71) 0x3c31 VMOVDQU64	0x438(%RSP,%RCX,8),%ZMM3

      (71) 0x3c3c VMOVDQU64	0x478(%RSP,%RCX,8),%ZMM4

      (71) 0x3c47 VMOVDQU64	0x4b8(%RSP,%RCX,8),%ZMM0

      (71) 0x3c52 VALIGNQ	$0x7,%ZMM1,%ZMM2,%ZMM1

      (71) 0x3c59 VALIGNQ	$0x7,%ZMM2,%ZMM3,%ZMM5

      (71) 0x3c60 VALIGNQ	$0x7,%ZMM3,%ZMM4,%ZMM6

      (71) 0x3c67 VALIGNQ	$0x7,%ZMM4,%ZMM0,%ZMM7

      (71) 0x3c6e VPANDQ	%ZMM13,%ZMM2,%ZMM8

      (71) 0x3c74 VPANDQ	%ZMM13,%ZMM3,%ZMM9

      (71) 0x3c7a VPANDQ	%ZMM13,%ZMM4,%ZMM10

      (71) 0x3c80 VPANDQ	%ZMM13,%ZMM0,%ZMM11

      (71) 0x3c86 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM1,%ZMM8

      (71) 0x3c8d VPTERNLOGQ	$-0x8,%ZMM12,%ZMM5,%ZMM9

      (71) 0x3c94 VPTERNLOGQ	$-0x8,%ZMM12,%ZMM6,%ZMM10

      (71) 0x3c9b VPTERNLOGQ	$-0x8,%ZMM12,%ZMM7,%ZMM11

      (71) 0x3ca2 VPSRLQ	$0x1,%ZMM8,%ZMM1

      (71) 0x3ca9 VPSRLQ	$0x1,%ZMM9,%ZMM5

      (71) 0x3cb0 VPSRLQ	$0x1,%ZMM10,%ZMM6

      (71) 0x3cb7 VPSRLQ	$0x1,%ZMM11,%ZMM7

      (71) 0x3cbe VPXORQ	0x1058(%RSP,%RCX,8),%ZMM1,%ZMM1

      (71) 0x3cc9 VPXORQ	0x1098(%RSP,%RCX,8),%ZMM5,%ZMM5

      (71) 0x3cd4 VPXORQ	0x10d8(%RSP,%RCX,8),%ZMM6,%ZMM6

      (71) 0x3cdf VPXORQ	0x1118(%RSP,%RCX,8),%ZMM7,%ZMM7

      (71) 0x3cea VPTESTMQ	%ZMM14,%ZMM2,%K1

      (71) 0x3cf0 VPTESTMQ	%ZMM14,%ZMM3,%K2

      (71) 0x3cf6 VPTESTMQ	%ZMM14,%ZMM4,%K3

      (71) 0x3cfc VPTESTMQ	%ZMM14,%ZMM0,%K4

      (71) 0x3d02 VPXORQ	%ZMM15,%ZMM1,%ZMM1{%K1}

      (71) 0x3d08 VPXORQ	%ZMM15,%ZMM5,%ZMM5{%K2}

      (71) 0x3d0e VPXORQ	%ZMM15,%ZMM6,%ZMM6{%K3}

      (71) 0x3d14 VPXORQ	%ZMM15,%ZMM7,%ZMM7{%K4}

      (71) 0x3d1a VMOVDQU64	%ZMM1,0x3f0(%RSP,%RCX,8)

      (71) 0x3d25 VMOVDQU64	%ZMM5,0x430(%RSP,%RCX,8)

      (71) 0x3d30 VMOVDQU64	%ZMM6,0x470(%RSP,%RCX,8)

      (71) 0x3d3b VMOVDQU64	%ZMM7,0x4b0(%RSP,%RCX,8)

      (71) 0x3d46 ADD	$0x20,%RCX

      (71) 0x3d4a CMP	$0xe0,%RCX

      (71) 0x3d51 JNE	3c20

    (70) 0x3d57 VEXTRACTI32X4	$0x3,%ZMM0,%XMM0

    (70) 0x3d5e VPEXTRQ	$0x1,%XMM0,%RSI

    (70) 0x3d64 AND	$-0x80000000,%RSI

    (70) 0x3d6b MOV	0xaf8(%RSP),%RDX

    (70) 0x3d73 MOV	0xb00(%RSP),%RCX

    (70) 0x3d7b MOV	%EDX,%EDI

    (70) 0x3d7d AND	$0x7ffffffe,%EDI

    (70) 0x3d83 OR	%RSI,%RDI

    (70) 0x3d86 SHR	$0x1,%RDI

    (70) 0x3d89 XOR	0x1758(%RSP),%RDI

    (70) 0x3d91 MOV	%EDX,%ESI

    (70) 0x3d93 AND	$0x1,%ESI

    (70) 0x3d96 NEG	%ESI

    (70) 0x3d98 MOV	$-0x66f74f21,%R8D

    (70) 0x3d9e AND	%R8D,%ESI

    (70) 0x3da1 XOR	%RDI,%RSI

    (70) 0x3da4 MOV	%RSI,0xaf0(%RSP)

    (70) 0x3dac AND	$-0x80000000,%RDX

    (70) 0x3db3 MOV	%ECX,%ESI

    (70) 0x3db5 AND	$0x7ffffffe,%ESI

    (70) 0x3dbb OR	%RDX,%RSI

    (70) 0x3dbe SHR	$0x1,%RSI

    (70) 0x3dc1 XOR	0x1760(%RSP),%RSI

    (70) 0x3dc9 MOV	%ECX,%EDX

    (70) 0x3dcb AND	$0x1,%EDX

    (70) 0x3dce NEG	%EDX

    (70) 0x3dd0 AND	%R8D,%EDX

    (70) 0x3dd3 XOR	%RSI,%RDX

    (70) 0x3dd6 MOV	%RDX,0xaf8(%RSP)

    (70) 0x3dde AND	$-0x80000000,%RCX

    (70) 0x3de5 MOV	0xb08(%RSP),%RDX

    (70) 0x3ded MOV	%EDX,%ESI

    (70) 0x3def VPBROADCASTQ	%RDX,%XMM0

    (70) 0x3df5 AND	$0x7ffffffe,%EDX

    (70) 0x3dfb OR	%RCX,%RDX

    (70) 0x3dfe SHR	$0x1,%RDX

    (70) 0x3e01 XOR	0x1768(%RSP),%RDX

    (70) 0x3e09 AND	$0x1,%ESI

    (70) 0x3e0c NEG	%ESI

    (70) 0x3e0e MOV	$-0x66f74f21,%EDI

    (70) 0x3e13 AND	%R8D,%ESI

    (70) 0x3e16 XOR	%RDX,%RSI

    (70) 0x3e19 MOV	%RSI,0xb00(%RSP)

    (70) 0x3e21 MOV	$0xe8,%ECX

    (70) 0x3e26 VPBROADCASTQ	0x2209(%RIP),%XMM5

    (70) 0x3e2f VPBROADCASTQ	0x2208(%RIP),%XMM6

    (70) 0x3e38 VPBROADCASTQ	0x2207(%RIP),%XMM7

    (70) 0x3e41 VPBROADCASTQ	0x2206(%RIP),%XMM8

    (70) 0x3e4a NOPW	(%RAX,%RAX,1)

      (72) 0x3e50 VMOVDQU	0x3d0(%RSP,%RCX,8),%XMM1

      (72) 0x3e59 VMOVDQU	0x3e0(%RSP,%RCX,8),%XMM2

      (72) 0x3e62 VPALIGNR	$0x8,%XMM0,%XMM1,%XMM0

      (72) 0x3e68 VMOVDQU	0x3f0(%RSP,%RCX,8),%XMM3

      (72) 0x3e71 VPAND	%XMM6,%XMM1,%XMM4

      (72) 0x3e75 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM4

      (72) 0x3e7c VPSRLQ	$0x1,%XMM4,%XMM0

      (72) 0x3e81 VPXOR	-0x350(%RSP,%RCX,8),%XMM0,%XMM0

      (72) 0x3e8a VPTESTMQ	%XMM7,%XMM1,%K1

      (72) 0x3e90 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (72) 0x3e96 VMOVDQU	%XMM0,0x3c8(%RSP,%RCX,8)

      (72) 0x3e9f VPALIGNR	$0x8,%XMM1,%XMM2,%XMM0

      (72) 0x3ea5 VPAND	%XMM6,%XMM2,%XMM1

      (72) 0x3ea9 VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

      (72) 0x3eb0 VPSRLQ	$0x1,%XMM1,%XMM0

      (72) 0x3eb5 VPXOR	-0x340(%RSP,%RCX,8),%XMM0,%XMM0

      (72) 0x3ebe VPTESTMQ	%XMM7,%XMM2,%K1

      (72) 0x3ec4 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (72) 0x3eca VMOVDQU	%XMM0,0x3d8(%RSP,%RCX,8)

      (72) 0x3ed3 VPALIGNR	$0x8,%XMM2,%XMM3,%XMM0

      (72) 0x3ed9 VPAND	%XMM6,%XMM3,%XMM1

      (72) 0x3edd VPTERNLOGQ	$-0x8,%XMM5,%XMM0,%XMM1

      (72) 0x3ee4 VPSRLQ	$0x1,%XMM1,%XMM0

      (72) 0x3ee9 VPXOR	-0x330(%RSP,%RCX,8),%XMM0,%XMM0

      (72) 0x3ef2 VPTESTMQ	%XMM7,%XMM3,%K1

      (72) 0x3ef8 VPXORQ	%XMM8,%XMM0,%XMM0{%K1}

      (72) 0x3efe VMOVDQU	%XMM0,0x3e8(%RSP,%RCX,8)

      (72) 0x3f07 ADD	$0x6,%RCX

      (72) 0x3f0b VMOVDQA	%XMM3,%XMM0

      (72) 0x3f0f CMP	$0x274,%RCX

      (72) 0x3f16 JNE	3e50

    (70) 0x3f1c MOV	0x1768(%RSP),%RCX

    (70) 0x3f24 MOV	$-0x80000000,%RDX

    (70) 0x3f2b AND	%RDX,%RCX

    (70) 0x3f2e MOV	0x3f0(%RSP),%RDX

    (70) 0x3f36 MOV	%EDX,%ESI

    (70) 0x3f38 AND	$0x7ffffffe,%ESI

    (70) 0x3f3e OR	%RCX,%RSI

    (70) 0x3f41 SHR	$0x1,%RSI

    (70) 0x3f44 XOR	0x1050(%RSP),%RSI

    (70) 0x3f4c AND	$0x1,%EDX

    (70) 0x3f4f NEG	%EDX

    (70) 0x3f51 AND	%EDI,%EDX

    (70) 0x3f53 XOR	%RSI,%RDX

    (70) 0x3f56 MOV	%RDX,0x1768(%RSP)

    (70) 0x3f5e XOR	%ECX,%ECX

    (70) 0x3f60 JMP	3b80

  (69) 0x3f65 MOV	0x98(%RSP),%RDX

  (69) 0x3f6d VMOVSS	%XMM0,(%RDX,%RAX,4)

  (69) 0x3f72 INC	%RAX

  (69) 0x3f75 CMP	0x58(%RSP),%RAX

  (69) 0x3f7a JNE	33f3

(39) 0x3f80 VZEROUPPER

(39) 0x3f83 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x3f88 MOV	%RAX,0xe0(%RSP)

(39) 0x3f90 XOR	%EDX,%EDX

(39) 0x3f92 XOR	%ECX,%ECX

(39) 0x3f94 JMP	3fb4

0x3f96 NOPW	%CS:(%RAX,%RAX,1)

  (66) 0x3fa0 MOV	0x8(%RSP),%RDX

  (66) 0x3fa5 INC	%EDX

  (66) 0x3fa7 ADD	%R12,%RCX

  (66) 0x3faa CMP	0x48(%RSP),%EDX

  (66) 0x3fae JE	4120

  (66) 0x3fb4 MOV	%RDX,0x8(%RSP)

  (66) 0x3fb9 IMUL	%R12D,%EDX

  (66) 0x3fbd XOR	%ESI,%ESI

  (66) 0x3fbf JMP	3fec

0x3fc1 NOPW	%CS:(%RAX,%RAX,1)

    (67) 0x3fd0 VCVTSD2SS	%XMM0,%XMM0,%XMM0

    (67) 0x3fd4 LEA	(%RDX,%RSI,1),%EDI

    (67) 0x3fd7 MOV	0x20(%RSP),%R8

    (67) 0x3fdc VMOVSS	%XMM0,(%R8,%RDI,4)

    (67) 0x3fe2 INC	%RSI

    (67) 0x3fe5 CMP	0x30(%RSP),%RSI

    (67) 0x3fea JE	3fa0

    (67) 0x3fec CMPL	$0x3,0xd8(%RSP)

    (67) 0x3ff4 JAE	4010

    (67) 0x3ff6 VXORPS	%XMM0,%XMM0,%XMM0

    (67) 0x3ffa XOR	%EDI,%EDI

    (67) 0x3ffc JMP	40d5

0x4001 NOPW	%CS:(%RAX,%RAX,1)

    (67) 0x4010 VXORPS	%XMM0,%XMM0,%XMM0

    (67) 0x4014 MOV	%RSI,%R8

    (67) 0x4017 XOR	%EDI,%EDI

    (67) 0x4019 MOV	0xc8(%RSP),%R10

    (67) 0x4021 LEA	(%R12,%R12,2),%R11

    (67) 0x4025 LEA	(%R12,%R12,1),%RAX

    (67) 0x4029 NOPL	(%RAX)

      (31) 0x4030 LEA	(%RCX,%RDI,1),%R9D

      (31) 0x4034 VMOVSS	(%R14,%R9,4),%XMM1

      (31) 0x403a VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (31) 0x403e MOV	%R8D,%R9D

      (31) 0x4041 VMOVSS	(%RBX,%R9,4),%XMM2

      (31) 0x4047 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (31) 0x404b LEA	0x1(%RCX,%RDI,1),%R9D

      (31) 0x4050 VMOVSS	(%R14,%R9,4),%XMM3

      (31) 0x4056 VCVTSS2SD	%XMM3,%XMM3,%XMM3

      (31) 0x405a LEA	(%R12,%R8,1),%R9D

      (31) 0x405e VMOVSS	(%RBX,%R9,4),%XMM4

      (31) 0x4064 VCVTSS2SD	%XMM4,%XMM4,%XMM4

      (31) 0x4068 LEA	0x2(%RCX,%RDI,1),%R9D

      (31) 0x406d VMOVSS	(%R14,%R9,4),%XMM5

      (31) 0x4073 VFMADD213SD	%XMM0,%XMM1,%XMM2

      (31) 0x4078 VCVTSS2SD	%XMM5,%XMM5,%XMM0

      (31) 0x407c LEA	(%RAX,%R8,1),%R9D

      (31) 0x4080 VMOVSS	(%RBX,%R9,4),%XMM1

      (31) 0x4086 VFMADD213SD	%XMM2,%XMM3,%XMM4

      (31) 0x408b VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (31) 0x408f LEA	0x3(%RCX,%RDI,1),%R9D

      (31) 0x4094 VMOVSS	(%R14,%R9,4),%XMM2

      (31) 0x409a VFMADD213SD	%XMM4,%XMM0,%XMM1

      (31) 0x409f VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (31) 0x40a3 LEA	(%R11,%R8,1),%R9D

      (31) 0x40a7 VMOVSS	(%RBX,%R9,4),%XMM0

      (31) 0x40ad VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (31) 0x40b1 VFMADD213SD	%XMM1,%XMM2,%XMM0

      (31) 0x40b6 ADD	$0x4,%RDI

      (31) 0x40ba ADD	%R13,%R8

      (31) 0x40bd CMP	%RDI,%R10

      (31) 0x40c0 JNE	4030

    (67) 0x40c6 CMPQ	$0,0xd0(%RSP)

    (67) 0x40cf JE	3fd0

    (67) 0x40d5 MOV	%R12,%R8

    (67) 0x40d8 IMUL	%RDI,%R8

    (67) 0x40dc ADD	%RSI,%R8

    (67) 0x40df ADD	%ECX,%EDI

    (67) 0x40e1 MOV	0xd0(%RSP),%R9

    (67) 0x40e9 NOPL	(%RAX)

      (68) 0x40f0 MOV	%EDI,%R10D

      (68) 0x40f3 VMOVSS	(%R14,%R10,4),%XMM1

      (68) 0x40f9 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (68) 0x40fd MOV	%R8D,%R10D

      (68) 0x4100 VMOVSS	(%RBX,%R10,4),%XMM2

      (68) 0x4106 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (68) 0x410a VFMADD231SD	%XMM2,%XMM1,%XMM0

      (68) 0x410f ADD	%R12,%R8

      (68) 0x4112 INC	%EDI

      (68) 0x4114 DEC	%R9

      (68) 0x4117 JNE	40f0

    (67) 0x4119 JMP	3fd0

0x411e XCHG	%AX,%AX

(39) 0x4120 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4125 SUB	0xe0(%RSP),%RAX

(39) 0x412d MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x4137 IMUL	%RCX

(39) 0x413a MOV	%RDX,%RAX

(39) 0x413d SHR	$0x3f,%RAX

(39) 0x4141 SAR	$0x7,%RDX

(39) 0x4145 ADD	%RAX,%RDX

(39) 0x4148 ADD	%RDX,0x160(%RSP)

(39) 0x4150 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4155 MOV	%RAX,0xe0(%RSP)

(39) 0x415d XOR	%R15D,%R15D

(39) 0x4160 XOR	%ECX,%ECX

(39) 0x4162 MOV	0x60(%RSP),%R11

(39) 0x4167 MOV	0x98(%RSP),%RBX

(39) 0x416f MOV	0x38(%RSP),%RAX

(39) 0x4174 JMP	4196

0x4176 NOPW	%CS:(%RAX,%RAX,1)

  (63) 0x4180 MOV	0x8(%RSP),%R15

  (63) 0x4185 INC	%R15D

  (63) 0x4188 ADD	%R12,%RCX

  (63) 0x418b CMP	0x48(%RSP),%R15D

  (63) 0x4190 JE	42f0

  (63) 0x4196 MOV	%R15,0x8(%RSP)

  (63) 0x419b IMUL	%R12D,%R15D

  (63) 0x419f XOR	%ESI,%ESI

  (63) 0x41a1 JMP	41c7

0x41a3 NOPW	%CS:(%RAX,%RAX,1)

    (64) 0x41b0 VCVTSD2SS	%XMM0,%XMM0,%XMM0

    (64) 0x41b4 LEA	(%R15,%RSI,1),%EDI

    (64) 0x41b8 VMOVSS	%XMM0,(%RAX,%RDI,4)

    (64) 0x41bd INC	%RSI

    (64) 0x41c0 CMP	0x30(%RSP),%RSI

    (64) 0x41c5 JE	4180

    (64) 0x41c7 CMPL	$0x3,0xd8(%RSP)

    (64) 0x41cf JAE	41e0

    (64) 0x41d1 VXORPS	%XMM0,%XMM0,%XMM0

    (64) 0x41d5 XOR	%EDI,%EDI

    (64) 0x41d7 JMP	42a9

0x41dc NOPL	(%RAX)

    (64) 0x41e0 VXORPS	%XMM0,%XMM0,%XMM0

    (64) 0x41e4 MOV	%RSI,%R8

    (64) 0x41e7 XOR	%EDI,%EDI

    (64) 0x41e9 MOV	0xc8(%RSP),%R10

    (64) 0x41f1 MOV	%R13,%RAX

    (64) 0x41f4 LEA	(%R12,%R12,2),%R13

    (64) 0x41f8 LEA	(%R12,%R12,1),%RDX

    (64) 0x41fc NOPL	(%RAX)

      (32) 0x4200 LEA	(%RCX,%RDI,1),%R9D

      (32) 0x4204 VMOVSS	(%R14,%R9,4),%XMM1

      (32) 0x420a VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (32) 0x420e MOV	%R8D,%R9D

      (32) 0x4211 VMOVSS	(%R11,%R9,4),%XMM2

      (32) 0x4217 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (32) 0x421b LEA	0x1(%RCX,%RDI,1),%R9D

      (32) 0x4220 VMOVSS	(%R14,%R9,4),%XMM3

      (32) 0x4226 VCVTSS2SD	%XMM3,%XMM3,%XMM3

      (32) 0x422a LEA	(%R12,%R8,1),%R9D

      (32) 0x422e VMOVSS	(%R11,%R9,4),%XMM4

      (32) 0x4234 VCVTSS2SD	%XMM4,%XMM4,%XMM4

      (32) 0x4238 LEA	0x2(%RCX,%RDI,1),%R9D

      (32) 0x423d VMOVSS	(%R14,%R9,4),%XMM5

      (32) 0x4243 VFMADD213SD	%XMM0,%XMM1,%XMM2

      (32) 0x4248 VCVTSS2SD	%XMM5,%XMM5,%XMM0

      (32) 0x424c LEA	(%RDX,%R8,1),%R9D

      (32) 0x4250 VMOVSS	(%R11,%R9,4),%XMM1

      (32) 0x4256 VFMADD213SD	%XMM2,%XMM3,%XMM4

      (32) 0x425b VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (32) 0x425f LEA	0x3(%RCX,%RDI,1),%R9D

      (32) 0x4264 VMOVSS	(%R14,%R9,4),%XMM2

      (32) 0x426a VFMADD213SD	%XMM4,%XMM0,%XMM1

      (32) 0x426f VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (32) 0x4273 LEA	(%R13,%R8,1),%R9D

      (32) 0x4278 VMOVSS	(%R11,%R9,4),%XMM0

      (32) 0x427e VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (32) 0x4282 VFMADD213SD	%XMM1,%XMM2,%XMM0

      (32) 0x4287 ADD	$0x4,%RDI

      (32) 0x428b ADD	%RAX,%R8

      (32) 0x428e CMP	%RDI,%R10

      (32) 0x4291 JNE	4200

    (64) 0x4297 TEST	$0x3,%R12B

    (64) 0x429b MOV	%RAX,%R13

    (64) 0x429e MOV	0x38(%RSP),%RAX

    (64) 0x42a3 JE	41b0

    (64) 0x42a9 MOV	%R12,%R8

    (64) 0x42ac IMUL	%RDI,%R8

    (64) 0x42b0 ADD	%RSI,%R8

    (64) 0x42b3 ADD	%ECX,%EDI

    (64) 0x42b5 MOV	0xd0(%RSP),%R9

    (64) 0x42bd NOPL	(%RAX)

      (65) 0x42c0 MOV	%EDI,%R10D

      (65) 0x42c3 VMOVSS	(%R14,%R10,4),%XMM1

      (65) 0x42c9 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (65) 0x42cd MOV	%R8D,%R10D

      (65) 0x42d0 VMOVSS	(%R11,%R10,4),%XMM2

      (65) 0x42d6 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (65) 0x42da VFMADD231SD	%XMM2,%XMM1,%XMM0

      (65) 0x42df ADD	%R12,%R8

      (65) 0x42e2 INC	%EDI

      (65) 0x42e4 DEC	%R9

      (65) 0x42e7 JNE	42c0

    (64) 0x42e9 JMP	41b0

0x42ee XCHG	%AX,%AX

(39) 0x42f0 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x42f5 SUB	0xe0(%RSP),%RAX

(39) 0x42fd MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x4307 IMUL	%RCX

(39) 0x430a MOV	%RDX,%RAX

(39) 0x430d SHR	$0x3f,%RAX

(39) 0x4311 SAR	$0x7,%RDX

(39) 0x4315 ADD	%RAX,%RDX

(39) 0x4318 ADD	%RDX,0x168(%RSP)

(39) 0x4320 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4325 MOV	%RAX,0xe0(%RSP)

(39) 0x432d XOR	%EDX,%EDX

(39) 0x432f XOR	%ECX,%ECX

(39) 0x4331 MOV	0x150(%RSP),%R15

(39) 0x4339 JMP	4354

0x433b NOPL	(%RAX,%RAX,1)

  (60) 0x4340 MOV	0x8(%RSP),%RDX

  (60) 0x4345 INC	%EDX

  (60) 0x4347 ADD	%R12,%RCX

  (60) 0x434a CMP	0x48(%RSP),%EDX

  (60) 0x434e JE	44b0

  (60) 0x4354 MOV	%RDX,0x8(%RSP)

  (60) 0x4359 IMUL	%R12D,%EDX

  (60) 0x435d XOR	%ESI,%ESI

  (60) 0x435f JMP	4387

0x4361 NOPW	%CS:(%RAX,%RAX,1)

    (61) 0x4370 VCVTSD2SS	%XMM0,%XMM0,%XMM0

    (61) 0x4374 LEA	(%RDX,%RSI,1),%EDI

    (61) 0x4377 VMOVSS	%XMM0,(%R15,%RDI,4)

    (61) 0x437d INC	%RSI

    (61) 0x4380 CMP	0x30(%RSP),%RSI

    (61) 0x4385 JE	4340

    (61) 0x4387 CMPL	$0x3,0xd8(%RSP)

    (61) 0x438f JAE	43a0

    (61) 0x4391 VXORPS	%XMM0,%XMM0,%XMM0

    (61) 0x4395 XOR	%EDI,%EDI

    (61) 0x4397 JMP	4460

0x439c NOPL	(%RAX)

    (61) 0x43a0 VXORPS	%XMM0,%XMM0,%XMM0

    (61) 0x43a4 MOV	%RSI,%R8

    (61) 0x43a7 XOR	%EDI,%EDI

    (61) 0x43a9 MOV	0xc8(%RSP),%R10

    (61) 0x43b1 LEA	(%R12,%R12,2),%R11

    (61) 0x43b5 LEA	(%R12,%R12,1),%RAX

    (61) 0x43b9 NOPL	(%RAX)

      (33) 0x43c0 LEA	(%RCX,%RDI,1),%R9D

      (33) 0x43c4 VMOVSS	(%R14,%R9,4),%XMM1

      (33) 0x43ca VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (33) 0x43ce MOV	%R8D,%R9D

      (33) 0x43d1 VMOVSS	(%RBX,%R9,4),%XMM2

      (33) 0x43d7 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (33) 0x43db LEA	0x1(%RCX,%RDI,1),%R9D

      (33) 0x43e0 VMOVSS	(%R14,%R9,4),%XMM3

      (33) 0x43e6 VCVTSS2SD	%XMM3,%XMM3,%XMM3

      (33) 0x43ea LEA	(%R12,%R8,1),%R9D

      (33) 0x43ee VMOVSS	(%RBX,%R9,4),%XMM4

      (33) 0x43f4 VCVTSS2SD	%XMM4,%XMM4,%XMM4

      (33) 0x43f8 LEA	0x2(%RCX,%RDI,1),%R9D

      (33) 0x43fd VMOVSS	(%R14,%R9,4),%XMM5

      (33) 0x4403 VFMADD213SD	%XMM0,%XMM1,%XMM2

      (33) 0x4408 VCVTSS2SD	%XMM5,%XMM5,%XMM0

      (33) 0x440c LEA	(%RAX,%R8,1),%R9D

      (33) 0x4410 VMOVSS	(%RBX,%R9,4),%XMM1

      (33) 0x4416 VFMADD213SD	%XMM2,%XMM3,%XMM4

      (33) 0x441b VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (33) 0x441f LEA	0x3(%RCX,%RDI,1),%R9D

      (33) 0x4424 VMOVSS	(%R14,%R9,4),%XMM2

      (33) 0x442a VFMADD213SD	%XMM4,%XMM0,%XMM1

      (33) 0x442f VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (33) 0x4433 LEA	(%R11,%R8,1),%R9D

      (33) 0x4437 VMOVSS	(%RBX,%R9,4),%XMM0

      (33) 0x443d VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (33) 0x4441 VFMADD213SD	%XMM1,%XMM2,%XMM0

      (33) 0x4446 ADD	$0x4,%RDI

      (33) 0x444a ADD	%R13,%R8

      (33) 0x444d CMP	%RDI,%R10

      (33) 0x4450 JNE	43c0

    (61) 0x4456 TEST	$0x3,%R12B

    (61) 0x445a JE	4370

    (61) 0x4460 MOV	%R12,%R8

    (61) 0x4463 IMUL	%RDI,%R8

    (61) 0x4467 ADD	%RSI,%R8

    (61) 0x446a ADD	%ECX,%EDI

    (61) 0x446c MOV	0xd0(%RSP),%R9

    (61) 0x4474 NOPW	%CS:(%RAX,%RAX,1)

      (62) 0x4480 MOV	%EDI,%R10D

      (62) 0x4483 VMOVSS	(%R14,%R10,4),%XMM1

      (62) 0x4489 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (62) 0x448d MOV	%R8D,%R10D

      (62) 0x4490 VMOVSS	(%RBX,%R10,4),%XMM2

      (62) 0x4496 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (62) 0x449a VFMADD231SD	%XMM2,%XMM1,%XMM0

      (62) 0x449f ADD	%R12,%R8

      (62) 0x44a2 INC	%EDI

      (62) 0x44a4 DEC	%R9

      (62) 0x44a7 JNE	4480

    (61) 0x44a9 JMP	4370

0x44ae XCHG	%AX,%AX

(39) 0x44b0 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x44b5 SUB	0xe0(%RSP),%RAX

(39) 0x44bd MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x44c7 IMUL	%RCX

(39) 0x44ca MOV	%RDX,%RAX

(39) 0x44cd SHR	$0x3f,%RAX

(39) 0x44d1 SAR	$0x7,%RDX

(39) 0x44d5 ADD	%RAX,%RDX

(39) 0x44d8 ADD	%RDX,0x170(%RSP)

(39) 0x44e0 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x44e5 MOV	%RAX,%R15

(39) 0x44e8 MOV	0x28(%RSP),%RBX

(39) 0x44ed MOV	%RBX,%RAX

(39) 0x44f0 MOV	0x38(%RSP),%RCX

(39) 0x44f5 XOR	%EDX,%EDX

(39) 0x44f7 JMP	451d

0x44f9 NOPL	(%RAX)

  (57) 0x4500 INC	%RDX

  (57) 0x4503 ADD	0x230(%RSP),%RCX

  (57) 0x450b ADD	$0x4,%RAX

  (57) 0x450f CMP	0x238(%RSP),%RDX

  (57) 0x4517 JE	4690

  (57) 0x451d MOV	0x30(%RSP),%R9

  (57) 0x4522 CMP	$0x4,%R9D

  (57) 0x4526 JAE	4540

  (57) 0x4528 XOR	%EDI,%EDI

  (57) 0x452a MOV	0xb8(%RSP),%R10

  (57) 0x4532 JMP	465d

0x4537 NOPW	(%RAX,%RAX,1)

  (57) 0x4540 LEA	(%RBX,%RDX,4),%RSI

  (57) 0x4544 CMP	$0x10,%R9D

  (57) 0x4548 JAE	4560

  (57) 0x454a XOR	%R8D,%R8D

  (57) 0x454d JMP	45f9

0x4552 NOPW	%CS:(%RAX,%RAX,1)

  (57) 0x4560 XOR	%EDI,%EDI

  (57) 0x4562 VMOVDQA64	0x1b54(%RIP),%ZMM0

  (57) 0x456c VMOVDQA64	0x1b0a(%RIP),%ZMM1

  (57) 0x4576 MOV	0x1e0(%RSP),%R8

  (57) 0x457e VMOVDQA64	0x380(%RSP),%ZMM5

  (57) 0x4586 VPBROADCASTQ	0x1ac8(%RIP),%ZMM6

    (34) 0x4590 VPMULLQ	%ZMM5,%ZMM0,%ZMM2

    (34) 0x4596 VMOVUPS	(%RCX,%RDI,4),%YMM3

    (34) 0x459b VMOVUPS	0x20(%RCX,%RDI,4),%YMM4

    (34) 0x45a1 KXNORB	%K0,%K0,%K1

    (34) 0x45a5 VSCATTERQPS	%YMM3,(%RSI,%ZMM2,4){%K1}

    (34) 0x45ac VPMULLQ	%ZMM5,%ZMM1,%ZMM2

    (34) 0x45b2 KXNORB	%K0,%K0,%K1

    (34) 0x45b6 VSCATTERQPS	%YMM4,(%RSI,%ZMM2,4){%K1}

    (34) 0x45bd ADD	$0x10,%RDI

    (34) 0x45c1 VPADDQ	%ZMM6,%ZMM0,%ZMM0

    (34) 0x45c7 VPADDQ	%ZMM6,%ZMM1,%ZMM1

    (34) 0x45cd CMP	%RDI,%R8

    (34) 0x45d0 JNE	4590

  (57) 0x45d2 MOV	0x30(%RSP),%R9

  (57) 0x45d7 CMP	%R8D,%R9D

  (57) 0x45da MOV	0xb8(%RSP),%R10

  (57) 0x45e2 JE	4500

  (57) 0x45e8 MOV	0x1e0(%RSP),%RDI

  (57) 0x45f0 MOV	%RDI,%R8

  (57) 0x45f3 TEST	$0xc,%R12B

  (57) 0x45f7 JE	465d

  (57) 0x45f9 VPBROADCASTQ	%R8,%YMM0

  (57) 0x45ff VPOR	0x1af9(%RIP),%YMM0,%YMM0

  (57) 0x4607 MOV	0xc8(%RSP),%R10

  (57) 0x460f VMOVDQA64	0x380(%RSP),%ZMM3

  (57) 0x4617 VPBROADCASTQ	0x1a40(%RIP),%YMM4

    (59) 0x4620 VMOVUPS	(%RCX,%R8,4),%XMM1

    (59) 0x4626 VPMULLQ	%YMM3,%YMM0,%YMM2

    (59) 0x462c KXNORW	%K0,%K0,%K1

    (59) 0x4630 VSCATTERQPS	%XMM1,(%RSI,%YMM2,4){%K1}

    (59) 0x4637 ADD	$0x4,%R8

    (59) 0x463b VPADDQ	%YMM4,%YMM0,%YMM0

    (59) 0x463f CMP	%R8,%R10

    (59) 0x4642 JNE	4620

  (57) 0x4644 MOV	%R10,%RDI

  (57) 0x4647 MOV	0x30(%RSP),%R9

  (57) 0x464c CMP	%R10D,%R9D

  (57) 0x464f MOV	0xb8(%RSP),%R10

  (57) 0x4657 JE	4500

  (57) 0x465d MOV	%R10,%RSI

  (57) 0x4660 IMUL	%RDI,%RSI

  (57) 0x4664 ADD	%RAX,%RSI

  (57) 0x4667 NOPW	(%RAX,%RAX,1)

    (58) 0x4670 VMOVD	(%RCX,%RDI,4),%XMM0

    (58) 0x4675 VMOVD	%XMM0,(%RSI)

    (58) 0x4679 INC	%RDI

    (58) 0x467c ADD	%R10,%RSI

    (58) 0x467f CMP	%RDI,%R9

    (58) 0x4682 JNE	4670

  (57) 0x4684 JMP	4500

0x4689 NOPL	(%RAX)

(39) 0x4690 VZEROUPPER

(39) 0x4693 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4698 SUB	%R15,%RAX

(39) 0x469b MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x46a5 IMUL	%RCX

(39) 0x46a8 MOV	%RDX,%RAX

(39) 0x46ab SHR	$0x3f,%RAX

(39) 0x46af SAR	$0x7,%RDX

(39) 0x46b3 ADD	%RAX,%RDX

(39) 0x46b6 ADD	%RDX,0x178(%RSP)

(39) 0x46be CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x46c3 MOV	%RAX,0xc0(%RSP)

(39) 0x46cb XOR	%EDX,%EDX

(39) 0x46cd XOR	%ECX,%ECX

(39) 0x46cf MOV	0x48(%RSP),%RAX

(39) 0x46d4 JMP	46f5

0x46d6 NOPW	%CS:(%RAX,%RAX,1)

  (51) 0x46e0 MOV	0x100(%RSP),%RDX

  (51) 0x46e8 INC	%EDX

  (51) 0x46ea ADD	%R12,%RCX

  (51) 0x46ed CMP	%EAX,%EDX

  (51) 0x46ef JE	4a60

  (51) 0x46f5 MOV	%EDX,%ESI

  (51) 0x46f7 IMUL	%R12D,%ESI

  (51) 0x46fb MOV	%RDX,0x100(%RSP)

  (51) 0x4703 IMUL	%EAX,%EDX

  (51) 0x4706 MOV	%RDX,0x8(%RSP)

  (51) 0x470b ADD	0xd8(%RSP),%ESI

  (51) 0x4712 SETB	%AL

  (51) 0x4715 OR	0x1f(%RSP),%AL

  (51) 0x4719 MOV	%AL,0xe0(%RSP)

  (51) 0x4720 XOR	%EDI,%EDI

  (51) 0x4722 JMP	4770

    (52) 0x4724 MOV	0x28(%RSP),%R15

    (52) 0x4729 NOPL	(%RAX)

    (52) 0x4730 VCVTSD2SS	%XMM0,%XMM0,%XMM0

    (52) 0x4734 VDIVSS	0x1d4(%RSP),%XMM0,%XMM0

    (52) 0x473d MOV	0x8(%RSP),%RAX

    (52) 0x4742 LEA	(%RAX,%RDI,1),%R8D

    (52) 0x4746 MOV	0x78(%RSP),%R13

    (52) 0x474b VMOVSS	%XMM0,(%R13,%R8,4)

    (52) 0x4752 INC	%RDI

    (52) 0x4755 CMP	0x50(%RSP),%RDI

    (52) 0x475a MOV	0x48(%RSP),%RAX

    (52) 0x475f MOV	%R15,%RBX

    (52) 0x4762 MOV	0x150(%RSP),%R15

    (52) 0x476a JE	46e0

    (52) 0x4770 VPXOR	%XMM0,%XMM0,%XMM0

    (52) 0x4774 MOV	0x30(%RSP),%RAX

    (52) 0x4779 CMP	$0x4,%EAX

    (52) 0x477c JB	479b

    (52) 0x477e MOV	%EDI,%R8D

    (52) 0x4781 ADD	0xd8(%RSP),%R8D

    (52) 0x4789 SETB	%R8B

    (52) 0x478d OR	0xe0(%RSP),%R8B

    (52) 0x4795 JE	4900

    (52) 0x479b XOR	%R9D,%R9D

    (52) 0x479e TEST	$0x3,%R12B

    (52) 0x47a2 JE	4800

    (52) 0x47a4 MOV	0x48(%RSP),%R13

    (52) 0x47a9 MOV	%R13,%R10

    (52) 0x47ac IMUL	%R9,%R10

    (52) 0x47b0 ADD	%RDI,%R10

    (52) 0x47b3 MOV	0xd0(%RSP),%R11

    (52) 0x47bb MOV	%R9,%R8

    (52) 0x47be MOV	0x20(%RSP),%RSI

    (52) 0x47c3 MOV	0x28(%RSP),%R15

    (52) 0x47c8 NOPL	(%RAX,%RAX,1)

      (54) 0x47d0 LEA	(%RCX,%R8,1),%EBX

      (54) 0x47d4 VMOVSS	(%RSI,%RBX,4),%XMM1

      (54) 0x47d9 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (54) 0x47dd MOV	%R10D,%EBX

      (54) 0x47e0 VMOVSS	(%R15,%RBX,4),%XMM2

      (54) 0x47e6 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (54) 0x47ea VFMADD231SD	%XMM2,%XMM1,%XMM0

      (54) 0x47ef INC	%R8

      (54) 0x47f2 ADD	%R13,%R10

      (54) 0x47f5 DEC	%R11

      (54) 0x47f8 JNE	47d0

    (52) 0x47fa JMP	480d

0x47fc NOPL	(%RAX)

    (52) 0x4800 MOV	%R9,%R8

    (52) 0x4803 MOV	0x20(%RSP),%RSI

    (52) 0x4808 MOV	0x28(%RSP),%R15

    (52) 0x480d MOV	0x30(%RSP),%RAX

    (52) 0x4812 SUB	%RAX,%R9

    (52) 0x4815 CMP	$-0x4,%R9

    (52) 0x4819 MOV	0x270(%RSP),%RDX

    (52) 0x4821 JA	4730

    (52) 0x4827 LEA	0x3(%R8),%R9

    (52) 0x482b MOV	0x48(%RSP),%RBX

    (52) 0x4830 IMUL	%RBX,%R9

    (52) 0x4834 ADD	%RDI,%R9

    (52) 0x4837 LEA	0x2(%R8),%R10

    (52) 0x483b IMUL	%RBX,%R10

    (52) 0x483f ADD	%RDI,%R10

    (52) 0x4842 MOV	%RBX,%R11

    (52) 0x4845 IMUL	%R8,%R11

    (52) 0x4849 ADD	%RDI,%R11

    (52) 0x484c LEA	0x1(%R8),%R13

    (52) 0x4850 IMUL	%RBX,%R13

    (52) 0x4854 ADD	%RDI,%R13

    (52) 0x4857 NOPW	(%RAX,%RAX,1)

      (53) 0x4860 LEA	(%RCX,%R8,1),%EBX

      (53) 0x4864 VMOVSS	(%RSI,%RBX,4),%XMM1

      (53) 0x4869 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (53) 0x486d MOV	%R11D,%EBX

      (53) 0x4870 VMOVSS	(%R15,%RBX,4),%XMM2

      (53) 0x4876 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (53) 0x487a LEA	0x1(%RCX,%R8,1),%EBX

      (53) 0x487f VMOVSS	(%RSI,%RBX,4),%XMM3

      (53) 0x4884 VCVTSS2SD	%XMM3,%XMM3,%XMM3

      (53) 0x4888 MOV	%R13D,%EBX

      (53) 0x488b VMOVSS	(%R15,%RBX,4),%XMM4

      (53) 0x4891 VCVTSS2SD	%XMM4,%XMM4,%XMM4

      (53) 0x4895 VFMADD213SD	%XMM0,%XMM1,%XMM2

      (53) 0x489a LEA	0x2(%RCX,%R8,1),%EBX

      (53) 0x489f VMOVSS	(%RSI,%RBX,4),%XMM0

      (53) 0x48a4 VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (53) 0x48a8 VFMADD213SD	%XMM2,%XMM3,%XMM4

      (53) 0x48ad MOV	%R10D,%EBX

      (53) 0x48b0 VMOVSS	(%R15,%RBX,4),%XMM1

      (53) 0x48b6 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (53) 0x48ba VFMADD213SD	%XMM4,%XMM0,%XMM1

      (53) 0x48bf LEA	0x3(%RCX,%R8,1),%EBX

      (53) 0x48c4 VMOVSS	(%RSI,%RBX,4),%XMM0

      (53) 0x48c9 VCVTSS2SD	%XMM0,%XMM0,%XMM2

      (53) 0x48cd MOV	%R9D,%EBX

      (53) 0x48d0 VMOVSS	(%R15,%RBX,4),%XMM0

      (53) 0x48d6 VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (53) 0x48da VFMADD213SD	%XMM1,%XMM2,%XMM0

      (53) 0x48df ADD	$0x4,%R8

      (53) 0x48e3 ADD	%RDX,%R9

      (53) 0x48e6 ADD	%RDX,%R10

      (53) 0x48e9 ADD	%RDX,%R11

      (53) 0x48ec ADD	%RDX,%R13

      (53) 0x48ef CMP	%R8,%RAX

      (53) 0x48f2 JNE	4860

    (52) 0x48f8 JMP	4730

0x48fd NOPL	(%RAX)

    (52) 0x4900 CMP	$0x20,%EAX

    (52) 0x4903 JAE	4915

    (52) 0x4905 XOR	%R8D,%R8D

    (52) 0x4908 MOV	0x20(%RSP),%RAX

    (52) 0x490d MOV	%RBX,%R15

    (52) 0x4910 JMP	49fc

    (52) 0x4915 VPXOR	%XMM0,%XMM0,%XMM0

    (52) 0x4919 XOR	%R8D,%R8D

    (52) 0x491c VPXOR	%XMM1,%XMM1,%XMM1

    (52) 0x4920 VXORPS	%XMM2,%XMM2,%XMM2

    (52) 0x4924 VXORPS	%XMM3,%XMM3,%XMM3

    (52) 0x4928 MOV	0x20(%RSP),%RSI

    (52) 0x492d MOV	0x258(%RSP),%R10

    (52) 0x4935 NOPW	%CS:(%RAX,%RAX,1)

      (55) 0x4940 LEA	(%RCX,%R8,1),%R9D

      (55) 0x4944 VCVTPS2PD	(%RSI,%R9,4),%ZMM4

      (55) 0x494b VCVTPS2PD	0x20(%RSI,%R9,4),%ZMM5

      (55) 0x4953 VCVTPS2PD	0x40(%RSI,%R9,4),%ZMM6

      (55) 0x495b VCVTPS2PD	0x60(%RSI,%R9,4),%ZMM7

      (55) 0x4963 LEA	(%RDI,%R8,1),%R9D

      (55) 0x4967 VCVTPS2PD	(%RBX,%R9,4),%ZMM8

      (55) 0x496e VFMADD231PD	%ZMM8,%ZMM4,%ZMM0

      (55) 0x4974 VCVTPS2PD	0x20(%RBX,%R9,4),%ZMM4

      (55) 0x497c VFMADD231PD	%ZMM4,%ZMM5,%ZMM1

      (55) 0x4982 VCVTPS2PD	0x40(%RBX,%R9,4),%ZMM4

      (55) 0x498a VFMADD231PD	%ZMM4,%ZMM6,%ZMM2

      (55) 0x4990 VCVTPS2PD	0x60(%RBX,%R9,4),%ZMM4

      (55) 0x4998 VFMADD231PD	%ZMM4,%ZMM7,%ZMM3

      (55) 0x499e ADD	$0x20,%R8

      (55) 0x49a2 CMP	%R8,%R10

      (55) 0x49a5 JNE	4940

    (52) 0x49a7 VADDPD	%ZMM0,%ZMM1,%ZMM0

    (52) 0x49ad VADDPD	%ZMM2,%ZMM3,%ZMM1

    (52) 0x49b3 VADDPD	%ZMM0,%ZMM1,%ZMM0

    (52) 0x49b9 VEXTRACTF64X4	$0x1,%ZMM0,%YMM1

    (52) 0x49c0 VADDPD	%ZMM1,%ZMM0,%ZMM0

    (52) 0x49c6 VEXTRACTF128	$0x1,%YMM0,%XMM1

    (52) 0x49cc VADDPD	%XMM1,%XMM0,%XMM0

    (52) 0x49d0 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

    (52) 0x49d5 VADDSD	%XMM1,%XMM0,%XMM0

    (52) 0x49d9 CMP	%R10D,%EAX

    (52) 0x49dc JE	4724

    (52) 0x49e2 MOV	%R10,%R8

    (52) 0x49e5 MOV	%R10,%R9

    (52) 0x49e8 TEST	$0x1c,%R12B

    (52) 0x49ec MOV	0x20(%RSP),%RAX

    (52) 0x49f1 MOV	0x28(%RSP),%R15

    (52) 0x49f6 JE	479e

    (52) 0x49fc VMOVQ	%XMM0,%XMM0

    (52) 0x4a00 MOV	0xc8(%RSP),%RSI

    (52) 0x4a08 NOPL	(%RAX,%RAX,1)

      (56) 0x4a10 LEA	(%RCX,%R8,1),%R9D

      (56) 0x4a14 VCVTPS2PD	(%RAX,%R9,4),%YMM1

      (56) 0x4a1a LEA	(%RDI,%R8,1),%R9D

      (56) 0x4a1e VCVTPS2PD	(%R15,%R9,4),%YMM2

      (56) 0x4a24 VFMADD231PD	%YMM2,%YMM1,%YMM0

      (56) 0x4a29 ADD	$0x4,%R8

      (56) 0x4a2d CMP	%R8,%RSI

      (56) 0x4a30 JNE	4a10

    (52) 0x4a32 VEXTRACTF128	$0x1,%YMM0,%XMM1

    (52) 0x4a38 VADDPD	%XMM1,%XMM0,%XMM0

    (52) 0x4a3c VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

    (52) 0x4a41 VADDSD	%XMM1,%XMM0,%XMM0

    (52) 0x4a45 MOV	%RSI,%R9

    (52) 0x4a48 CMP	%ESI,0x30(%RSP)

    (52) 0x4a4c JE	4730

    (52) 0x4a52 JMP	479e

0x4a57 NOPW	(%RAX,%RAX,1)

(39) 0x4a60 VZEROUPPER

(39) 0x4a63 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4a68 SUB	0xc0(%RSP),%RAX

(39) 0x4a70 MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x4a7a IMUL	%RCX

(39) 0x4a7d MOV	%RDX,%RAX

(39) 0x4a80 SHR	$0x3f,%RAX

(39) 0x4a84 SAR	$0x7,%RDX

(39) 0x4a88 ADD	%RAX,%RDX

(39) 0x4a8b ADD	%RDX,0x180(%RSP)

(39) 0x4a93 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x4a98 MOV	%RAX,0x210(%RSP)

(39) 0x4aa0 LEA	0xc0(%R13),%RSI

(39) 0x4aa7 MOV	$0x1,%EBX

(39) 0x4aac MOV	0x10(%RSP),%RAX

(39) 0x4ab1 MOV	%R13,%RDI

(39) 0x4ab4 XOR	%R8D,%R8D

(39) 0x4ab7 JMP	4b16

0x4ab9 NOPL	(%RAX)

  (46) 0x4ac0 MOV	0xa8(%RSP),%RAX

  (46) 0x4ac8 VMOVSS	%XMM1,(%RAX,%R13,4)

  (46) 0x4ace MOV	0x148(%RSP),%RCX

  (46) 0x4ad6 INC	%RCX

  (46) 0x4ad9 MOV	0xb8(%RSP),%RAX

  (46) 0x4ae1 MOV	0x248(%RSP),%RSI

  (46) 0x4ae9 ADD	%RAX,%RSI

  (46) 0x4aec ADD	%RAX,%RDI

  (46) 0x4aef MOV	0x1c8(%RSP),%RDX

  (46) 0x4af7 ADD	%RAX,%RDX

  (46) 0x4afa MOV	%RDX,%RAX

  (46) 0x4afd MOV	%RBX,%R8

  (46) 0x4b00 CMP	0x50(%RSP),%RBX

  (46) 0x4b05 MOV	%RCX,%RBX

  (46) 0x4b08 MOV	0x228(%RSP),%R12

  (46) 0x4b10 JE	5100

  (46) 0x4b16 MOV	%RAX,0x1c8(%RSP)

  (46) 0x4b1e MOV	%RBX,%R9

  (46) 0x4b21 AND	$-0x8,%R9

  (46) 0x4b25 CMP	$0x8,%RBX

  (46) 0x4b29 JAE	4b40

  (46) 0x4b2b XOR	%EAX,%EAX

  (46) 0x4b2d VMOVSS	0x14cf(%RIP),%XMM1

  (46) 0x4b35 JMP	4c60

0x4b3a NOPW	(%RAX,%RAX,1)

  (46) 0x4b40 CMP	$0x40,%RBX

  (46) 0x4b44 JAE	4b60

  (46) 0x4b46 XOR	%EAX,%EAX

  (46) 0x4b48 VMOVSS	0x14b4(%RIP),%XMM1

  (46) 0x4b50 JMP	4c0a

0x4b55 NOPW	%CS:(%RAX,%RAX,1)

  (46) 0x4b60 MOV	%RBX,%RCX

  (46) 0x4b63 AND	$-0x40,%RCX

  (46) 0x4b67 MOV	$0x7ffffffffffffff8,%RAX

  (46) 0x4b71 ADD	$-0x38,%RAX

  (46) 0x4b75 AND	%RBX,%RAX

  (46) 0x4b78 XOR	%EDX,%EDX

  (46) 0x4b7a VBROADCASTSS	0x1480(%RIP),%ZMM3

  (46) 0x4b84 VMOVAPS	%ZMM3,%ZMM0

  (46) 0x4b8a VMOVAPS	%ZMM3,%ZMM1

  (46) 0x4b90 VMOVAPS	%ZMM3,%ZMM2

  (46) 0x4b96 NOPW	%CS:(%RAX,%RAX,1)

    (35) 0x4ba0 VMAXPS	-0xc0(%RSI,%RDX,4),%ZMM0,%ZMM0

    (35) 0x4ba8 VMAXPS	-0x80(%RSI,%RDX,4),%ZMM1,%ZMM1

    (35) 0x4bb0 VMAXPS	-0x40(%RSI,%RDX,4),%ZMM2,%ZMM2

    (35) 0x4bb8 VMAXPS	(%RSI,%RDX,4),%ZMM3,%ZMM3

    (35) 0x4bbf ADD	$0x40,%RDX

    (35) 0x4bc3 CMP	%RDX,%RCX

    (35) 0x4bc6 JNE	4ba0

  (46) 0x4bc8 VMAXPS	%ZMM1,%ZMM0,%ZMM0

  (46) 0x4bce VMAXPS	%ZMM3,%ZMM2,%ZMM1

  (46) 0x4bd4 VMAXPS	%ZMM1,%ZMM0,%ZMM0

  (46) 0x4bda VEXTRACTF64X4	$0x1,%ZMM0,%YMM1

  (46) 0x4be1 VMAXPS	%YMM1,%YMM0,%YMM0

  (46) 0x4be5 VEXTRACTF128	$0x1,%YMM0,%XMM1

  (46) 0x4beb VMAXPS	%XMM1,%XMM0,%XMM0

  (46) 0x4bef VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

  (46) 0x4bf4 VMAXPS	%XMM1,%XMM0,%XMM0

  (46) 0x4bf8 VMOVSHDUP	%XMM0,%XMM1

  (46) 0x4bfc VMAXSS	%XMM1,%XMM0,%XMM1

  (46) 0x4c00 CMP	%RAX,%RBX

  (46) 0x4c03 JE	4c6d

  (46) 0x4c05 TEST	$0x38,%BL

  (46) 0x4c08 JE	4c60

  (46) 0x4c0a MOV	%RAX,%RCX

  (46) 0x4c0d MOV	%RBX,%RAX

  (46) 0x4c10 MOV	$0x7ffffffffffffff8,%RDX

  (46) 0x4c1a AND	%RDX,%RAX

  (46) 0x4c1d VBROADCASTSS	%XMM1,%YMM0

  (46) 0x4c22 NOPW	%CS:(%RAX,%RAX,1)

    (50) 0x4c30 VMAXPS	(%RDI,%RCX,4),%YMM0,%YMM0

    (50) 0x4c35 ADD	$0x8,%RCX

    (50) 0x4c39 CMP	%RCX,%R9

    (50) 0x4c3c JNE	4c30

  (46) 0x4c3e VEXTRACTF128	$0x1,%YMM0,%XMM1

  (46) 0x4c44 VMAXPS	%XMM1,%XMM0,%XMM0

  (46) 0x4c48 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

  (46) 0x4c4d VMAXPS	%XMM1,%XMM0,%XMM0

  (46) 0x4c51 VMOVSHDUP	%XMM0,%XMM1

  (46) 0x4c55 VMAXSS	%XMM1,%XMM0,%XMM1

  (46) 0x4c59 JMP	4c68

0x4c5b NOPL	(%RAX,%RAX,1)

    (49) 0x4c60 VMAXSS	(%RDI,%RAX,4),%XMM1,%XMM1

    (49) 0x4c65 INC	%RAX

    (49) 0x4c68 CMP	%RAX,%RBX

    (49) 0x4c6b JNE	4c60

  (46) 0x4c6d CMP	$0x4,%RBX

  (46) 0x4c71 MOV	%RBX,0x148(%RSP)

  (46) 0x4c79 MOV	%RDI,0x8(%RSP)

  (46) 0x4c7e VMOVAPS	%XMM1,0x100(%RSP)

  (46) 0x4c87 MOV	%RSI,0x248(%RSP)

  (46) 0x4c8f MOV	%R8,0x240(%RSP)

  (46) 0x4c97 MOV	%R9,0xc0(%RSP)

  (46) 0x4c9f JAE	4cb0

  (46) 0x4ca1 VXORPS	%XMM2,%XMM2,%XMM2

  (46) 0x4ca5 XOR	%R13D,%R13D

  (46) 0x4ca8 JMP	4f30

0x4cad NOPL	(%RAX)

  (46) 0x4cb0 CMP	$0x20,%RBX

  (46) 0x4cb4 JAE	4cd0

  (46) 0x4cb6 VXORPS	%XMM2,%XMM2,%XMM2

  (46) 0x4cba XOR	%R13D,%R13D

  (46) 0x4cbd JMP	4e77

0x4cc2 NOPW	%CS:(%RAX,%RAX,1)

  (46) 0x4cd0 MOV	%RBX,%RAX

  (46) 0x4cd3 AND	$-0x20,%RAX

  (46) 0x4cd7 MOV	%RAX,0x268(%RSP)

  (46) 0x4cdf MOV	$0x7ffffffffffffff8,%RAX

  (46) 0x4ce9 LEA	-0x18(%RAX),%R13

  (46) 0x4ced AND	%RBX,%R13

  (46) 0x4cf0 VBROADCASTSS	%XMM1,%YMM0

  (46) 0x4cf5 VMOVAPS	%YMM0,0x300(%RSP)

  (46) 0x4cfe VXORPS	%XMM1,%XMM1,%XMM1

  (46) 0x4d02 XOR	%EBX,%EBX

  (46) 0x4d04 VXORPS	%XMM2,%XMM2,%XMM2

  (46) 0x4d08 VXORPS	%XMM3,%XMM3,%XMM3

  (46) 0x4d0c VXORPD	%XMM4,%XMM4,%XMM4

    (36) 0x4d10 VMOVAPD	%YMM4,0x360(%RSP)

    (36) 0x4d19 VMOVAPS	%YMM3,0x280(%RSP)

    (36) 0x4d22 VMOVAPS	%YMM2,0x2a0(%RSP)

    (36) 0x4d2b VMOVAPS	%YMM1,0xe0(%RSP)

    (36) 0x4d34 VMOVUPS	(%RDI,%RBX,4),%YMM0

    (36) 0x4d39 VMOVUPS	0x20(%RDI,%RBX,4),%YMM1

    (36) 0x4d3f VMOVUPS	0x40(%RDI,%RBX,4),%YMM2

    (36) 0x4d45 VMOVUPS	0x60(%RDI,%RBX,4),%YMM3

    (36) 0x4d4b VMOVAPS	0x300(%RSP),%YMM4

    (36) 0x4d54 VSUBPS	%YMM4,%YMM0,%YMM0

    (36) 0x4d58 VSUBPS	%YMM4,%YMM1,%YMM1

    (36) 0x4d5c VMOVAPS	%YMM1,0x2c0(%RSP)

    (36) 0x4d65 VSUBPS	%YMM4,%YMM2,%YMM1

    (36) 0x4d69 VMOVAPS	%YMM1,0x2e0(%RSP)

    (36) 0x4d72 VSUBPS	%YMM4,%YMM3,%YMM1

    (36) 0x4d76 VMOVAPS	%YMM1,0x340(%RSP)

    (36) 0x4d7f CALL	10d0 <_ZGVdN8v_expf@plt>

    (36) 0x4d84 VMOVAPS	%YMM0,0x320(%RSP)

    (36) 0x4d8d VMOVAPS	0x2c0(%RSP),%YMM0

    (36) 0x4d96 CALL	10d0 <_ZGVdN8v_expf@plt>

    (36) 0x4d9b VMOVAPS	%YMM0,0x2c0(%RSP)

    (36) 0x4da4 VMOVAPS	0x2e0(%RSP),%YMM0

    (36) 0x4dad CALL	10d0 <_ZGVdN8v_expf@plt>

    (36) 0x4db2 VMOVAPS	%YMM0,0x2e0(%RSP)

    (36) 0x4dbb VMOVAPS	0x340(%RSP),%YMM0

    (36) 0x4dc4 CALL	10d0 <_ZGVdN8v_expf@plt>

    (36) 0x4dc9 VMOVAPS	0x360(%RSP),%YMM4

    (36) 0x4dd2 VMOVAPS	0x280(%RSP),%YMM3

    (36) 0x4ddb VMOVAPS	0x2a0(%RSP),%YMM2

    (36) 0x4de4 VMOVAPS	0xe0(%RSP),%YMM1

    (36) 0x4ded MOV	0x8(%RSP),%RDI

    (36) 0x4df2 VADDPS	0x320(%RSP),%YMM1,%YMM1

    (36) 0x4dfb VADDPS	0x2c0(%RSP),%YMM2,%YMM2

    (36) 0x4e04 VADDPS	0x2e0(%RSP),%YMM3,%YMM3

    (36) 0x4e0d VADDPS	%YMM4,%YMM0,%YMM4

    (36) 0x4e11 ADD	$0x20,%RBX

    (36) 0x4e15 CMP	%RBX,0x268(%RSP)

    (36) 0x4e1d JNE	4d10

  (46) 0x4e23 VADDPS	%YMM1,%YMM2,%YMM0

  (46) 0x4e27 VADDPS	%YMM0,%YMM3,%YMM0

  (46) 0x4e2b VADDPS	%YMM0,%YMM4,%YMM0

  (46) 0x4e2f VEXTRACTF128	$0x1,%YMM0,%XMM1

  (46) 0x4e35 VADDPS	%XMM1,%XMM0,%XMM0

  (46) 0x4e39 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

  (46) 0x4e3e VADDPS	%XMM1,%XMM0,%XMM0

  (46) 0x4e42 VMOVSHDUP	%XMM0,%XMM1

  (46) 0x4e46 VADDSS	%XMM1,%XMM0,%XMM2

  (46) 0x4e4a MOV	0x148(%RSP),%RBX

  (46) 0x4e52 CMP	%R13,%RBX

  (46) 0x4e55 JNE	4e65

  (46) 0x4e57 VMOVAPS	0x100(%RSP),%XMM1

  (46) 0x4e60 JMP	4f6e

  (46) 0x4e65 TEST	$0x1c,%BL

  (46) 0x4e68 VMOVAPS	0x100(%RSP),%XMM1

  (46) 0x4e71 JE	4f30

  (46) 0x4e77 MOV	%RBX,%RCX

  (46) 0x4e7a MOV	%R13,%RBX

  (46) 0x4e7d VXORPS	%XMM0,%XMM0,%XMM0

  (46) 0x4e81 VBLENDPS	$0x1,%XMM2,%XMM0,%XMM2

  (46) 0x4e87 MOV	%RCX,%RAX

  (46) 0x4e8a AND	$-0x4,%RAX

  (46) 0x4e8e MOV	%RAX,0x2a0(%RSP)

  (46) 0x4e96 MOV	$0x7ffffffffffffff8,%RAX

  (46) 0x4ea0 LEA	0x4(%RAX),%R13

  (46) 0x4ea4 AND	%RCX,%R13

  (46) 0x4ea7 VBROADCASTSS	%XMM1,%XMM0

  (46) 0x4eac VMOVAPS	%XMM0,0x280(%RSP)

  (46) 0x4eb5 NOPW	%CS:(%RAX,%RAX,1)

    (48) 0x4ec0 VMOVAPS	%XMM2,0xe0(%RSP)

    (48) 0x4ec9 VMOVUPS	(%RDI,%RBX,4),%XMM0

    (48) 0x4ece VSUBPS	0x280(%RSP),%XMM0,%XMM0

    (48) 0x4ed7 VZEROUPPER

    (48) 0x4eda CALL	1080 <_ZGVbN4v_expf@plt>

    (48) 0x4edf VMOVAPS	0xe0(%RSP),%XMM2

    (48) 0x4ee8 MOV	0x8(%RSP),%RDI

    (48) 0x4eed VADDPS	%XMM2,%XMM0,%XMM2

    (48) 0x4ef1 ADD	$0x4,%RBX

    (48) 0x4ef5 CMP	%RBX,0x2a0(%RSP)

    (48) 0x4efd JNE	4ec0

  (46) 0x4eff VSHUFPD	$0x1,%XMM2,%XMM2,%XMM0

  (46) 0x4f04 VADDPS	%XMM0,%XMM2,%XMM0

  (46) 0x4f08 VMOVSHDUP	%XMM0,%XMM1

  (46) 0x4f0c VADDSS	%XMM1,%XMM0,%XMM2

  (46) 0x4f10 MOV	0x148(%RSP),%RBX

  (46) 0x4f18 CMP	%R13,%RBX

  (46) 0x4f1b VMOVAPS	0x100(%RSP),%XMM1

  (46) 0x4f24 JE	4f6e

  (46) 0x4f26 NOPW	%CS:(%RAX,%RAX,1)

    (37) 0x4f30 VMOVAPS	%XMM2,0xe0(%RSP)

    (37) 0x4f39 VMOVSS	(%RDI,%R13,4),%XMM0

    (37) 0x4f3f VSUBSS	%XMM1,%XMM0,%XMM0

    (37) 0x4f43 VZEROUPPER

    (37) 0x4f46 CALL	1130 <expf@plt>

    (37) 0x4f4b VMOVAPS	0xe0(%RSP),%XMM2

    (37) 0x4f54 VMOVAPS	0x100(%RSP),%XMM1

    (37) 0x4f5d MOV	0x8(%RSP),%RDI

    (37) 0x4f62 VADDSS	%XMM2,%XMM0,%XMM2

    (37) 0x4f66 INC	%R13

    (37) 0x4f69 CMP	%R13,%RBX

    (37) 0x4f6c JNE	4f30

  (46) 0x4f6e CMP	$0x8,%RBX

  (46) 0x4f72 VMOVAPS	%XMM2,0xe0(%RSP)

  (46) 0x4f7b JAE	4fa0

  (46) 0x4f7d MOV	%RBX,%RCX

  (46) 0x4f80 XOR	%EBX,%EBX

  (46) 0x4f82 MOV	0x1c8(%RSP),%R12

  (46) 0x4f8a VMOVAPS	%XMM1,%XMM2

  (46) 0x4f8e JMP	5040

0x4f93 NOPW	%CS:(%RAX,%RAX,1)

  (46) 0x4fa0 MOV	$0x7ffffffffffffff8,%RAX

  (46) 0x4faa AND	%RAX,%RBX

  (46) 0x4fad VBROADCASTSS	%XMM2,%YMM0

  (46) 0x4fb2 VMOVAPS	%YMM0,0x2a0(%RSP)

  (46) 0x4fbb VBROADCASTSS	%XMM1,%YMM0

  (46) 0x4fc0 VMOVAPS	%YMM0,0x280(%RSP)

  (46) 0x4fc9 XOR	%R13D,%R13D

  (46) 0x4fcc MOV	0x1c8(%RSP),%R12

  (46) 0x4fd4 NOPW	%CS:(%RAX,%RAX,1)

    (38) 0x4fe0 VMOVUPS	(%RDI,%R13,4),%YMM0

    (38) 0x4fe6 VSUBPS	0x280(%RSP),%YMM0,%YMM0

    (38) 0x4fef CALL	10d0 <_ZGVdN8v_expf@plt>

    (38) 0x4ff4 MOV	0x8(%RSP),%RDI

    (38) 0x4ff9 VDIVPS	0x2a0(%RSP),%YMM0,%YMM0

    (38) 0x5002 VMOVUPS	%YMM0,(%R12,%R13,4)

    (38) 0x5008 ADD	$0x8,%R13

    (38) 0x500c CMP	%R13,0xc0(%RSP)

    (38) 0x5014 JNE	4fe0

  (46) 0x5016 MOV	0x148(%RSP),%RCX

  (46) 0x501e CMP	%RBX,%RCX

  (46) 0x5021 VMOVAPS	0x100(%RSP),%XMM2

  (46) 0x502a VMOVAPS	0xe0(%RSP),%XMM1

  (46) 0x5033 JE	5087

  (46) 0x5035 NOPW	%CS:(%RAX,%RAX,1)

    (47) 0x5040 VMOVSS	(%RDI,%RBX,4),%XMM0

    (47) 0x5045 VSUBSS	%XMM2,%XMM0,%XMM0

    (47) 0x5049 MOV	%R12,%R13

    (47) 0x504c MOV	%RCX,%R12

    (47) 0x504f VZEROUPPER

    (47) 0x5052 CALL	1130 <expf@plt>

    (47) 0x5057 VMOVAPS	0x100(%RSP),%XMM2

    (47) 0x5060 MOV	%R12,%RCX

    (47) 0x5063 MOV	%R13,%R12

    (47) 0x5066 VMOVAPS	0xe0(%RSP),%XMM1

    (47) 0x506f MOV	0x8(%RSP),%RDI

    (47) 0x5074 VDIVSS	%XMM1,%XMM0,%XMM0

    (47) 0x5078 VMOVSS	%XMM0,(%R13,%RBX,4)

    (47) 0x507f INC	%RBX

    (47) 0x5082 CMP	%RBX,%RCX

    (47) 0x5085 JNE	5040

  (46) 0x5087 MOV	0x240(%RSP),%R13

  (46) 0x508f LEA	0x1(%R13),%RBX

  (46) 0x5093 CMP	0x50(%RSP),%RBX

  (46) 0x5098 JAE	4ac0

  (46) 0x509e MOV	0x220(%RSP),%RDX

  (46) 0x50a6 SUB	%R13D,%EDX

  (46) 0x50a9 SAL	$0x2,%RDX

  (46) 0x50ad MOV	$0x3fffffffc,%RAX

  (46) 0x50b7 AND	%RAX,%RDX

  (46) 0x50ba ADD	$0x4,%RDX

  (46) 0x50be MOV	0x218(%RSP),%RDI

  (46) 0x50c6 IMUL	%R13,%RDI

  (46) 0x50ca ADD	$0x4,%RDI

  (46) 0x50ce AND	%RAX,%RDI

  (46) 0x50d1 ADD	0x10(%RSP),%RDI

  (46) 0x50d6 XOR	%ESI,%ESI

  (46) 0x50d8 VZEROUPPER

  (46) 0x50db CALL	1070 <memset@plt>

  (46) 0x50e0 VMOVAPS	0xe0(%RSP),%XMM1

  (46) 0x50e9 MOV	0x8(%RSP),%RDI

  (46) 0x50ee JMP	4ac0

0x50f3 NOPW	%CS:(%RAX,%RAX,1)

(39) 0x5100 VZEROUPPER

(39) 0x5103 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x5108 SUB	0x210(%RSP),%RAX

(39) 0x5110 MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x511a IMUL	%RCX

(39) 0x511d MOV	%RDX,%RAX

(39) 0x5120 SHR	$0x3f,%RAX

(39) 0x5124 SAR	$0x7,%RDX

(39) 0x5128 ADD	%RAX,%RDX

(39) 0x512b ADD	%RDX,0x188(%RSP)

(39) 0x5133 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x5138 MOV	%RAX,0xc0(%RSP)

(39) 0x5140 XOR	%EAX,%EAX

(39) 0x5142 XOR	%ECX,%ECX

(39) 0x5144 MOV	0x48(%RSP),%RDX

(39) 0x5149 JMP	516a

0x514b NOPL	(%RAX,%RAX,1)

  (40) 0x5150 MOV	0x100(%RSP),%RAX

  (40) 0x5158 INC	%EAX

  (40) 0x515a MOV	0x48(%RSP),%RDX

  (40) 0x515f ADD	%RDX,%RCX

  (40) 0x5162 CMP	%EDX,%EAX

  (40) 0x5164 JE	54c0

  (40) 0x516a MOV	%EAX,%ESI

  (40) 0x516c IMUL	%EDX,%ESI

  (40) 0x516f MOV	%RAX,0x100(%RSP)

  (40) 0x5177 IMUL	%R12D,%EAX

  (40) 0x517b MOV	%RAX,0x8(%RSP)

  (40) 0x5180 ADD	0x1e8(%RSP),%ESI

  (40) 0x5187 SETB	%AL

  (40) 0x518a OR	0x1e(%RSP),%AL

  (40) 0x518e MOV	%AL,0xe0(%RSP)

  (40) 0x5195 XOR	%EDI,%EDI

  (40) 0x5197 JMP	51c8

0x5199 NOPL	(%RAX)

    (41) 0x51a0 VCVTSD2SS	%XMM0,%XMM0,%XMM0

    (41) 0x51a4 MOV	0x8(%RSP),%RAX

    (41) 0x51a9 LEA	(%RAX,%RDI,1),%R8D

    (41) 0x51ad MOV	0x70(%RSP),%R13

    (41) 0x51b2 VMOVSS	%XMM0,(%R13,%R8,4)

    (41) 0x51b9 INC	%RDI

    (41) 0x51bc CMP	0x30(%RSP),%RDI

    (41) 0x51c1 MOV	0x40(%RSP),%RBX

    (41) 0x51c6 JE	5150

    (41) 0x51c8 VXORPS	%XMM0,%XMM0,%XMM0

    (41) 0x51cc MOV	0x50(%RSP),%RAX

    (41) 0x51d1 CMP	$0x4,%EAX

    (41) 0x51d4 JB	51f3

    (41) 0x51d6 MOV	%EDI,%R8D

    (41) 0x51d9 ADD	0x1e8(%RSP),%R8D

    (41) 0x51e1 SETB	%R8B

    (41) 0x51e5 OR	0xe0(%RSP),%R8B

    (41) 0x51ed JE	5360

    (41) 0x51f3 XOR	%R9D,%R9D

    (41) 0x51f6 MOV	0x278(%RSP),%R11

    (41) 0x51fe TEST	%R11,%R11

    (41) 0x5201 JE	5270

    (41) 0x5203 MOV	%R12,%R10

    (41) 0x5206 IMUL	%R9,%R10

    (41) 0x520a ADD	%RDI,%R10

    (41) 0x520d MOV	%R9,%R8

    (41) 0x5210 MOV	0x50(%RSP),%RAX

    (41) 0x5215 MOV	0x10(%RSP),%RDX

    (41) 0x521a NOPW	(%RAX,%RAX,1)

      (43) 0x5220 LEA	(%RCX,%R8,1),%EBX

      (43) 0x5224 VMOVSS	(%RDX,%RBX,4),%XMM1

      (43) 0x5229 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (43) 0x522d MOV	%R10D,%EBX

      (43) 0x5230 VMOVSS	(%R15,%RBX,4),%XMM2

      (43) 0x5236 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (43) 0x523a VFMADD231SD	%XMM2,%XMM1,%XMM0

      (43) 0x523f INC	%R8

      (43) 0x5242 ADD	%R12,%R10

      (43) 0x5245 DEC	%R11

      (43) 0x5248 JNE	5220

    (41) 0x524a SUB	%RAX,%R9

    (41) 0x524d CMP	$-0x4,%R9

    (41) 0x5251 LEA	(,%R12,4),%RSI

    (41) 0x5259 JA	51a0

    (41) 0x525f JMP	5292

0x5261 NOPW	%CS:(%RAX,%RAX,1)

    (41) 0x5270 MOV	%R9,%R8

    (41) 0x5273 MOV	0x50(%RSP),%RAX

    (41) 0x5278 MOV	0x10(%RSP),%RDX

    (41) 0x527d SUB	%RAX,%R9

    (41) 0x5280 CMP	$-0x4,%R9

    (41) 0x5284 LEA	(,%R12,4),%RSI

    (41) 0x528c JA	51a0

    (41) 0x5292 LEA	0x3(%R8),%R9

    (41) 0x5296 IMUL	%R12,%R9

    (41) 0x529a ADD	%RDI,%R9

    (41) 0x529d LEA	0x2(%R8),%R10

    (41) 0x52a1 IMUL	%R12,%R10

    (41) 0x52a5 ADD	%RDI,%R10

    (41) 0x52a8 MOV	%R12,%R11

    (41) 0x52ab IMUL	%R8,%R11

    (41) 0x52af ADD	%RDI,%R11

    (41) 0x52b2 LEA	0x1(%R8),%R13

    (41) 0x52b6 IMUL	%R12,%R13

    (41) 0x52ba ADD	%RDI,%R13

    (41) 0x52bd NOPL	(%RAX)

      (42) 0x52c0 LEA	(%RCX,%R8,1),%EBX

      (42) 0x52c4 VMOVSS	(%RDX,%RBX,4),%XMM1

      (42) 0x52c9 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (42) 0x52cd MOV	%R11D,%EBX

      (42) 0x52d0 VMOVSS	(%R15,%RBX,4),%XMM2

      (42) 0x52d6 VCVTSS2SD	%XMM2,%XMM2,%XMM2

      (42) 0x52da LEA	0x1(%RCX,%R8,1),%EBX

      (42) 0x52df VMOVSS	(%RDX,%RBX,4),%XMM3

      (42) 0x52e4 VCVTSS2SD	%XMM3,%XMM3,%XMM3

      (42) 0x52e8 MOV	%R13D,%EBX

      (42) 0x52eb VMOVSS	(%R15,%RBX,4),%XMM4

      (42) 0x52f1 VCVTSS2SD	%XMM4,%XMM4,%XMM4

      (42) 0x52f5 VFMADD213SD	%XMM0,%XMM1,%XMM2

      (42) 0x52fa LEA	0x2(%RCX,%R8,1),%EBX

      (42) 0x52ff VMOVSS	(%RDX,%RBX,4),%XMM0

      (42) 0x5304 VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (42) 0x5308 VFMADD213SD	%XMM2,%XMM3,%XMM4

      (42) 0x530d MOV	%R10D,%EBX

      (42) 0x5310 VMOVSS	(%R15,%RBX,4),%XMM1

      (42) 0x5316 VCVTSS2SD	%XMM1,%XMM1,%XMM1

      (42) 0x531a VFMADD213SD	%XMM4,%XMM0,%XMM1

      (42) 0x531f LEA	0x3(%RCX,%R8,1),%EBX

      (42) 0x5324 VMOVSS	(%RDX,%RBX,4),%XMM0

      (42) 0x5329 VCVTSS2SD	%XMM0,%XMM0,%XMM2

      (42) 0x532d MOV	%R9D,%EBX

      (42) 0x5330 VMOVSS	(%R15,%RBX,4),%XMM0

      (42) 0x5336 VCVTSS2SD	%XMM0,%XMM0,%XMM0

      (42) 0x533a VFMADD213SD	%XMM1,%XMM2,%XMM0

      (42) 0x533f ADD	$0x4,%R8

      (42) 0x5343 ADD	%RSI,%R9

      (42) 0x5346 ADD	%RSI,%R10

      (42) 0x5349 ADD	%RSI,%R11

      (42) 0x534c ADD	%RSI,%R13

      (42) 0x534f CMP	%R8,%RAX

      (42) 0x5352 JNE	52c0

    (41) 0x5358 JMP	51a0

0x535d NOPL	(%RAX)

    (41) 0x5360 CMP	$0x20,%EAX

    (41) 0x5363 JAE	5372

    (41) 0x5365 XOR	%R8D,%R8D

    (41) 0x5368 MOV	0x10(%RSP),%RDX

    (41) 0x536d JMP	5458

    (41) 0x5372 VXORPS	%XMM0,%XMM0,%XMM0

    (41) 0x5376 XOR	%R8D,%R8D

    (41) 0x5379 VXORPS	%XMM1,%XMM1,%XMM1

    (41) 0x537d VXORPS	%XMM2,%XMM2,%XMM2

    (41) 0x5381 VXORPS	%XMM3,%XMM3,%XMM3

    (41) 0x5385 MOV	0x250(%RSP),%R10

    (41) 0x538d MOV	0x10(%RSP),%RDX

    (41) 0x5392 NOPW	%CS:(%RAX,%RAX,1)

      (44) 0x53a0 LEA	(%RCX,%R8,1),%R9D

      (44) 0x53a4 VCVTPS2PD	(%RDX,%R9,4),%ZMM4

      (44) 0x53ab VCVTPS2PD	0x20(%RDX,%R9,4),%ZMM5

      (44) 0x53b3 VCVTPS2PD	0x40(%RDX,%R9,4),%ZMM6

      (44) 0x53bb VCVTPS2PD	0x60(%RDX,%R9,4),%ZMM7

      (44) 0x53c3 LEA	(%RDI,%R8,1),%R9D

      (44) 0x53c7 VCVTPS2PD	(%R15,%R9,4),%ZMM8

      (44) 0x53ce VFMADD231PD	%ZMM8,%ZMM4,%ZMM0

      (44) 0x53d4 VCVTPS2PD	0x20(%R15,%R9,4),%ZMM4

      (44) 0x53dc VFMADD231PD	%ZMM4,%ZMM5,%ZMM1

      (44) 0x53e2 VCVTPS2PD	0x40(%R15,%R9,4),%ZMM4

      (44) 0x53ea VFMADD231PD	%ZMM4,%ZMM6,%ZMM2

      (44) 0x53f0 VCVTPS2PD	0x60(%R15,%R9,4),%ZMM4

      (44) 0x53f8 VFMADD231PD	%ZMM4,%ZMM7,%ZMM3

      (44) 0x53fe ADD	$0x20,%R8

      (44) 0x5402 CMP	%R8,%R10

      (44) 0x5405 JNE	53a0

    (41) 0x5407 VADDPD	%ZMM0,%ZMM1,%ZMM0

    (41) 0x540d VADDPD	%ZMM2,%ZMM3,%ZMM1

    (41) 0x5413 VADDPD	%ZMM0,%ZMM1,%ZMM0

    (41) 0x5419 VEXTRACTF64X4	$0x1,%ZMM0,%YMM1

    (41) 0x5420 VADDPD	%ZMM1,%ZMM0,%ZMM0

    (41) 0x5426 VEXTRACTF128	$0x1,%YMM0,%XMM1

    (41) 0x542c VADDPD	%XMM1,%XMM0,%XMM0

    (41) 0x5430 VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

    (41) 0x5435 VADDSD	%XMM1,%XMM0,%XMM0

    (41) 0x5439 CMP	%R10D,%EAX

    (41) 0x543c JE	51a0

    (41) 0x5442 MOV	%R10,%R8

    (41) 0x5445 MOV	%R10,%R9

    (41) 0x5448 TESTB	$0x1c,0x48(%RSP)

    (41) 0x544d MOV	0x10(%RSP),%RDX

    (41) 0x5452 JE	51f6

    (41) 0x5458 VMOVQ	%XMM0,%XMM0

    (41) 0x545c MOV	0x260(%RSP),%RAX

    (41) 0x5464 NOPW	%CS:(%RAX,%RAX,1)

      (45) 0x5470 LEA	(%RCX,%R8,1),%R9D

      (45) 0x5474 VCVTPS2PD	(%RDX,%R9,4),%YMM1

      (45) 0x547a LEA	(%RDI,%R8,1),%R9D

      (45) 0x547e VCVTPS2PD	(%R15,%R9,4),%YMM2

      (45) 0x5484 VFMADD231PD	%YMM2,%YMM1,%YMM0

      (45) 0x5489 ADD	$0x4,%R8

      (45) 0x548d CMP	%R8,%RAX

      (45) 0x5490 JNE	5470

    (41) 0x5492 VEXTRACTF128	$0x1,%YMM0,%XMM1

    (41) 0x5498 VADDPD	%XMM1,%XMM0,%XMM0

    (41) 0x549c VSHUFPD	$0x1,%XMM0,%XMM0,%XMM1

    (41) 0x54a1 VADDSD	%XMM1,%XMM0,%XMM0

    (41) 0x54a5 MOV	%RAX,%R9

    (41) 0x54a8 CMP	%EAX,0x50(%RSP)

    (41) 0x54ac JE	51a0

    (41) 0x54b2 JMP	51f6

0x54b7 NOPW	(%RAX,%RAX,1)

(39) 0x54c0 VZEROUPPER

(39) 0x54c3 CALL	1100 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

(39) 0x54c8 SUB	0xc0(%RSP),%RAX

(39) 0x54d0 MOV	$0x20c49ba5e353f7cf,%RCX

(39) 0x54da IMUL	%RCX

(39) 0x54dd MOV	%RDX,0xe0(%RSP)

(39) 0x54e5 MOVB	$0x1,0x8(%RSP)

(39) 0x54ea MOV	0x1c0(%RSP),%RAX

(39) 0x54f2 CMP	0x200(%RSP),%RAX

(39) 0x54fa JNE	5607

(39) 0x5500 MOV	0x78(%RSP),%RDI

(39) 0x5505 MOV	0x10(%RSP),%RSI

(39) 0x550a MOV	0xa8(%RSP),%RDX

(39) 0x5512 MOV	0x48(%RSP),%RCX

(39) 0x5517 VMOVSS	0xaf1(%RIP),%XMM0

(39) 0x551f CALL	1de0 <_Z15ValidateSoftmaxPKfS0_S0_if>

(39) 0x5524 MOV	%AL,0x8(%RSP)

(39) 0x5528 MOV	$0x14,%EDX

(39) 0x552d MOV	0x2a8c(%RIP),%RDI

(39) 0x5534 LEA	0xcbd(%RIP),%RSI

(39) 0x553b CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x5540 MOV	$0x1b,%EDX

(39) 0x5545 MOV	0x2a74(%RIP),%RDI

(39) 0x554c LEA	0xcba(%RIP),%RSI

(39) 0x5553 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x5558 MOVZX	0x8(%RSP),%ECX

(39) 0x555d TEST	%CL,%CL

(39) 0x555f LEA	0xcc6(%RIP),%RSI

(39) 0x5566 LEA	0xcbc(%RIP),%RAX

(39) 0x556d CMOVNE	%RAX,%RSI

(39) 0x5571 MOV	%ECX,%EAX

(39) 0x5573 XOR	$0x1,%AL

(39) 0x5575 MOVZX	%AL,%EAX

(39) 0x5578 LEA	0x2(,%RAX,4),%RDX

(39) 0x5580 MOV	0x2a39(%RIP),%RDI

(39) 0x5587 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x558c MOV	$0x1,%EDX

(39) 0x5591 MOV	0x2a28(%RIP),%RDI

(39) 0x5598 LEA	0xbfb(%RIP),%RSI

(39) 0x559f CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x55a4 MOV	$0x15,%EDX

(39) 0x55a9 MOV	0x2a10(%RIP),%RDI

(39) 0x55b0 LEA	0xc7c(%RIP),%RSI

(39) 0x55b7 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x55bc MOV	$0x3,%EDX

(39) 0x55c1 MOV	0x29f8(%RIP),%RDI

(39) 0x55c8 LEA	0xc7a(%RIP),%RSI

(39) 0x55cf CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x55d4 MOV	$0x1,%EDX

(39) 0x55d9 MOV	0x29e0(%RIP),%RDI

(39) 0x55e0 LEA	0xbb3(%RIP),%RSI

(39) 0x55e7 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

(39) 0x55ec CMPB	$0,0x8(%RSP)

(39) 0x55f1 MOV	$0x1,%EAX

(39) 0x55f6 MOV	0xa4(%RSP),%ECX

(39) 0x55fd CMOVE	%EAX,%ECX

(39) 0x5600 MOV	%ECX,0xa4(%RSP)

(39) 0x5607 LEA	0x1778(%RSP),%RDI

(39) 0x560f CALL	1090 <_ZNSt13random_device7_M_finiEv@plt>

(39) 0x5614 MOV	0xa8(%RSP),%RDI

(39) 0x561c TEST	%RDI,%RDI

(39) 0x561f JE	5631

(39) 0x5621 MOV	0x190(%RSP),%RSI

(39) 0x5629 SUB	%RDI,%RSI

(39) 0x562c CALL	10c0 <_ZdlPvm@plt>

(39) 0x5631 MOV	0x10(%RSP),%RDI

(39) 0x5636 MOV	0x1b8(%RSP),%RSI

(39) 0x563e SUB	%RDI,%RSI

(39) 0x5641 CALL	10c0 <_ZdlPvm@plt>

(39) 0x5646 MOV	0x78(%RSP),%RDI

(39) 0x564b TEST	%RDI,%RDI

(39) 0x564e JE	5660

(39) 0x5650 MOV	0x198(%RSP),%RSI

(39) 0x5658 SUB	%RDI,%RSI

(39) 0x565b CALL	10c0 <_ZdlPvm@plt>

(39) 0x5660 MOV	0x130(%RSP),%RSI

(39) 0x5668 SUB	%R15,%RSI

(39) 0x566b MOV	%R15,%RDI

(39) 0x566e CALL	10c0 <_ZdlPvm@plt>

(39) 0x5673 MOV	0x28(%RSP),%RDI

(39) 0x5678 TEST	%RDI,%RDI

(39) 0x567b MOV	0x68(%RSP),%R15

(39) 0x5680 JE	5692

(39) 0x5682 MOV	0x118(%RSP),%RSI

(39) 0x568a SUB	%RDI,%RSI

(39) 0x568d CALL	10c0 <_ZdlPvm@plt>

(39) 0x5692 MOV	0x38(%RSP),%RDI

(39) 0x5697 TEST	%RDI,%RDI

(39) 0x569a JE	56ac

(39) 0x569c MOV	0x120(%RSP),%RSI

(39) 0x56a4 SUB	%RDI,%RSI

(39) 0x56a7 CALL	10c0 <_ZdlPvm@plt>

(39) 0x56ac MOV	0x20(%RSP),%RDI

(39) 0x56b1 TEST	%RDI,%RDI

(39) 0x56b4 JE	56c6

(39) 0x56b6 MOV	0x128(%RSP),%RSI

(39) 0x56be SUB	%RDI,%RSI

(39) 0x56c1 CALL	10c0 <_ZdlPvm@plt>

(39) 0x56c6 MOV	0x138(%RSP),%RSI

(39) 0x56ce SUB	%R13,%RSI

(39) 0x56d1 MOV	%R13,%RDI

(39) 0x56d4 CALL	10c0 <_ZdlPvm@plt>

(39) 0x56d9 MOV	0x98(%RSP),%RDI

(39) 0x56e1 TEST	%RDI,%RDI

(39) 0x56e4 JE	56f6

(39) 0x56e6 MOV	0x1a0(%RSP),%RSI

(39) 0x56ee SUB	%RDI,%RSI

(39) 0x56f1 CALL	10c0 <_ZdlPvm@plt>

(39) 0x56f6 MOV	0x60(%RSP),%RDI

(39) 0x56fb TEST	%RDI,%RDI

(39) 0x56fe LEA	(,%R12,4),%R13

(39) 0x5706 JE	5718

(39) 0x5708 MOV	0x1a8(%RSP),%RSI

(39) 0x5710 SUB	%RDI,%RSI

(39) 0x5713 CALL	10c0 <_ZdlPvm@plt>

(39) 0x5718 TEST	%RBX,%RBX

(39) 0x571b JE	5730

(39) 0x571d MOV	0x1b0(%RSP),%RSI

(39) 0x5725 SUB	%RBX,%RSI

(39) 0x5728 MOV	%RBX,%RDI

(39) 0x572b CALL	10c0 <_ZdlPvm@plt>

(39) 0x5730 TEST	%R14,%R14

(39) 0x5733 JE	5748

(39) 0x5735 MOV	0xb0(%RSP),%RSI

(39) 0x573d SUB	%R14,%RSI

(39) 0x5740 MOV	%R14,%RDI

(39) 0x5743 CALL	10c0 <_ZdlPvm@plt>

(39) 0x5748 CMPB	$0,0x8(%RSP)

(39) 0x574d JE	59d4

(39) 0x5753 MOV	0xe0(%RSP),%RCX

(39) 0x575b MOV	%RCX,%RAX

(39) 0x575e SHR	$0x3f,%RAX

(39) 0x5762 SAR	$0x7,%RCX

(39) 0x5766 ADD	%RAX,%RCX

(39) 0x5769 MOV	0x208(%RSP),%R14

(39) 0x5771 ADD	%RCX,%R14

(39) 0x5774 MOV	0x1c0(%RSP),%RCX

(39) 0x577c INC	%RCX

(39) 0x577f MOV	%RCX,0x1c0(%RSP)

(39) 0x5787 CMP	0x1f8(%RSP),%RCX

(39) 0x578f JNE	2920

0x5795 JMP	5855

0x579a MOV	0x283f(%RIP),%RDI

0x57a1 LEA	0xa1a(%RIP),%RSI

0x57a8 MOV	$0x35,%EDX

0x57ad JMP	57da

0x57af MOV	(%R14),%RAX

0x57b2 MOV	-0x18(%RAX),%RAX

0x57b6 LEA	(%R14,%RAX,1),%RDI

0x57ba MOV	0x20(%R14,%RAX,1),%ESI

0x57bf OR	$0x1,%ESI

0x57c2 CALL	1150 <_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@plt>

0x57c7 MOV	0x2812(%RIP),%RDI

0x57ce LEA	0x9cf(%RIP),%RSI

0x57d5 MOV	$0x1d,%EDX

0x57da CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x57df MOV	$0x1,%EAX

0x57e4 MOV	%FS:0x28,%RCX

0x57ed CMP	0x2b00(%RSP),%RCX

0x57f5 JNE	5e8d

0x57fb LEA	-0x28(%RBP),%RSP

0x57ff POP	%RBX

0x5800 POP	%R12

0x5802 POP	%R13

0x5804 POP	%R14

0x5806 POP	%R15

0x5808 POP	%RBP

0x5809 RET

0x580a MOVQ	$0,0x160(%RSP)

0x5816 MOVQ	$0,0x168(%RSP)

0x5822 MOVQ	$0,0x170(%RSP)

0x582e MOVQ	$0,0x178(%RSP)

0x583a MOVQ	$0,0x180(%RSP)

0x5846 MOVQ	$0,0x188(%RSP)

0x5852 XOR	%R14D,%R14D

0x5855 MOV	0x2764(%RIP),%RBX

0x585c LEA	0x9ea(%RIP),%RSI

0x5863 MOV	$0x16,%EDX

0x5868 MOV	%RBX,%RDI

0x586b CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x5870 MOV	%RBX,%RDI

0x5873 MOV	0x160(%RSP),%RSI

0x587b CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x5880 MOV	%R14,%R15

0x5883 LEA	0x9da(%RIP),%R14

0x588a MOV	$0x4,%EDX

0x588f MOV	%RAX,%RDI

0x5892 MOV	%R14,%RSI

0x5895 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x589a LEA	0x9c8(%RIP),%RSI

0x58a1 MOV	$0x14,%EDX

0x58a6 MOV	%RBX,%RDI

0x58a9 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x58ae MOV	%RBX,%RDI

0x58b1 MOV	0x168(%RSP),%RSI

0x58b9 CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x58be MOV	$0x4,%EDX

0x58c3 MOV	%RAX,%RDI

0x58c6 MOV	%R14,%RSI

0x58c9 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x58ce LEA	0x9a9(%RIP),%RSI

0x58d5 MOV	$0x16,%EDX

0x58da MOV	%RBX,%RDI

0x58dd CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x58e2 MOV	%RBX,%RDI

0x58e5 MOV	0x170(%RSP),%RSI

0x58ed CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x58f2 MOV	$0x4,%EDX

0x58f7 MOV	%RAX,%RDI

0x58fa MOV	%R14,%RSI

0x58fd CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x5902 LEA	0x98c(%RIP),%RSI

0x5909 MOV	$0x13,%EDX

0x590e MOV	%RBX,%RDI

0x5911 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x5916 MOV	%RBX,%RDI

0x5919 MOV	0x178(%RSP),%RSI

0x5921 CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x5926 MOV	$0x4,%EDX

0x592b MOV	%RAX,%RDI

0x592e MOV	%R14,%RSI

0x5931 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x5936 LEA	0x96c(%RIP),%RSI

0x593d MOV	$0x14,%EDX

0x5942 MOV	%RBX,%RDI

0x5945 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x594a MOV	%RBX,%RDI

0x594d MOV	0x180(%RSP),%RSI

0x5955 CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x595a MOV	$0x4,%EDX

0x595f MOV	%RAX,%RDI

0x5962 MOV	%R14,%RSI

0x5965 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x596a LEA	0x94d(%RIP),%RSI

0x5971 MOV	$0x11,%EDX

0x5976 MOV	%RBX,%RDI

0x5979 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x597e MOV	%RBX,%RDI

0x5981 MOV	0x188(%RSP),%RSI

0x5989 CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x598e MOV	$0x4,%EDX

0x5993 MOV	%RAX,%RDI

0x5996 MOV	%R14,%RSI

0x5999 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x599e LEA	0x92b(%RIP),%RSI

0x59a5 MOV	$0x17,%EDX

0x59aa MOV	%RBX,%RDI

0x59ad CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x59b2 MOV	%RBX,%RDI

0x59b5 MOV	%R15,%RSI

0x59b8 CALL	10a0 <_ZNSo9_M_insertIlEERSoT_@plt>

0x59bd MOV	$0x4,%EDX

0x59c2 MOV	%RAX,%RDI

0x59c5 MOV	%R14,%RSI

0x59c8 CALL	10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x59cd XOR	%EAX,%EAX

0x59cf JMP	57e4

0x59d4 MOV	0xa4(%RSP),%EAX

0x59db JMP	57e4

0x59e0 MOV	%FS:0x28,%RAX

0x59e9 CMP	0x2b00(%RSP),%RAX

0x59f1 JNE	5e8d

0x59f7 LEA	0x8f2(%RIP),%RDI

0x59fe VZEROUPPER

0x5a01 CALL	1060 <_ZSt20__throw_length_errorPKc@plt>

0x5a06 MOV	%FS:0x28,%RAX

0x5a0f CMP	0x2b00(%RSP),%RAX

0x5a17 JNE	5e8d

0x5a1d LEA	0x8cc(%RIP),%RDI

0x5a24 CALL	1060 <_ZSt20__throw_length_errorPKc@plt>

0x5a29 TEST	%R15,%R15

0x5a2c JNE	5a3f

0x5a2e MOVQ	$0,0xb0(%RSP)

0x5a3a XOR	%R14D,%R14D

0x5a3d JMP	5a83

0x5a3f MOV	0x68(%RSP),%RBX

0x5a44 LEA	(,%RBX,4),%RDI

0x5a4c CALL	10b0 <_Znwm@plt>

0x5a51 MOV	%RAX,%R14

0x5a54 LEA	(%RAX,%RBX,4),%RAX

0x5a58 MOV	%RAX,0xb0(%RSP)

0x5a60 MOVL	$0,(%R14)

0x5a67 CMP	$0x1,%RBX

0x5a6b JE	5a83

0x5a6d MOV	%R14,%RDI

0x5a70 ADD	$0x4,%RDI

0x5a74 XOR	%ESI,%ESI

0x5a76 MOV	0x88(%RSP),%RDX

0x5a7e CALL	1070 <memset@plt>

0x5a83 MOV	%FS:0x28,%RAX

0x5a8c CMP	0x2b00(%RSP),%RAX

0x5a94 JNE	5e8d

0x5a9a LEA	0x84f(%RIP),%RDI

0x5aa1 CALL	1060 <_ZSt20__throw_length_errorPKc@plt>

0x5aa6 MOV	%RAX,%R12

0x5aa9 TEST	%R14,%R14

0x5aac JE	5c3e

0x5ab2 JMP	5e63

0x5ab7 MOV	%RBX,0x40(%RSP)

0x5abc MOV	%RAX,%R12

0x5abf JMP	5d13

0x5ac4 MOV	%RBX,0x40(%RSP)

0x5ac9 MOV	%RAX,%R12

0x5acc JMP	5d46

0x5ad1 MOV	%RBX,0x40(%RSP)

0x5ad6 MOV	%RAX,%R12

0x5ad9 JMP	5d79

0x5ade MOV	%RBX,0x40(%RSP)

0x5ae3 MOV	%RAX,%R12

0x5ae6 JMP	5dac

0x5aeb MOV	%RBX,0x40(%RSP)

0x5af0 MOV	%RAX,%R12

0x5af3 SALQ	$0x2,0x58(%RSP)

0x5af9 JMP	5de2

0x5afe MOV	%RAX,%R12

0x5b01 JMP	5cb9

0x5b06 MOV	%RBX,0x40(%RSP)

0x5b0b MOV	%RAX,%R12

0x5b0e JMP	5e15

0x5b13 MOV	%RAX,%R12

0x5b16 CMPQ	$0,0x150(%RSP)

0x5b1f JE	5bde

0x5b25 JMP	5cda

0x5b2a MOV	%RBX,0x40(%RSP)

0x5b2f MOV	%RAX,%R12

0x5b32 JMP	5e48

0x5b37 MOV	%RAX,%R12

0x5b3a TEST	%R14,%R14

0x5b3d JE	5c3e

0x5b43 JMP	5e63

0x5b48 MOV	%RAX,%R12

0x5b4b SAL	$0x2,%R15

0x5b4f MOV	%R15,%RSI

0x5b52 JMP	5c8e

0x5b57 MOV	%RAX,%R12

0x5b5a MOV	0x3f0(%RSP),%RDI

0x5b62 CMP	%R15,%RDI

0x5b65 JE	5ba8

0x5b67 MOV	0x400(%RSP),%RSI

0x5b6f INC	%RSI

0x5b72 CALL	10c0 <_ZdlPvm@plt>

0x5b77 JMP	5ba8

0x5b79 JMP	5b98

0x5b7b MOV	%RAX,%R12

0x5b7e CMPQ	$0,0x150(%RSP)

0x5b87 JE	5bde

0x5b89 JMP	5cda

0x5b8e MOV	%RAX,%RDI

0x5b91 CALL	5ea0 <__clang_call_terminate>

0x5b96 JMP	5b98

0x5b98 MOV	%RAX,%R12

0x5b9b LEA	0x1778(%RSP),%RDI

0x5ba3 CALL	1090 <_ZNSt13random_device7_M_finiEv@plt>

0x5ba8 CMPQ	$0,0xa8(%RSP)

0x5bb1 JNE	5c5d

0x5bb7 CMPQ	$0,0x10(%RSP)

0x5bbd JNE	5c81

(30) 0x5bc3 CMPQ	$0,0x78(%RSP)

(30) 0x5bc9 JNE	5ca4

(30) 0x5bcf CMPQ	$0,0x150(%RSP)

(30) 0x5bd8 JNE	5cda

(30) 0x5bde CMPQ	$0,0x28(%RSP)

(30) 0x5be4 JNE	5cfe

(30) 0x5bea CMPQ	$0,0x38(%RSP)

(30) 0x5bf0 JNE	5d31

(30) 0x5bf6 CMPQ	$0,0x20(%RSP)

(30) 0x5bfc JNE	5d64

(30) 0x5c02 CMPQ	$0,0x70(%RSP)

(30) 0x5c08 JNE	5d97

(30) 0x5c0e CMPQ	$0,0x98(%RSP)

(30) 0x5c17 JNE	5dcd

(30) 0x5c1d CMPQ	$0,0x60(%RSP)

(30) 0x5c23 JNE	5e00

(30) 0x5c29 CMPQ	$0,0x40(%RSP)

(30) 0x5c2f JNE	5e33

(30) 0x5c35 TEST	%R14,%R14

(30) 0x5c38 JNE	5e63

(30) 0x5c3e MOV	%FS:0x28,%RAX

(30) 0x5c47 CMP	0x2b00(%RSP),%RAX

(30) 0x5c4f JNE	5e8d

(30) 0x5c55 MOV	%R12,%RDI

(30) 0x5c58 CALL	1170 <_Unwind_Resume@plt>

(30) 0x5c5d MOV	0xa8(%RSP),%RDI

(30) 0x5c65 MOV	0x190(%RSP),%RSI

(30) 0x5c6d SUB	%RDI,%RSI

(30) 0x5c70 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5c75 CMPQ	$0,0x10(%RSP)

(30) 0x5c7b JE	5bc3

(30) 0x5c81 MOV	0x1b8(%RSP),%RSI

(30) 0x5c89 SUB	0x10(%RSP),%RSI

(30) 0x5c8e MOV	0x10(%RSP),%RDI

(30) 0x5c93 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5c98 CMPQ	$0,0x78(%RSP)

(30) 0x5c9e JE	5bcf

(30) 0x5ca4 MOV	0x198(%RSP),%RAX

(30) 0x5cac SUB	0x78(%RSP),%RAX

(30) 0x5cb1 MOV	%RAX,0x110(%RSP)

(30) 0x5cb9 MOV	0x78(%RSP),%RDI

(30) 0x5cbe MOV	0x110(%RSP),%RSI

(30) 0x5cc6 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5ccb CMPQ	$0,0x150(%RSP)

(30) 0x5cd4 JE	5bde

(30) 0x5cda MOV	0x150(%RSP),%RDI

(30) 0x5ce2 MOV	0x130(%RSP),%RSI

(30) 0x5cea SUB	%RDI,%RSI

(30) 0x5ced CALL	10c0 <_ZdlPvm@plt>

(30) 0x5cf2 CMPQ	$0,0x28(%RSP)

(30) 0x5cf8 JE	5bea

(30) 0x5cfe MOV	0x118(%RSP),%RAX

(30) 0x5d06 SUB	0x28(%RSP),%RAX

(30) 0x5d0b MOV	%RAX,0x80(%RSP)

(30) 0x5d13 MOV	0x28(%RSP),%RDI

(30) 0x5d18 MOV	0x80(%RSP),%RSI

(30) 0x5d20 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5d25 CMPQ	$0,0x38(%RSP)

(30) 0x5d2b JE	5bf6

(30) 0x5d31 MOV	0x120(%RSP),%RAX

(30) 0x5d39 SUB	0x38(%RSP),%RAX

(30) 0x5d3e MOV	%RAX,0x80(%RSP)

(30) 0x5d46 MOV	0x38(%RSP),%RDI

(30) 0x5d4b MOV	0x80(%RSP),%RSI

(30) 0x5d53 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5d58 CMPQ	$0,0x20(%RSP)

(30) 0x5d5e JE	5c02

(30) 0x5d64 MOV	0x128(%RSP),%RAX

(30) 0x5d6c SUB	0x20(%RSP),%RAX

(30) 0x5d71 MOV	%RAX,0x80(%RSP)

(30) 0x5d79 MOV	0x20(%RSP),%RDI

(30) 0x5d7e MOV	0x80(%RSP),%RSI

(30) 0x5d86 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5d8b CMPQ	$0,0x70(%RSP)

(30) 0x5d91 JE	5c0e

(30) 0x5d97 MOV	0x138(%RSP),%RAX

(30) 0x5d9f SUB	0x70(%RSP),%RAX

(30) 0x5da4 MOV	%RAX,0x80(%RSP)

(30) 0x5dac MOV	0x70(%RSP),%RDI

(30) 0x5db1 MOV	0x80(%RSP),%RSI

(30) 0x5db9 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5dbe CMPQ	$0,0x98(%RSP)

(30) 0x5dc7 JE	5c1d

(30) 0x5dcd MOV	0x1a0(%RSP),%RAX

(30) 0x5dd5 SUB	0x98(%RSP),%RAX

(30) 0x5ddd MOV	%RAX,0x58(%RSP)

(30) 0x5de2 MOV	0x98(%RSP),%RDI

(30) 0x5dea MOV	0x58(%RSP),%RSI

(30) 0x5def CALL	10c0 <_ZdlPvm@plt>

(30) 0x5df4 CMPQ	$0,0x60(%RSP)

(30) 0x5dfa JE	5c29

(30) 0x5e00 MOV	0x1a8(%RSP),%RAX

(30) 0x5e08 SUB	0x60(%RSP),%RAX

(30) 0x5e0d MOV	%RAX,0x90(%RSP)

(30) 0x5e15 MOV	0x60(%RSP),%RDI

(30) 0x5e1a MOV	0x90(%RSP),%RSI

(30) 0x5e22 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5e27 CMPQ	$0,0x40(%RSP)

(30) 0x5e2d JE	5c35

(30) 0x5e33 MOV	0x1b0(%RSP),%RAX

(30) 0x5e3b SUB	0x40(%RSP),%RAX

(30) 0x5e40 MOV	%RAX,0x90(%RSP)

(30) 0x5e48 MOV	0x40(%RSP),%RDI

(30) 0x5e4d MOV	0x90(%RSP),%RSI

(30) 0x5e55 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5e5a TEST	%R14,%R14

(30) 0x5e5d JE	5c3e

(30) 0x5e63 MOV	0xb0(%RSP),%RSI

(30) 0x5e6b SUB	%R14,%RSI

(30) 0x5e6e MOV	%R14,%RDI

(30) 0x5e71 CALL	10c0 <_ZdlPvm@plt>

(30) 0x5e76 MOV	%FS:0x28,%RAX

(30) 0x5e7f CMP	0x2b00(%RSP),%RAX

(30) 0x5e87 JE	5c55

0x5e8d VZEROUPPER

0x5e90 CALL	10e0 <__stack_chk_fail@plt>

0x5e95 MOV	%RAX,%RDI

0x5e98 CALL	5ea0 <__clang_call_terminate>

0x5e9d NOPL	(%RAX)

Coverage (%)	Name	Module
►100.00+	__libc_init_first	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	attention-clang-skl512

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_0

Source file and lines	attention_v2.cpp:26-332
Module	attention-clang-skl512

The function is defined in:

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_construct.h:133
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:375,389,397,409,2205-2206
/usr/include/stdlib.h:487
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_uninitialized.h:946
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:585,2371,2377,2393
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.tcc:330-342,404-423,458-466,3557-3558
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_ios.h:148,168
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175,736-739
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h:923,1147
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/chrono.h:218,631,720
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ios_base.h:198
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:162,183
/home/eoseret/Applications/llm-attention/attention_v2.cpp:26-33,43-61,97-107,144,160-167,175,185,194,204,213,223,233-238,245,254,264,273,283,292,302-310,332
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h:355,396,432
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_string.h:204,233-238,279,298,304

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 118.50 to 10.50 cycles (11.29x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 118.50 to 94.61 cycles (1.25x speedup).

Details

2% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
1% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX divide and square root instructions are used in vector version.
4% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__clang_call_terminate: 2 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
__isoc23_strtol@plt: 3 occurrences►
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
__stack_chk_fail@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183
memset@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h:923
operator delete(void*, unsigned long): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183
operator new(unsigned long): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:162
std::__throw_length_error(char const*): 3 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
std::basic_ios
>::clear(std::_Ios_Iostate): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_ios.h:168
std::basic_ostream
>& std::__ostream_insert
>(std::basic_ostream
>&, char const*, long): 17 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
std::ostream& std::ostream::_M_insert
(long): 7 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
std::random_device::_M_fini(): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
strlen@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h:396

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

SAL: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:375
SETNE: 2 occurrences►
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:144
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:144
VCVTSI2SS: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205
VZEROUPPER: 2 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205
VCVTSI2SS (INT32/64 to FP32, scalar): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on single precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: square root

The binary function is loading 296 bytes (74 single precision FP elements). The binary function is storing 518 bytes (129 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	424
nb uops	474
loop length	2335
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	1
nb stack references	53

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	118.50 cycles
front end	118.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	44.50	44.25	50.33	50.33	106.00	44.25	62.00	50.33
cycles	44.50	44.25	50.33	50.33	106.00	44.25	62.00	50.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions

3.00

Cycles summary

Front-end	118.50
Dispatch	106.00
DIV/SQRT	3.00
Overall L1	118.50

Vectorization ratios

INT

all	2%
load	0%
store	1%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	4%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	2%
load	0%
store	1%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	4%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	6%
load	NA (no load vectorizable/vectorized instructions)
store	6%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 118.50 cycles. At this rate:

1% of peak load performance is reached (2.50 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (4.37 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 118.50 to 106.00 cycles (1.12x speedup).

ASM code

In the binary file, the address of the function is: 25a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.25	N/A
PUSH %R15	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R14	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R13	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R12	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %RBX	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
AND $-0x40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SUB $0x2b40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RAX,0x2b00(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CMP $0x3,%EDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JG 2617 <main+0x77>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x5a08(%RIP),%R14	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x3bbd(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x7,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV (%RBX),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
TEST %RBX,%RBX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 57af <main+0x320f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 1050 <strlen@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x59d9(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 57c7 <main+0x3227>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x8(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x18(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
TEST %R14D,%R14D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 579a <main+0x31fa>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
TEST %R12D,%R12D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 579a <main+0x31fa>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SAL $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
JE 580a <main+0x326a>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R14D,%ECX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%ECX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%R9D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0x50(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RCX,%R15	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %R15,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SHR $0x3d,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
JNE 5a06 <main+0x3466>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R9,%RDX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
IMUL %R9,%RDX	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV $0x1fffffffffffffff,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA (,%R15,4),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RCX,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%R15,4),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RCX,0x88(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CMP %RDI,%RDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
MOV %R15,0x68(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
JA 5a29 <main+0x3489>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x50(%RSP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
IMUL %R8,%RDI	1	0	1	0	0	0	0	0	0	3	1	N/A
CLTQ	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.50	scal (12.5%)
MOV %RAX,0x1f8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VCVTSI2SS %R12D,%XMM15,%XMM0	2	0.50	0.50	0	0	0	1	0	0	6	1	scal (6.3%)
VSQRTSS %XMM0,%XMM0,%XMM0	1	1	0	0	0	0	0	0	0	12	3	scal (6.3%)
VMOVSS %XMM0,0x1d4(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (6.3%)
MOV $-0x100000000,%RAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
ADD %RAX,%RSI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
SAR $0x20,%RSI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
MOV %RSI,0x200(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA -0x1(%R8),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA -0x1(%R9),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x3,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0xd0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x7ffffffc,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0xc8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x7ffffff0,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0x1e0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,0x238(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VPBROADCASTQ %RAX,%ZMM0	1	0	0	0	0	0	1	0	0	1	1	scal (12.5%)
VMOVDQA64 %ZMM0,0x380(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (100.0%)
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0xd8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR $0x1,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
OR %RAX,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SETNEB 0x1f(%RSP)	2	0.50	0	0.33	0.33	1	0	0.50	0.33	1	1	N/A
MOV %R12D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffe0,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x258(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RSI,0x1e8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R12,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR $0x1,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
OR %RAX,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SETNEB 0x1e(%RSP)	2	0.50	0	0.33	0.33	1	0	0.50	0.33	1	1	N/A
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffe0,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x250(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7ffffffc,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x260(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x3,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x278(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV $-0x66f74f21,%ECX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA (,%RDX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x90(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDX,0x58(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%RDX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x158(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%RDI,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x110(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDI,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%RDI,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x1d8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R8,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%R8,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x1f0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA 0x66f74f1f(%R14,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %RAX,0x220(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA 0x4(,%R14,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x218(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R12,4),%R13	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R9,0x30(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R9,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x230(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R14,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x270(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOVQ $0,0x160(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x168(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x170(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x178(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x188(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %R14,0x48(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVL $0,0xa4(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x1c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %R12,0x228(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5855 <main+0x32b5>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x283f(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0xa1a(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x35,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JMP 57da <main+0x323a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV (%R14),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV -0x18(%RAX),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA (%R14,%RAX,1),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV 0x20(%R14,%RAX,1),%ESI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (6.3%)
OR $0x1,%ESI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (1.6%)
CALL 1150 <_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x2812(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x9cf(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x1d,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x1,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %FS:0x28,%RCX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RCX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA -0x28(%RBP),%RSP	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
POP %RBX	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R12	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R13	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R14	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R15	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %RBP	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
RET	1	0	0	0.33	0.33	0	0	1	0.33	0	1	N/A
MOVQ $0,0x160(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x168(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x170(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x178(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x188(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x2764(%RIP),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x9ea(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x160(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA 0x9da(%RIP),%R14	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x9c8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x168(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x9a9(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x170(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x98c(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x13,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x178(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x96c(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x180(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x94d(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x11,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x188(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x92b(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x17,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 57e4 <main+0x3244>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0xa4(%RSP),%EAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
JMP 57e4 <main+0x3244>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x8f2(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x8cc(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
TEST %R15,%R15	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JNE 5a3f <main+0x349f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOVQ $0,0xb0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5a83 <main+0x34e3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x68(%RSP),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA (,%RBX,4),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10b0 <_Znwm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RAX,%RBX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0xb0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOVL $0,(%R14)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
CMP $0x1,%RBX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5a83 <main+0x34e3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
ADD $0x4,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV 0x88(%RSP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CALL 1070 <memset@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x84f(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5c3e <main+0x369e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5e63 <main+0x38c3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d13 <main+0x3773>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d46 <main+0x37a6>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d79 <main+0x37d9>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5dac <main+0x380c>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SALQ $0x2,0x58(%RSP)	3	0.50	0	0.83	0.83	1	0	0.50	0.33	1	1	scal (12.5%)
JMP 5de2 <main+0x3842>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5cb9 <main+0x3719>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5e15 <main+0x3875>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMPQ $0,0x150(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JE 5bde <main+0x363e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5cda <main+0x373a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5e48 <main+0x38a8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5c3e <main+0x369e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5e63 <main+0x38c3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SAL $0x2,%R15	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
JMP 5c8e <main+0x36ee>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x3f0(%RSP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP %R15,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5ba8 <main+0x3608>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x400(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
INC %RSI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
CALL 10c0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 5ba8 <main+0x3608>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 5b98 <main+0x35f8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMPQ $0,0x150(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JE 5bde <main+0x363e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5cda <main+0x373a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 5ea0 <__clang_call_terminate>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 5b98 <main+0x35f8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA 0x1778(%RSP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1090 <_ZNSt13random_device7_M_finiEv@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
CMPQ $0,0xa8(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5c5d <main+0x36bd>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
CMPQ $0,0x10(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	N/A
JNE 5c81 <main+0x36e1>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 10e0 <__stack_chk_fail@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 5ea0 <__clang_call_terminate>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_0

Source file and lines	attention_v2.cpp:26-332
Module	attention-clang-skl512

The function is defined in:

/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_construct.h:133
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:375,389,397,409,2205-2206
/usr/include/stdlib.h:487
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_uninitialized.h:946
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:585,2371,2377,2393
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.tcc:330-342,404-423,458-466,3557-3558
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_ios.h:148,168
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175,736-739
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h:923,1147
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/chrono.h:218,631,720
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ios_base.h:198
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:162,183
/home/eoseret/Applications/llm-attention/attention_v2.cpp:26-33,43-61,97-107,144,160-167,175,185,194,204,213,223,233-238,245,254,264,273,283,292,302-310,332
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h:355,396,432
/usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_string.h:204,233-238,279,298,304

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

2% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
1% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX divide and square root instructions are used in vector version.
4% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__clang_call_terminate: 2 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
__isoc23_strtol@plt: 3 occurrences►
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
__stack_chk_fail@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183
memset@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_algobase.h:923
operator delete(void*, unsigned long): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183
operator new(unsigned long): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:162
std::__throw_length_error(char const*): 3 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
std::basic_ios
>::clear(std::_Ios_Iostate): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/basic_ios.h:168
std::basic_ostream
>& std::__ostream_insert
>(std::basic_ostream
>&, char const*, long): 17 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:739
std::ostream& std::ostream::_M_insert
(long): 7 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/ostream.h:175
std::random_device::_M_fini(): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/random.h:2377
strlen@plt: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/char_traits.h:396

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

SAL: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:375
SETNE: 2 occurrences►
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:144
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:144
VCVTSI2SS: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205
VZEROUPPER: 2 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2206
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/new_allocator.h:183

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205
VCVTSI2SS (INT32/64 to FP32, scalar): 1 occurrences►
- /usr/bin/../lib64/gcc/x86_64-pc-linux-gnu/16.1.1/../../../../include/c++/16.1.1/bits/stl_vector.h:2205

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

1 SSE or AVX instructions are processing arithmetic or math operations on single precision FP elements in scalar mode (one at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: square root

The binary function is loading 296 bytes (74 single precision FP elements). The binary function is storing 518 bytes (129 single precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	424
nb uops	474
loop length	2335
used x86 registers	15
used mmx registers	0
used xmm registers	2
used ymm registers	0
used zmm registers	1
nb stack references	53

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	118.50 cycles
front end	118.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	44.50	44.25	50.33	50.33	106.00	44.25	62.00	50.33
cycles	44.50	44.25	50.33	50.33	106.00	44.25	62.00	50.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions

3.00

Cycles summary

Front-end	118.50
Dispatch	106.00
DIV/SQRT	3.00
Overall L1	118.50

Vectorization ratios

INT

all	2%
load	0%
store	1%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	4%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	2%
load	0%
store	1%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	4%

Vector efficiency ratios

INT

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	6%
load	NA (no load vectorizable/vectorized instructions)
store	6%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 118.50 cycles. At this rate:

1% of peak load performance is reached (2.50 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
6% of peak store performance is reached (4.37 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 25a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.25	N/A
PUSH %R15	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R14	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R13	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R12	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %RBX	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
AND $-0x40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SUB $0x2b40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RAX,0x2b00(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CMP $0x3,%EDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JG 2617 <main+0x77>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x5a08(%RIP),%R14	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x3bbd(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x7,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV (%RBX),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
TEST %RBX,%RBX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 57af <main+0x320f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 1050 <strlen@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x59d9(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RBX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 57c7 <main+0x3227>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x8(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x18(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 11a0 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
TEST %R14D,%R14D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 579a <main+0x31fa>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
TEST %R12D,%R12D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 579a <main+0x31fa>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SAL $0x20,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
JE 580a <main+0x326a>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R14D,%ECX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%ECX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%R9D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0x50(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RCX,%R15	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %R15,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SHR $0x3d,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
JNE 5a06 <main+0x3466>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R9,%RDX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
IMUL %R9,%RDX	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV $0x1fffffffffffffff,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA (,%R15,4),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RCX,0x80(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%R15,4),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RCX,0x88(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CMP %RDI,%RDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
MOV %R15,0x68(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
JA 5a29 <main+0x3489>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x50(%RSP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %R8,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
IMUL %R8,%RDI	1	0	1	0	0	0	0	0	0	3	1	N/A
CLTQ	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.50	scal (12.5%)
MOV %RAX,0x1f8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VCVTSI2SS %R12D,%XMM15,%XMM0	2	0.50	0.50	0	0	0	1	0	0	6	1	scal (6.3%)
VSQRTSS %XMM0,%XMM0,%XMM0	1	1	0	0	0	0	0	0	0	12	3	scal (6.3%)
VMOVSS %XMM0,0x1d4(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (6.3%)
MOV $-0x100000000,%RAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
ADD %RAX,%RSI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
SAR $0x20,%RSI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
MOV %RSI,0x200(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffff,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA -0x1(%R8),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA -0x1(%R9),%RCX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x3,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0xd0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x7ffffffc,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0xc8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R12D,%R10D	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
AND $0x7ffffff0,%R10D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %R10,0x1e0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,0x238(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VPBROADCASTQ %RAX,%ZMM0	1	0	0	0	0	0	1	0	0	1	1	scal (12.5%)
VMOVDQA64 %ZMM0,0x380(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (100.0%)
MOV %RCX,%RAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RCX,0xd8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR $0x1,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
OR %RAX,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SETNEB 0x1f(%RSP)	2	0.50	0	0.33	0.33	1	0	0.50	0.33	1	1	N/A
MOV %R12D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffe0,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x258(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RSI,0x1e8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x20,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R12,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XOR $0x1,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
OR %RAX,%RCX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
SETNEB 0x1e(%RSP)	2	0.50	0	0.33	0.33	1	0	0.50	0.33	1	1	N/A
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7fffffe0,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x250(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x7ffffffc,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x260(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %R14D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
AND $0x3,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,0x278(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV $-0x66f74f21,%ECX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
LEA (,%RDX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x90(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDX,0x58(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%RDX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x158(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%RDI,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x110(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDI,0x140(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%RDI,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x1d8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R8,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA -0x4(,%R8,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x1f0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA 0x66f74f1f(%R14,%RCX,1),%RAX	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %RAX,0x220(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA 0x4(,%R14,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x218(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R12,4),%R13	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R9,0x30(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R9,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x230(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
LEA (,%R14,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0x270(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOVQ $0,0x160(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x168(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x170(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x178(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x188(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %R14,0x48(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVL $0,0xa4(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x1c0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %R12,0x228(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5855 <main+0x32b5>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x283f(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0xa1a(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x35,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JMP 57da <main+0x323a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV (%R14),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV -0x18(%RAX),%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA (%R14,%RAX,1),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV 0x20(%R14,%RAX,1),%ESI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (6.3%)
OR $0x1,%ESI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (1.6%)
CALL 1150 <_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x2812(%RIP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x9cf(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x1d,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x1,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %FS:0x28,%RCX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RCX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA -0x28(%RBP),%RSP	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
POP %RBX	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R12	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R13	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R14	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R15	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %RBP	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
RET	1	0	0	0.33	0.33	0	0	1	0.33	0	1	N/A
MOVQ $0,0x160(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x168(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x170(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x178(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x180(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOVQ $0,0x188(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x2764(%RIP),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA 0x9ea(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x160(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R14,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA 0x9da(%RIP),%R14	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x9c8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x168(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x9a9(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x170(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x98c(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x13,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x178(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x96c(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x180(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x94d(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x11,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x188(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x92b(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV $0x17,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10f0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 57e4 <main+0x3244>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0xa4(%RSP),%EAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
JMP 57e4 <main+0x3244>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x8f2(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x8cc(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
TEST %R15,%R15	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JNE 5a3f <main+0x349f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOVQ $0,0xb0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5a83 <main+0x34e3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV 0x68(%RSP),%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
LEA (,%RBX,4),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10b0 <_Znwm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA (%RAX,%RBX,4),%RAX	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,0xb0(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOVL $0,(%R14)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
CMP $0x1,%RBX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5a83 <main+0x34e3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
ADD $0x4,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV 0x88(%RSP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CALL 1070 <memset@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %FS:0x28,%RAX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP 0x2b00(%RSP),%RAX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5e8d <main+0x38ed>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
LEA 0x84f(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZSt20__throw_length_errorPKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5c3e <main+0x369e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5e63 <main+0x38c3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d13 <main+0x3773>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d46 <main+0x37a6>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5d79 <main+0x37d9>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5dac <main+0x380c>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SALQ $0x2,0x58(%RSP)	3	0.50	0	0.83	0.83	1	0	0.50	0.33	1	1	scal (12.5%)
JMP 5de2 <main+0x3842>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5cb9 <main+0x3719>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5e15 <main+0x3875>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMPQ $0,0x150(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JE 5bde <main+0x363e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5cda <main+0x373a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RBX,0x40(%RSP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 5e48 <main+0x38a8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
TEST %R14,%R14	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5c3e <main+0x369e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5e63 <main+0x38c3>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
SAL $0x2,%R15	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
JMP 5c8e <main+0x36ee>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x3f0(%RSP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
CMP %R15,%RDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
JE 5ba8 <main+0x3608>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x400(%RSP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
INC %RSI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
CALL 10c0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 5ba8 <main+0x3608>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 5b98 <main+0x35f8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMPQ $0,0x150(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JE 5bde <main+0x363e>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
JMP 5cda <main+0x373a>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 5ea0 <__clang_call_terminate>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 5b98 <main+0x35f8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA 0x1778(%RSP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1090 <_ZNSt13random_device7_M_finiEv@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
CMPQ $0,0xa8(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 5c5d <main+0x36bd>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
CMPQ $0,0x10(%RSP)	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	N/A
JNE 5c81 <main+0x36e1>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 10e0 <__stack_chk_fail@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CALL 5ea0 <__clang_call_terminate>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A

Name	Coverage (%)	Time (s)
▼main–	91.83	26.41
▼Loop 39 - attention_v2.cpp:26-310 - attention-clang-skl512–	0.02	0.00
▼Loop 78 - attention_v2.cpp:163-163 - attention-clang-skl512–	0.97	0.28
○Loop 80 - random.tcc:412-417 - attention-clang-skl512	0.17	0.05
○Loop 79 - random.tcc:404-409 - attention-clang-skl512	0.02	0.00
▼Loop 46 - attention_v2.cpp:43-61 - attention-clang-skl512–	0.45	0.13
○Loop 38 - attention_v2.cpp:55-56 - attention-clang-skl512	3.25	0.94
○Loop 47 - attention_v2.cpp:55-56 - attention-clang-skl512	0.24	0.07
○Loop 49 - attention_v2.cpp:47-48 - attention-clang-skl512	0.09	0.02
○Loop 36 - attention_v2.cpp:52-53 - attention-clang-skl512	0.07	0.02
○Loop 50 - attention_v2.cpp:47-48 - attention-clang-skl512	0.07	0.02
○Loop 35 - attention_v2.cpp:47-48 - attention-clang-skl512	0.05	0.02
○Loop 37 - attention_v2.cpp:52-53 - attention-clang-skl512	0.02	0.00
○Loop 48 - attention_v2.cpp:52-53 - attention-clang-skl512	0.02	0.00
▼Loop 69 - attention_v2.cpp:164-167 - attention-clang-skl512–	0.12	0.04
▼Loop 73 - random.tcc:404-3558 - attention-clang-skl512–	0.16	0.04
○Loop 74 - random.tcc:404-409 - attention-clang-skl512	0.00	0.00
○Loop 75 - random.tcc:412-417 - attention-clang-skl512	0.00	0.00
▼Loop 70 - random.tcc:404-3558 - attention-clang-skl512–	0.07	0.02
○Loop 72 - random.tcc:412-417 - attention-clang-skl512	0.02	0.00
○Loop 71 - random.tcc:404-409 - attention-clang-skl512	0.00	0.00
○Loop 77 - random.tcc:412-417 - attention-clang-skl512	0.00	0.00
○Loop 76 - random.tcc:404-409 - attention-clang-skl512	0.00	0.00
○Loop 81 - random.tcc:333-339 - attention-clang-skl512	0.10	0.03
▼Loop 57 - attention_v2.cpp:236-238 - attention-clang-skl512–	0.02	0.00
○Loop 34 - attention_v2.cpp:237-238 - attention-clang-skl512	0.12	0.04
○Loop 58 - attention_v2.cpp:237-238 - attention-clang-skl512	0.00	0.00
○Loop 59 - attention_v2.cpp:237-238 - attention-clang-skl512	0.00	0.00
▼Loop 60 - attention_v2.cpp:26-213 - attention-clang-skl512–	0.00	0.00
▼Loop 61 - attention_v2.cpp:27-33 - attention-clang-skl512–	0.38	0.11
○Loop 33 - attention_v2.cpp:30-31 - attention-clang-skl512	6.29	1.81
○Loop 62 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
▼Loop 63 - attention_v2.cpp:26-194 - attention-clang-skl512–	0.00	0.00
▼Loop 64 - attention_v2.cpp:27-33 - attention-clang-skl512–	0.52	0.15
○Loop 32 - attention_v2.cpp:30-31 - attention-clang-skl512	6.87	1.98
○Loop 65 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
▼Loop 40 - attention_v2.cpp:26-292 - attention-clang-skl512–	0.00	0.00
▼Loop 41 - attention_v2.cpp:27-33 - attention-clang-skl512–	0.80	0.23
○Loop 42 - attention_v2.cpp:30-31 - attention-clang-skl512	31.68	9.11
○Loop 44 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
○Loop 43 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
○Loop 45 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
▼Loop 66 - attention_v2.cpp:26-175 - attention-clang-skl512–	0.00	0.00
▼Loop 67 - attention_v2.cpp:27-33 - attention-clang-skl512–	0.43	0.13
○Loop 31 - attention_v2.cpp:30-31 - attention-clang-skl512	6.87	1.98
○Loop 68 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
▼Loop 51 - attention_v2.cpp:26-254 - attention-clang-skl512–	0.00	0.00
▼Loop 52 - attention_v2.cpp:26-33 - attention-clang-skl512–	6.38	1.84
○Loop 53 - attention_v2.cpp:30-31 - attention-clang-skl512	25.56	7.35
○Loop 56 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
○Loop 54 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
○Loop 55 - attention_v2.cpp:30-31 - attention-clang-skl512	0.00	0.00
○Loop 30 - stl_vector.h:397-397 - attention-clang-skl512	0.00	0.00

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