OV - attention-gcc-skl512

	Function: main	Module: attention-gcc-skl512	Source: attention_v2.cpp:26-332 [...]	Coverage (incl. loops): 88.68% \| (excl. loops): 0.00%

/usr/include/stdlib.h: 487 - 487

--------------------------------------------------------------------------------

487:   return (int) strtol (__nptr, (char **) NULL, 10);

/usr/include/c++/16.1.1/bits/char_traits.h: 355 - 432

--------------------------------------------------------------------------------

355: 	__c1 = __c2;

[...]

396: 	return __builtin_strlen(__s);

[...]

432: 	return static_cast<char_type*>(__builtin_memcpy(__s1, __s2, __n));

/usr/include/c++/16.1.1/bits/allocator.h: 189 - 189

--------------------------------------------------------------------------------

189:       ~allocator() _GLIBCXX_NOTHROW { }

/usr/include/c++/16.1.1/bits/stl_uninitialized.h: 946 - 946

--------------------------------------------------------------------------------

946: 	      ++__first;

/usr/include/c++/16.1.1/bits/ostream.h: 175 - 739

--------------------------------------------------------------------------------

175:       { return _M_insert(__n); }

[...]

739: 	__ostream_insert(__out, __s,

/usr/include/c++/16.1.1/bits/stl_construct.h: 133 - 133

--------------------------------------------------------------------------------

133:       ::new(static_cast<void*>(__p)) _Tp(std::forward<_Args>(__args)...);

/usr/include/c++/16.1.1/bits/stl_algobase.h: 923 - 1147

--------------------------------------------------------------------------------

923: 	*__first = __val;

[...]

1141:     __fill_n_a(_OutputIterator __first, _Size __n, const _Tp& __value,

[...]

1147:       if (__n <= 0)

/usr/include/c++/16.1.1/bits/basic_string.tcc: 248 - 248

--------------------------------------------------------------------------------

248: 	  ~_Guard() { if (_M_guarded) _M_guarded->_M_dispose(); }

/usr/include/c++/16.1.1/bits/stl_vector.h: 2205 - 2205

--------------------------------------------------------------------------------

2205: 	if (__n > _S_max_size(_Tp_alloc_type(__a)))

/usr/include/c++/16.1.1/bits/random.h: 585 - 2393

--------------------------------------------------------------------------------

585: 	    __res %= __m;

[...]

2371:     random_device() { _M_init("default"); }

[...]

2377:     { _M_fini(); }

[...]

2393:     { return this->_M_getval(); }

/home/eoseret/Applications/llm-attention/attention_v2.cpp: 26 - 332

--------------------------------------------------------------------------------

26:    for (unsigned int i = 0; i < M; ++i) {

27:       for (unsigned int j = 0; j < N; ++j) {  //vectorized

28:          double sum = 0.0;

29: #pragma clang loop vectorize(enable)

30:          for (unsigned int k = 0; k < K; ++k) { //vectorized

31:             sum += (double)A[i * K + k] * (double)B[k * N + j];

32:          }

33:          C[i * N + j] = alpha * static_cast<float>(sum);

[...]

97: {

98:    if (argc < 4) {

99:       std::cerr << "Usage: " << argv[0] << " <context_size> <dim> <rept>\n";

100:       return 1;

[...]

107:    if (context_size <= 0 || dim <= 0) {

108:       std::cerr << "Both context_size and dim must be positive integers.\n";

109:       return 1;

[...]

129:       x = std::chrono::microseconds{0};

130:    }

131: #endif

132:

133:    size_t elemsX  = static_cast<size_t>(context_size) * dim;

134:    size_t elemsW  = static_cast<size_t>(dim) * dim;

135:    size_t elemsS  = static_cast<size_t>(context_size) * context_size;

[...]

144:    for (size_t r = 0; r < rept; r++) {

[...]

160:       std::mt19937 rng(rd());

161:       std::uniform_real_distribution<float> dist(0.0f, 1.0f);

162:

163:       for (size_t i = 0; i < elemsX; ++i) h_X[i] = dist(rng);

164:       for (size_t i = 0; i < elemsW; ++i) {

165:          h_WQ[i] = dist(rng);

166:          h_WK[i] = dist(rng);

167:          h_WV[i] = dist(rng);

[...]

175:       start = std::chrono::steady_clock::now();

176: #endif

177:

178:       MatMul(h_X.data(), h_WQ.data(), h_Q.data(), context_size, dim, dim);

[...]

185:       end = std::chrono::steady_clock::now();

[...]

194:       start = std::chrono::steady_clock::now();

[...]

204:       end = std::chrono::steady_clock::now();

[...]

213:       start = std::chrono::steady_clock::now();

[...]

223:       end = std::chrono::steady_clock::now();

224:       elapsed[2] += std::chrono::duration_cast<std::chrono::microseconds>(end - start);

225: #endif

226:       float scale = 1.0f / std::sqrt(static_cast<float>(dim));

[...]

233:       start = std::chrono::steady_clock::now();

234: #endif

235:

236:       for (int i = 0; i < context_size; ++i)

237:          for (int j = 0; j < dim; ++j)// vectorized

238:             h_KT[j * context_size + i] = h_K[i * dim + j];

[...]

245:       end = std::chrono::steady_clock::now();

[...]

254:       start = std::chrono::steady_clock::now();

[...]

264:       end = std::chrono::steady_clock::now();

[...]

273:       start = std::chrono::steady_clock::now();

274: #endif

275:

276:       softmax(h_S.data(), h_D.data(), h_P.data(), context_size);

[...]

283:       end = std::chrono::steady_clock::now();

[...]

292:       start = std::chrono::steady_clock::now();

[...]

302:       end = std::chrono::steady_clock::now();

303:       elapsed[6] += std::chrono::duration_cast<std::chrono::microseconds>(end - start);

304: #endif

305:

306:       if (r == rept - 1) {

307:          bool softmax_ok = ValidateSoftmax(h_S.data(), h_P.data(), h_D.data(), context_size);

308:

309:          std::cout << "Validation results:\n";

310:          std::cout << "  Softmax (rows sum & D) : " << (softmax_ok ? "OK" : "FAILED") << "\n";

[...]

317:          if (!(softmax_ok && all_finite)) return 1;

[...]

331:    return 0;

332: }

/usr/include/c++/16.1.1/bits/random.tcc: 326 - 3558

--------------------------------------------------------------------------------

326:     mersenne_twister_engine<_UIntType, __w, __n, __m, __r, __a, __u, __d,

327: 			    __s, __b, __t, __c, __l, __f>::

328:     seed(result_type __sd)

329:     {

330:       _M_x[0] = __detail::__mod<_UIntType,

331: 	__detail::_Shift<_UIntType, __w>::__value>(__sd);

332:

333:       for (size_t __i = 1; __i < state_size; ++__i)

334: 	{

335: 	  _UIntType __x = _M_x[__i - 1];

336: 	  __x ^= __x >> (__w - 2);

337: 	  __x *= __f;

338: 	  __x += __detail::__mod<_UIntType, __n>(__i);

339: 	  _M_x[__i] = __detail::__mod<_UIntType,

340: 	    __detail::_Shift<_UIntType, __w>::__value>(__x);

341: 	}

342:       _M_p = state_size;

[...]

404:       for (size_t __k = 0; __k < (__n - __m); ++__k)

405:         {

406: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

407: 			   | (_M_x[__k + 1] & __lower_mask));

408: 	  _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1)

409: 		       ^ ((__y & 0x01) ? __a : 0));

410:         }

411:

412:       for (size_t __k = (__n - __m); __k < (__n - 1); ++__k)

413: 	{

414: 	  _UIntType __y = ((_M_x[__k] & __upper_mask)

415: 			   | (_M_x[__k + 1] & __lower_mask));

416: 	  _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1)

417: 		       ^ ((__y & 0x01) ? __a : 0));

418: 	}

419:

420:       _UIntType __y = ((_M_x[__n - 1] & __upper_mask)

421: 		       | (_M_x[0] & __lower_mask));

422:       _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1)

423: 		       ^ ((__y & 0x01) ? __a : 0));

[...]

458:       if (_M_p >= state_size)

459: 	_M_gen_rand();

460:

461:       // Calculate o(x(i)).

462:       result_type __z = _M_x[_M_p++];

463:       __z ^= (__z >> __u) & __d;

464:       __z ^= (__z << __s) & __b;

465:       __z ^= (__z << __t) & __c;

466:       __z ^= (__z >> __l);

[...]

3519:     __generate_canonical_pow2(_Urbg& __urng)

[...]

3557: 	  const _RealT __ret = _RealT(__sum >> __log2_x) / _RealT(__rd);

3558: 	  if (__ret < _RealT(1.0))

/usr/include/c++/16.1.1/cmath: 450 - 450

--------------------------------------------------------------------------------

450:   { return __builtin_sqrtf(__x); }

/usr/include/c++/16.1.1/bits/basic_string.h: 204 - 920

--------------------------------------------------------------------------------

204: 	: allocator_type(__a), _M_p(__dat) { }

[...]

233:       { _M_string_length = __length; }

234:

235:       _GLIBCXX20_CONSTEXPR

236:       pointer

237:       _M_data() const

238:       { return _M_dataplus._M_p; }

[...]

279: 	if (_M_data() == _M_local_data())

[...]

304:       { _Alloc_traits::deallocate(_M_get_allocator(), _M_data(), __size + 1); }

[...]

920:       { _M_dispose(); }

/usr/include/c++/16.1.1/bits/new_allocator.h: 162 - 183

--------------------------------------------------------------------------------

162: 	  return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

183: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

/usr/include/c++/16.1.1/bits/chrono.h: 218 - 720

--------------------------------------------------------------------------------

218: 	      static_cast<_CR>(__d.count()) / static_cast<_CR>(_CF::den)));

[...]

631: 	  __r += __d.count();

[...]

720: 	return __cd(__cd(__lhs).count() - __cd(__rhs).count());

0x1340 LEA	0x8(%RSP),%R10

0x1345 AND	$-0x40,%RSP

0x1349 PUSHQ	-0x8(%R10)

0x134d PUSH	%RBP

0x134e MOV	%RSP,%RBP

0x1351 PUSH	%R15

0x1353 PUSH	%R14

0x1355 PUSH	%R13

0x1357 PUSH	%R12

0x1359 PUSH	%R10

0x135b PUSH	%RBX

0x135c SUB	$0x2900,%RSP

0x1363 MOV	%FS:0x28,%RBX

0x136c MOV	%RBX,-0x38(%RBP)

0x1370 MOV	%RSI,%RBX

0x1373 CMP	$0x3,%EDI

0x1376 JLE	2b32

0x137c MOV	0x8(%RBX),%RDI

0x1380 MOV	$0xa,%EDX

0x1385 XOR	%ESI,%ESI

0x1387 CALL	1160 <__isoc23_strtol@plt>

0x138c MOV	0x10(%RBX),%RDI

0x1390 MOV	$0xa,%EDX

0x1395 XOR	%ESI,%ESI

0x1397 MOV	%EAX,-0x285c(%RBP)

0x139d MOV	%RAX,-0x2800(%RBP)

0x13a4 CALL	1160 <__isoc23_strtol@plt>

0x13a9 MOV	0x18(%RBX),%RDI

0x13ad MOV	$0xa,%EDX

0x13b2 XOR	%ESI,%ESI

0x13b4 MOV	%RAX,-0x27f0(%RBP)

0x13bb CALL	1160 <__isoc23_strtol@plt>

0x13c0 MOV	-0x2800(%RBP),%R9

0x13c7 MOV	%RAX,-0x28e0(%RBP)

0x13ce TEST	%R9D,%R9D

0x13d1 JLE	2b6f

0x13d7 MOV	-0x27f0(%RBP),%R8

0x13de TEST	%R8D,%R8D

0x13e1 JLE	2b6f

0x13e7 MOV	-0x28e0(%RBP),%RDX

0x13ee VPXOR	%XMM0,%XMM0,%XMM0

0x13f2 VMOVDQA	%YMM0,-0x27b0(%RBP)

0x13fa VMOVDQU	%YMM0,-0x2798(%RBP)

0x1402 TEST	%EDX,%EDX

0x1404 JE	294d

0x140a MOV	%R9D,%EBX

0x140d MOV	%R8D,%EAX

0x1410 MOVSXD	%EDX,%RDX

0x1413 MOV	%RBX,%R15

0x1416 MOV	%RAX,%RSI

0x1419 MOV	%RBX,%RCX

0x141c MOV	%RBX,-0x28e8(%RBP)

0x1423 IMUL	%RAX,%R15

0x1427 MOV	%RDX,-0x28f8(%RBP)

0x142e IMUL	%RAX,%RSI

0x1432 IMUL	%RBX,%RCX

0x1436 MOV	%R15,%RDI

0x1439 MOV	%R15,-0x28c8(%RBP)

0x1440 SHR	$0x3d,%RDI

0x1444 MOV	%RSI,-0x28d0(%RBP)

0x144b MOV	%RCX,-0x28d8(%RBP)

0x1452 JNE	1313

0x1458 SAL	$0x2,%RSI

0x145c SAL	$0x2,%RCX

0x1460 LEA	(,%R15,4),%RDI

0x1468 MOV	%R8,-0x27f0(%RBP)

0x146f SAL	$0x2,%RBX

0x1473 SAL	$0x2,%RAX

0x1477 MOV	%R9,-0x2800(%RBP)

0x147e MOV	%RDI,-0x2838(%RBP)

0x1485 MOV	%RSI,-0x2868(%RBP)

0x148c MOV	%RCX,-0x2870(%RBP)

0x1493 MOV	%RBX,-0x28a0(%RBP)

0x149a MOV	%RAX,-0x28f0(%RBP)

0x14a1 VZEROUPPER

0x14a4 CALL	1090 <_Znwm@plt>

0x14a9 CMP	$0x1,%R15

0x14ad MOVQ	$0,-0x28b0(%RBP)

0x14b8 MOV	-0x27f0(%RBP),%R8

0x14bf MOV	-0x2800(%RBP),%R9

0x14c6 MOVL	$0,(%RAX)

0x14cc MOV	%RAX,%RBX

0x14cf JE	1503

(21) 0x14d1 MOV	-0x2838(%RBP),%RAX

(21) 0x14d8 LEA	0x4(%RBX),%RDI

(21) 0x14dc XOR	%ESI,%ESI

(21) 0x14de MOV	%R8,-0x2800(%RBP)

(21) 0x14e5 MOV	%R9,-0x27f0(%RBP)

(21) 0x14ec LEA	-0x4(%RAX),%RDX

(21) 0x14f0 CALL	1050 <memset@plt>

(21) 0x14f5 MOV	-0x27f0(%RBP),%R9

(21) 0x14fc MOV	-0x2800(%RBP),%R8

(21) 0x1503 MOV	$0x1fffffffffffffff,%RAX

(21) 0x150d CMP	-0x28d0(%RBP),%RAX

(21) 0x1514 JB	12dd

(21) 0x151a VXORPS	%XMM1,%XMM1,%XMM1

  (22) 0x151e MOV	-0x2868(%RBP),%RDI

  (22) 0x1525 MOV	%R8,-0x2800(%RBP)

  (22) 0x152c MOV	%R9,-0x27f0(%RBP)

  (22) 0x1533 VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x153b CALL	1090 <_Znwm@plt>

  (22) 0x1540 CMPQ	$0x1,-0x28d0(%RBP)

  (22) 0x1548 MOV	-0x27f0(%RBP),%R9

  (22) 0x154f MOV	%RAX,-0x28a8(%RBP)

  (22) 0x1556 MOVL	$0,(%RAX)

  (22) 0x155c MOV	-0x2800(%RBP),%R8

  (22) 0x1563 JE	2713

  (22) 0x1569 MOV	-0x2868(%RBP),%R15

  (22) 0x1570 LEA	0x4(%RAX),%RDI

  (22) 0x1574 XOR	%ESI,%ESI

  (22) 0x1576 MOV	%R8,-0x2800(%RBP)

  (22) 0x157d MOV	%R9,-0x27f0(%RBP)

  (22) 0x1584 LEA	-0x4(%R15),%RDX

  (22) 0x1588 CALL	1050 <memset@plt>

  (22) 0x158d MOV	%R15,%RDI

  (22) 0x1590 CALL	1090 <_Znwm@plt>

  (22) 0x1595 MOVL	$0,(%RAX)

  (22) 0x159b LEA	0x4(%RAX),%RDI

  (22) 0x159f LEA	-0x4(%R15),%RDX

  (22) 0x15a3 XOR	%ESI,%ESI

  (22) 0x15a5 MOV	%RAX,-0x2880(%RBP)

  (22) 0x15ac CALL	1050 <memset@plt>

  (22) 0x15b1 MOV	%R15,%RDI

  (22) 0x15b4 CALL	1090 <_Znwm@plt>

  (22) 0x15b9 MOVL	$0,(%RAX)

  (22) 0x15bf LEA	0x4(%RAX),%RDI

  (22) 0x15c3 LEA	-0x4(%R15),%RDX

  (22) 0x15c7 XOR	%ESI,%ESI

  (22) 0x15c9 MOV	%RAX,%R14

  (22) 0x15cc CALL	1050 <memset@plt>

  (22) 0x15d1 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x15d9 MOV	-0x2800(%RBP),%R8

  (22) 0x15e0 MOV	-0x27f0(%RBP),%R9

  (22) 0x15e7 MOV	-0x2838(%RBP),%RDI

  (22) 0x15ee MOV	%R8,-0x2800(%RBP)

  (22) 0x15f5 MOV	%R9,-0x27f0(%RBP)

  (22) 0x15fc VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x1604 CALL	1090 <_Znwm@plt>

  (22) 0x1609 CMPQ	$0x1,-0x28c8(%RBP)

  (22) 0x1611 MOV	-0x27f0(%RBP),%R9

  (22) 0x1618 MOV	%RAX,-0x28b8(%RBP)

  (22) 0x161f MOVL	$0,(%RAX)

  (22) 0x1625 MOV	-0x2800(%RBP),%R8

  (22) 0x162c JE	26a4

  (22) 0x1632 MOV	-0x2838(%RBP),%R13

  (22) 0x1639 LEA	0x4(%RAX),%RDI

  (22) 0x163d XOR	%ESI,%ESI

  (22) 0x163f MOV	%R8,-0x2800(%RBP)

  (22) 0x1646 MOV	%R9,-0x27f0(%RBP)

  (22) 0x164d LEA	-0x4(%R13),%RDX

  (22) 0x1651 CALL	1050 <memset@plt>

  (22) 0x1656 MOV	%R13,%RDI

  (22) 0x1659 CALL	1090 <_Znwm@plt>

  (22) 0x165e MOVL	$0,(%RAX)

  (22) 0x1664 LEA	0x4(%RAX),%RDI

  (22) 0x1668 LEA	-0x4(%R13),%RDX

  (22) 0x166c XOR	%ESI,%ESI

  (22) 0x166e MOV	%RAX,%R12

  (22) 0x1671 CALL	1050 <memset@plt>

  (22) 0x1676 MOV	%R13,%RDI

  (22) 0x1679 CALL	1090 <_Znwm@plt>

  (22) 0x167e MOVL	$0,(%RAX)

  (22) 0x1684 LEA	0x4(%RAX),%RDI

  (22) 0x1688 LEA	-0x4(%R13),%RDX

  (22) 0x168c XOR	%ESI,%ESI

  (22) 0x168e MOV	%RAX,-0x2888(%RBP)

  (22) 0x1695 CALL	1050 <memset@plt>

  (22) 0x169a MOV	%R13,%RDI

  (22) 0x169d CALL	1090 <_Znwm@plt>

  (22) 0x16a2 MOVL	$0,(%RAX)

  (22) 0x16a8 LEA	0x4(%RAX),%RDI

  (22) 0x16ac LEA	-0x4(%R13),%RDX

  (22) 0x16b0 XOR	%ESI,%ESI

  (22) 0x16b2 MOV	%RAX,-0x2898(%RBP)

  (22) 0x16b9 CALL	1050 <memset@plt>

  (22) 0x16be MOV	-0x2838(%RBP),%RDI

  (22) 0x16c5 CALL	1090 <_Znwm@plt>

  (22) 0x16ca MOVL	$0,(%RAX)

  (22) 0x16d0 LEA	-0x4(%R13),%RDX

  (22) 0x16d4 LEA	0x4(%RAX),%RDI

  (22) 0x16d8 XOR	%ESI,%ESI

  (22) 0x16da MOV	%RAX,%R13

  (22) 0x16dd CALL	1050 <memset@plt>

  (22) 0x16e2 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x16ea MOV	-0x2800(%RBP),%R8

  (22) 0x16f1 MOV	-0x27f0(%RBP),%R9

  (22) 0x16f8 MOV	$0x1fffffffffffffff,%RAX

  (22) 0x1702 CMP	-0x28d8(%RBP),%RAX

  (22) 0x1709 JB	12bd

  (22) 0x170f MOV	-0x2870(%RBP),%RDI

  (22) 0x1716 MOV	%R8,-0x2800(%RBP)

  (22) 0x171d MOV	%R9,-0x27f0(%RBP)

  (22) 0x1724 VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x172c CALL	1090 <_Znwm@plt>

  (22) 0x1731 CMPQ	$0x1,-0x28d8(%RBP)

  (22) 0x1739 MOV	-0x27f0(%RBP),%R9

  (22) 0x1740 MOV	%RAX,-0x2878(%RBP)

  (22) 0x1747 MOV	-0x2800(%RBP),%R8

  (22) 0x174e VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x1756 MOVL	$0,(%RAX)

  (22) 0x175c JE	2676

  (22) 0x1762 MOV	-0x2870(%RBP),%R15

  (22) 0x1769 LEA	0x4(%RAX),%RDI

  (22) 0x176d XOR	%ESI,%ESI

  (22) 0x176f MOV	%R8,-0x2810(%RBP)

  (22) 0x1776 MOV	%R9,-0x2800(%RBP)

  (22) 0x177d LEA	-0x4(%R15),%RDX

  (22) 0x1781 VMOVAPS	%XMM1,-0x2820(%RBP)

  (22) 0x1789 MOV	%RDX,-0x27f0(%RBP)

  (22) 0x1790 CALL	1050 <memset@plt>

  (22) 0x1795 MOV	%R15,%RDI

  (22) 0x1798 CALL	1090 <_Znwm@plt>

  (22) 0x179d MOVL	$0,(%RAX)

  (22) 0x17a3 MOV	-0x27f0(%RBP),%RDX

  (22) 0x17aa LEA	0x4(%RAX),%RDI

  (22) 0x17ae XOR	%ESI,%ESI

  (22) 0x17b0 MOV	%RAX,%R15

  (22) 0x17b3 CALL	1050 <memset@plt>

  (22) 0x17b8 VMOVAPS	-0x2820(%RBP),%XMM1

  (22) 0x17c0 MOV	-0x2810(%RBP),%R8

  (22) 0x17c7 MOV	-0x2800(%RBP),%R9

  (22) 0x17ce MOV	-0x28a0(%RBP),%RDI

  (22) 0x17d5 MOV	%R8,-0x2800(%RBP)

  (22) 0x17dc MOV	%R9,-0x27f0(%RBP)

  (22) 0x17e3 VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x17eb CALL	1090 <_Znwm@plt>

  (22) 0x17f0 CMPQ	$0x1,-0x28e8(%RBP)

  (22) 0x17f8 MOV	-0x27f0(%RBP),%R9

  (22) 0x17ff MOV	%RAX,-0x28c0(%RBP)

  (22) 0x1806 MOV	-0x2800(%RBP),%R8

  (22) 0x180d VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x1815 MOVL	$0,(%RAX)

  (22) 0x181b JE	1849

  (22) 0x181d MOV	-0x28a0(%RBP),%RDI

  (22) 0x1824 XOR	%ESI,%ESI

  (22) 0x1826 LEA	-0x4(%RDI),%RDX

  (22) 0x182a LEA	0x4(%RAX),%RDI

  (22) 0x182e CALL	1050 <memset@plt>

  (22) 0x1833 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x183b MOV	-0x2800(%RBP),%R8

  (22) 0x1842 MOV	-0x27f0(%RBP),%R9

  (22) 0x1849 LEA	-0x2760(%RBP),%RAX

  (22) 0x1850 LEA	-0x2770(%RBP),%RSI

  (22) 0x1857 MOVL	$0x61666564,-0x2760(%RBP)

  (22) 0x1861 LEA	-0x13c0(%RBP),%RDI

  (22) 0x1868 MOV	%R8,-0x2800(%RBP)

  (22) 0x186f MOV	%R9,-0x27f0(%RBP)

  (22) 0x1876 MOV	%RAX,-0x2770(%RBP)

  (22) 0x187d MOVL	$0x746c7561,-0x275d(%RBP)

  (22) 0x1887 MOVB	$0,-0x2759(%RBP)

  (22) 0x188e MOVQ	$0x7,-0x2768(%RBP)

  (22) 0x1899 VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x18a1 CALL	1120 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt>

  (22) 0x18a6 MOV	-0x2770(%RBP),%RDI

  (22) 0x18ad LEA	-0x2760(%RBP),%RAX

  (22) 0x18b4 MOV	-0x27f0(%RBP),%R9

  (22) 0x18bb MOV	-0x2800(%RBP),%R8

  (22) 0x18c2 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x18ca CMP	%RAX,%RDI

  (22) 0x18cd JE	18f5

  (22) 0x18cf MOV	-0x2760(%RBP),%RAX

  (22) 0x18d6 LEA	0x1(%RAX),%RSI

  (22) 0x18da CALL	10a0 <_ZdlPvm@plt>

  (22) 0x18df VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x18e7 MOV	-0x2800(%RBP),%R8

  (22) 0x18ee MOV	-0x27f0(%RBP),%R9

  (22) 0x18f5 LEA	-0x13c0(%RBP),%RDI

  (22) 0x18fc MOV	%R8,-0x2800(%RBP)

  (22) 0x1903 MOV	%R9,-0x27f0(%RBP)

  (22) 0x190a VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x1912 CALL	10f0 <_ZNSt13random_device9_M_getvalEv@plt>

  (22) 0x1917 MOV	%EAX,%EDX

  (22) 0x1919 MOV	-0x27f0(%RBP),%R9

  (22) 0x1920 MOV	-0x2800(%RBP),%R8

  (22) 0x1927 LEA	-0x2768(%RBP),%RSI

  (22) 0x192e MOV	%RDX,-0x2770(%RBP)

  (22) 0x1935 VMOVSS	0x26cf(%RIP),%XMM3

  (22) 0x193d MOV	$0x1,%EAX

  (22) 0x1942 MOV	%RDX,%RCX

  (22) 0x1945 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x194d NOPL	(%RAX)

    (1) 0x1950 MOV	%RCX,%RDX

    (1) 0x1953 ADD	$0x8,%RSI

    (1) 0x1957 SHR	$0x1e,%RDX

    (1) 0x195b XOR	%RCX,%RDX

    (1) 0x195e IMUL	$0x6c078965,%RDX,%RDX

    (1) 0x1965 LEA	(%RDX,%RAX,1),%ECX

    (1) 0x1968 INC	%RAX

    (1) 0x196b MOV	%RCX,-0x8(%RSI)

    (1) 0x196f CMP	$0x270,%RAX

    (1) 0x1975 JNE	1950

  (22) 0x1977 MOV	-0x2838(%RBP),%RDI

  (22) 0x197e MOVQ	$0x270,-0x13f0(%RBP)

  (22) 0x1989 MOV	%RBX,-0x2820(%RBP)

  (22) 0x1990 ADD	%RBX,%RDI

  (22) 0x1993 MOV	%RDI,-0x2830(%RBP)

  (22) 0x199a JMP	19fd

0x199c NOPL	(%RAX)

    (2) 0x19a0 LEA	0x1(%RDX),%RAX

    (2) 0x19a4 MOV	-0x2770(%RBP,%RDX,8),%RDX

    (2) 0x19ac MOV	%RAX,-0x13f0(%RBP)

    (2) 0x19b3 MOV	%RDX,%RCX

    (2) 0x19b6 SHR	$0xb,%RCX

    (2) 0x19ba MOV	%ECX,%ECX

    (2) 0x19bc XOR	%RCX,%RDX

    (2) 0x19bf MOV	%RDX,%RCX

    (2) 0x19c2 SAL	$0x7,%RCX

    (2) 0x19c6 AND	$-0x62d3a980,%ECX

    (2) 0x19cc XOR	%RCX,%RDX

    (2) 0x19cf MOV	%RDX,%RCX

    (2) 0x19d2 SAL	$0xf,%RCX

    (2) 0x19d6 AND	$-0x103a0000,%ECX

    (2) 0x19dc XOR	%RCX,%RDX

    (2) 0x19df MOV	%RDX,%RCX

    (2) 0x19e2 SHR	$0x12,%RCX

    (2) 0x19e6 XOR	%RCX,%RDX

    (2) 0x19e9 VCVTUSI2SS	%EDX,%XMM1,%XMM0

    (2) 0x19ef VMULSS	0x2611(%RIP),%XMM0,%XMM0

    (2) 0x19f7 VCOMISS	%XMM0,%XMM3

    (2) 0x19fb JA	1a54

    (2) 0x19fd MOV	%RAX,%RDX

    (2) 0x1a00 CMP	$0x26f,%RAX

    (2) 0x1a06 JBE	19a0

    (2) 0x1a08 LEA	-0x2770(%RBP),%RDI

    (2) 0x1a0f MOV	%R8,-0x2810(%RBP)

    (2) 0x1a16 MOV	%R9,-0x2800(%RBP)

    (2) 0x1a1d VMOVAPS	%XMM1,-0x27f0(%RBP)

    (2) 0x1a25 CALL	36c0 <_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv>

    (2) 0x1a2a MOV	-0x13f0(%RBP),%RDX

    (2) 0x1a31 MOV	-0x2810(%RBP),%R8

    (2) 0x1a38 MOV	-0x2800(%RBP),%R9

    (2) 0x1a3f VMOVAPS	-0x27f0(%RBP),%XMM1

    (2) 0x1a47 VMOVSS	0x25bd(%RIP),%XMM3

    (2) 0x1a4f JMP	19a0

    (2) 0x1a54 MOV	-0x2820(%RBP),%RDI

    (2) 0x1a5b VMOVSS	%XMM0,(%RDI)

    (2) 0x1a5f ADD	$0x4,%RDI

    (2) 0x1a63 MOV	%RDI,-0x2820(%RBP)

    (2) 0x1a6a CMP	%RDI,-0x2830(%RBP)

    (2) 0x1a71 JNE	19fd

  (22) 0x1a73 MOV	-0x2880(%RBP),%RDI

  (22) 0x1a7a MOV	$-0x66f74f21,%EDX

  (22) 0x1a7f MOV	%RBX,%RCX

  (22) 0x1a82 MOV	%R14,-0x2858(%RBP)

  (22) 0x1a89 VPBROADCASTQ	%RDX,%ZMM7

  (22) 0x1a8f LEA	-0x2070(%RBP),%RBX

  (22) 0x1a96 MOV	%RDI,-0x2840(%RBP)

  (22) 0x1a9d MOV	-0x28a8(%RBP),%RDI

  (22) 0x1aa4 VMOVDQA64	%ZMM7,-0x27f0(%RBP)

  (22) 0x1aae MOV	%RDI,-0x2850(%RBP)

  (22) 0x1ab5 MOV	-0x2868(%RBP),%RDI

  (22) 0x1abc ADD	%R14,%RDI

  (22) 0x1abf MOV	%RDI,-0x2890(%RBP)

  (22) 0x1ac6 JMP	1b2d

0x1ac8 NOPL	(%RAX,%RAX,1)

    (3) 0x1ad0 LEA	0x1(%RDX),%RAX

    (3) 0x1ad4 MOV	-0x2770(%RBP,%RDX,8),%RDX

    (3) 0x1adc MOV	%RAX,-0x13f0(%RBP)

    (3) 0x1ae3 MOV	%RDX,%RSI

    (3) 0x1ae6 SHR	$0xb,%RSI

    (3) 0x1aea MOV	%ESI,%ESI

    (3) 0x1aec XOR	%RSI,%RDX

    (3) 0x1aef MOV	%RDX,%RSI

    (3) 0x1af2 SAL	$0x7,%RSI

    (3) 0x1af6 AND	$-0x62d3a980,%ESI

    (3) 0x1afc XOR	%RSI,%RDX

    (3) 0x1aff MOV	%RDX,%RSI

    (3) 0x1b02 SAL	$0xf,%RSI

    (3) 0x1b06 AND	$-0x103a0000,%ESI

    (3) 0x1b0c XOR	%RSI,%RDX

    (3) 0x1b0f MOV	%RDX,%RSI

    (3) 0x1b12 SHR	$0x12,%RSI

    (3) 0x1b16 XOR	%RSI,%RDX

    (3) 0x1b19 VCVTUSI2SS	%EDX,%XMM1,%XMM0

    (3) 0x1b1f VMULSS	0x24e1(%RIP),%XMM0,%XMM0

    (3) 0x1b27 VCOMISS	%XMM0,%XMM3

    (3) 0x1b2b JA	1b9f

    (3) 0x1b2d MOV	%RAX,%RDX

    (3) 0x1b30 CMP	$0x26f,%RAX

    (3) 0x1b36 JBE	1ad0

    (3) 0x1b38 MOV	%R8,-0x2830(%RBP)

    (3) 0x1b3f LEA	-0x2770(%RBP),%RDI

    (3) 0x1b46 MOV	%R9,-0x2820(%RBP)

    (3) 0x1b4d MOV	%RCX,-0x2810(%RBP)

    (3) 0x1b54 VMOVAPS	%XMM1,-0x2800(%RBP)

    (3) 0x1b5c VZEROUPPER

    (3) 0x1b5f CALL	36c0 <_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv>

    (3) 0x1b64 MOV	-0x13f0(%RBP),%RDX

    (3) 0x1b6b MOV	-0x2830(%RBP),%R8

    (3) 0x1b72 MOV	-0x2820(%RBP),%R9

    (3) 0x1b79 MOV	-0x2810(%RBP),%RCX

    (3) 0x1b80 VMOVAPS	-0x2800(%RBP),%XMM1

    (3) 0x1b88 VMOVSS	0x247c(%RIP),%XMM3

    (3) 0x1b90 VMOVDQA64	0x26a6(%RIP),%ZMM7

    (3) 0x1b9a JMP	1ad0

    (3) 0x1b9f MOV	-0x2850(%RBP),%RDI

    (3) 0x1ba6 MOV	%RCX,-0x2810(%RBP)

    (3) 0x1bad MOV	%R9,-0x2820(%RBP)

    (3) 0x1bb4 MOV	%R8,-0x2830(%RBP)

    (3) 0x1bbb VMOVSS	%XMM0,(%RDI)

    (3) 0x1bbf JMP	1c25

0x1bc1 NOPL	(%RAX)

      (26) 0x1bc8 LEA	0x1(%RDX),%RAX

      (26) 0x1bcc MOV	-0x2770(%RBP,%RDX,8),%RDX

      (26) 0x1bd4 MOV	%RAX,-0x13f0(%RBP)

      (26) 0x1bdb MOV	%RDX,%RCX

      (26) 0x1bde SHR	$0xb,%RCX

      (26) 0x1be2 MOV	%ECX,%ECX

      (26) 0x1be4 XOR	%RCX,%RDX

      (26) 0x1be7 MOV	%RDX,%RCX

      (26) 0x1bea SAL	$0x7,%RCX

      (26) 0x1bee AND	$-0x62d3a980,%ECX

      (26) 0x1bf4 XOR	%RCX,%RDX

      (26) 0x1bf7 MOV	%RDX,%RCX

      (26) 0x1bfa SAL	$0xf,%RCX

      (26) 0x1bfe AND	$-0x103a0000,%ECX

      (26) 0x1c04 XOR	%RCX,%RDX

      (26) 0x1c07 MOV	%RDX,%RCX

      (26) 0x1c0a SHR	$0x12,%RCX

      (26) 0x1c0e XOR	%RCX,%RDX

      (26) 0x1c11 VCVTUSI2SS	%EDX,%XMM1,%XMM0

      (26) 0x1c17 VMULSS	0x23e9(%RIP),%XMM0,%XMM0

      (26) 0x1c1f VCOMISS	%XMM0,%XMM3

      (26) 0x1c23 JA	1c6d

      (26) 0x1c25 MOV	%RAX,%RDX

      (26) 0x1c28 CMP	$0x26f,%RAX

      (26) 0x1c2e JBE	1bc8

      (26) 0x1c30 VMOVAPS	%XMM1,-0x2800(%RBP)

      (26) 0x1c38 LEA	-0x2770(%RBP),%RDI

      (26) 0x1c3f VZEROUPPER

      (26) 0x1c42 CALL	36c0 <_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv>

      (26) 0x1c47 MOV	-0x13f0(%RBP),%RDX

      (26) 0x1c4e VMOVAPS	-0x2800(%RBP),%XMM1

      (26) 0x1c56 VMOVSS	0x23ae(%RIP),%XMM3

      (26) 0x1c5e VMOVDQA64	0x25d8(%RIP),%ZMM7

      (26) 0x1c68 JMP	1bc8

    (3) 0x1c6d MOV	$0x1,%EDX

    (3) 0x1c72 MOV	-0x2840(%RBP),%RDI

    (3) 0x1c79 MOV	-0x2810(%RBP),%RCX

    (3) 0x1c80 VPBROADCASTQ	%RDX,%ZMM8

    (3) 0x1c86 MOV	$-0x80000000,%RDX

    (3) 0x1c8d MOV	-0x2820(%RBP),%R9

    (3) 0x1c94 MOV	-0x2830(%RBP),%R8

    (3) 0x1c9b VPBROADCASTQ	%RDX,%ZMM9

    (3) 0x1ca1 MOV	$0x7fffffff,%EDX

    (3) 0x1ca6 VMOVSS	%XMM0,(%RDI)

    (3) 0x1caa VMOVDQA64	%ZMM8,%ZMM4

    (3) 0x1cb0 VPBROADCASTQ	%RDX,%ZMM10

    (3) 0x1cb6 VMOVDQA64	%ZMM9,%ZMM5

    (3) 0x1cbc VMOVDQA64	%ZMM10,%ZMM6

    (3) 0x1cc2 VMOVDQA	%XMM10,%XMM11

    (3) 0x1cc7 JMP	1d29

0x1cc9 NOPL	(%RAX)

      (23) 0x1cd0 MOV	-0x2770(%RBP,%RAX,8),%RSI

      (23) 0x1cd8 INC	%RAX

      (23) 0x1cdb MOV	%RSI,%RDX

      (23) 0x1cde SHR	$0xb,%RDX

      (23) 0x1ce2 MOV	%EDX,%EDX

      (23) 0x1ce4 XOR	%RSI,%RDX

      (23) 0x1ce7 MOV	%RDX,%RSI

      (23) 0x1cea SAL	$0x7,%RSI

      (23) 0x1cee AND	$-0x62d3a980,%ESI

      (23) 0x1cf4 XOR	%RSI,%RDX

      (23) 0x1cf7 MOV	%RDX,%RSI

      (23) 0x1cfa SAL	$0xf,%RSI

      (23) 0x1cfe AND	$-0x103a0000,%ESI

      (23) 0x1d04 XOR	%RSI,%RDX

      (23) 0x1d07 MOV	%RDX,%RSI

      (23) 0x1d0a SHR	$0x12,%RSI

      (23) 0x1d0e XOR	%RSI,%RDX

      (23) 0x1d11 VCVTUSI2SS	%EDX,%XMM1,%XMM0

      (23) 0x1d17 VMULSS	0x22e9(%RIP),%XMM0,%XMM0

      (23) 0x1d1f VCOMISS	%XMM0,%XMM3

      (23) 0x1d23 JA	1eea

      (23) 0x1d29 CMP	$0x26f,%RAX

      (23) 0x1d2f JBE	1cd0

      (23) 0x1d31 LEA	-0x2770(%RBP),%RAX

      (23) 0x1d38 NOPL	(%RAX,%RAX,1)

        (24) 0x1d40 VPANDQ	(%RAX),%ZMM5,%ZMM2

        (24) 0x1d46 VMOVDQA64	%ZMM6,%ZMM0

        (24) 0x1d4c ADD	$0x40,%RAX

        (24) 0x1d50 VPTERNLOGQ	$-0x14,-0x38(%RAX),%ZMM2,%ZMM0

        (24) 0x1d5b VPSRLQ	$0x1,%ZMM0,%ZMM2

        (24) 0x1d62 VPANDQ	%ZMM4,%ZMM0,%ZMM0

        (24) 0x1d68 VPMULLQ	%ZMM7,%ZMM0,%ZMM0

        (24) 0x1d6e VPTERNLOGQ	$-0x6a,0xc28(%RAX),%ZMM0,%ZMM2

        (24) 0x1d79 VMOVDQA64	%ZMM2,-0x40(%RAX)

        (24) 0x1d80 CMP	%RAX,%RBX

        (24) 0x1d83 JNE	1d40

      (23) 0x1d85 MOV	-0x2060(%RBP),%RDX

      (23) 0x1d8c MOV	-0x2058(%RBP),%RAX

      (23) 0x1d93 VMOVDQA	%XMM11,%XMM0

      (23) 0x1d97 VPANDQ	-0x2070(%RBP),%XMM9,%XMM2

      (23) 0x1da1 AND	$-0x80000000,%RDX

      (23) 0x1da8 AND	$0x7fffffff,%EAX

      (23) 0x1dad OR	%RDX,%RAX

      (23) 0x1db0 VPTERNLOGQ	$-0x14,-0x2068(%RBP),%XMM2,%XMM0

      (23) 0x1dbb MOV	%RAX,%RDX

      (23) 0x1dbe VPSRLQ	$0x1,%XMM0,%XMM2

      (23) 0x1dc3 VPANDQ	%XMM8,%XMM0,%XMM0

      (23) 0x1dc9 AND	$0x1,%EAX

      (23) 0x1dcc SHR	$0x1,%RDX

      (23) 0x1dcf NEG	%RAX

      (23) 0x1dd2 VPMULLQ	-0x27f0(%RBP),%XMM0,%XMM0

      (23) 0x1ddc VPTERNLOGQ	$-0x6a,-0x1408(%RBP),%XMM0,%XMM2

      (23) 0x1de7 XOR	-0x13f8(%RBP),%RDX

      (23) 0x1dee AND	$-0x66f74f21,%EAX

      (23) 0x1df3 VMOVDQA	%XMM2,-0x2070(%RBP)

      (23) 0x1dfb XOR	%RDX,%RAX

      (23) 0x1dfe LEA	-0x1418(%RBP),%RDX

      (23) 0x1e05 MOV	%RAX,-0x2060(%RBP)

      (23) 0x1e0c LEA	-0x2058(%RBP),%RAX

      (23) 0x1e13 NOPL	(%RAX,%RAX,1)

        (25) 0x1e18 VPANDQ	(%RAX),%ZMM5,%ZMM2

        (25) 0x1e1e VMOVDQA64	%ZMM6,%ZMM0

        (25) 0x1e24 ADD	$0x40,%RAX

        (25) 0x1e28 VPTERNLOGQ	$-0x14,-0x38(%RAX),%ZMM2,%ZMM0

        (25) 0x1e33 VPSRLQ	$0x1,%ZMM0,%ZMM2

        (25) 0x1e3a VPANDQ	%ZMM4,%ZMM0,%ZMM0

        (25) 0x1e40 VPMULLQ	%ZMM7,%ZMM0,%ZMM0

        (25) 0x1e46 VPTERNLOGQ	$-0x6a,-0x758(%RAX),%ZMM0,%ZMM2

        (25) 0x1e51 VMOVDQU64	%ZMM2,-0x40(%RAX)

        (25) 0x1e58 CMP	%RAX,%RDX

        (25) 0x1e5b JNE	1e18

      (23) 0x1e5d MOV	-0x2770(%RBP),%RSI

      (23) 0x1e64 MOV	-0x13f8(%RBP),%RAX

      (23) 0x1e6b VMOVDQA	%YMM10,%YMM0

      (23) 0x1e6f VPANDQ	-0x1418(%RBP),%YMM9,%YMM2

      (23) 0x1e79 MOV	%RSI,%RDX

      (23) 0x1e7c AND	$-0x80000000,%RAX

      (23) 0x1e82 AND	$0x7fffffff,%EDX

      (23) 0x1e88 VPTERNLOGQ	$-0x14,-0x1410(%RBP),%YMM2,%YMM0

      (23) 0x1e93 OR	%RDX,%RAX

      (23) 0x1e96 VPSRLQ	$0x1,%YMM0,%YMM2

      (23) 0x1e9b VPANDQ	%YMM8,%YMM0,%YMM0

      (23) 0x1ea1 MOV	%RAX,%RDX

      (23) 0x1ea4 AND	$0x1,%EAX

      (23) 0x1ea7 VPMULLQ	-0x27f0(%RBP),%YMM0,%YMM0

      (23) 0x1eb1 VPTERNLOGQ	$-0x6a,-0x1b30(%RBP),%YMM0,%YMM2

      (23) 0x1ebc SHR	$0x1,%RDX

      (23) 0x1ebf NEG	%RAX

      (23) 0x1ec2 VMOVDQU	%YMM2,-0x1418(%RBP)

      (23) 0x1eca XOR	-0x1b10(%RBP),%RDX

      (23) 0x1ed1 AND	$-0x66f74f21,%EAX

      (23) 0x1ed6 XOR	%RDX,%RAX

      (23) 0x1ed9 MOV	%RAX,-0x13f8(%RBP)

      (23) 0x1ee0 MOV	$0x1,%EAX

      (23) 0x1ee5 JMP	1cdb

    (3) 0x1eea MOV	-0x2858(%RBP),%RDI

    (3) 0x1ef1 ADDQ	$0x4,-0x2840(%RBP)

    (3) 0x1ef9 ADDQ	$0x4,-0x2850(%RBP)

    (3) 0x1f01 VMOVSS	%XMM0,(%RDI)

    (3) 0x1f05 ADD	$0x4,%RDI

    (3) 0x1f09 MOV	%RAX,-0x13f0(%RBP)

    (3) 0x1f10 MOV	%RDI,-0x2858(%RBP)

    (3) 0x1f17 CMP	%RDI,-0x2890(%RBP)

    (3) 0x1f1e JNE	1b2d

  (22) 0x1f24 MOV	%R9,-0x2810(%RBP)

  (22) 0x1f2b MOV	%RCX,%RBX

  (22) 0x1f2e MOV	%R8,-0x2800(%RBP)

  (22) 0x1f35 VMOVAPS	%XMM1,-0x2820(%RBP)

  (22) 0x1f3d VZEROUPPER

  (22) 0x1f40 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x1f45 MOV	-0x2810(%RBP),%R9

  (22) 0x1f4c MOV	-0x2800(%RBP),%R8

  (22) 0x1f53 MOV	%RAX,-0x27f0(%RBP)

  (22) 0x1f5a MOV	-0x28a8(%RBP),%RDI

  (22) 0x1f61 XOR	%ECX,%ECX

  (22) 0x1f63 XOR	%EDX,%EDX

  (22) 0x1f65 VMOVAPS	-0x2820(%RBP),%XMM1

    (6) 0x1f6d XOR	%R10D,%R10D

      (5) 0x1f70 MOV	%R10D,%ESI

      (5) 0x1f73 VXORPD	%XMM4,%XMM4,%XMM4

      (5) 0x1f77 XOR	%EAX,%EAX

      (5) 0x1f79 NOPL	(%RAX)

        (4) 0x1f80 LEA	(%RAX,%RCX,1),%R11D

        (4) 0x1f84 INC	%EAX

        (4) 0x1f86 VCVTSS2SD	(%RBX,%R11,4),%XMM1,%XMM0

        (4) 0x1f8c MOV	%ESI,%R11D

        (4) 0x1f8f VMOVAPD	%XMM0,%XMM2

        (4) 0x1f93 ADD	%R8D,%ESI

        (4) 0x1f96 VCVTSS2SD	(%RDI,%R11,4),%XMM1,%XMM0

        (4) 0x1f9c VFMADD231SD	%XMM0,%XMM2,%XMM4

        (4) 0x1fa1 CMP	%R8D,%EAX

        (4) 0x1fa4 JB	1f80

      (5) 0x1fa6 LEA	(%R10,%RCX,1),%EAX

      (5) 0x1faa INC	%R10D

      (5) 0x1fad VCVTSD2SS	%XMM4,%XMM4,%XMM4

      (5) 0x1fb1 VMOVSS	%XMM4,(%R12,%RAX,4)

      (5) 0x1fb7 CMP	%R8D,%R10D

      (5) 0x1fba JB	1f70

    (6) 0x1fbc INC	%EDX

    (6) 0x1fbe ADD	%R8D,%ECX

    (6) 0x1fc1 CMP	%EDX,%R9D

    (6) 0x1fc4 JNE	1f6d

  (22) 0x1fc6 MOV	%R9,-0x2820(%RBP)

  (22) 0x1fcd MOV	%R8,-0x2810(%RBP)

  (22) 0x1fd4 VMOVAPS	%XMM1,-0x2830(%RBP)

  (22) 0x1fdc CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x1fe1 SUB	-0x27f0(%RBP),%RAX

  (22) 0x1fe8 MOV	%RAX,%RCX

  (22) 0x1feb MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x1ff5 IMUL	%RCX

  (22) 0x1ff8 SAR	$0x3f,%RCX

  (22) 0x1ffc MOV	%RDX,%RAX

  (22) 0x1fff SAR	$0x7,%RAX

  (22) 0x2003 SUB	%RCX,%RAX

  (22) 0x2006 ADD	%RAX,-0x27b0(%RBP)

  (22) 0x200d CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x2012 MOV	%R14,-0x2800(%RBP)

  (22) 0x2019 MOV	-0x2880(%RBP),%R10

  (22) 0x2020 XOR	%ECX,%ECX

  (22) 0x2022 MOV	-0x2888(%RBP),%R14

  (22) 0x2029 MOV	-0x2820(%RBP),%R9

  (22) 0x2030 MOV	%RAX,-0x27f0(%RBP)

  (22) 0x2037 XOR	%EDX,%EDX

  (22) 0x2039 MOV	-0x2810(%RBP),%R8

  (22) 0x2040 VMOVAPS	-0x2830(%RBP),%XMM1

    (9) 0x2048 XOR	%R11D,%R11D

    (9) 0x204b NOPL	(%RAX,%RAX,1)

      (8) 0x2050 MOV	%R11D,%ESI

      (8) 0x2053 VXORPD	%XMM4,%XMM4,%XMM4

      (8) 0x2057 XOR	%EAX,%EAX

      (8) 0x2059 NOPL	(%RAX)

        (7) 0x2060 LEA	(%RAX,%RCX,1),%EDI

        (7) 0x2063 INC	%EAX

        (7) 0x2065 VCVTSS2SD	(%RBX,%RDI,4),%XMM1,%XMM0

        (7) 0x206a MOV	%ESI,%EDI

        (7) 0x206c VMOVAPD	%XMM0,%XMM2

        (7) 0x2070 ADD	%R8D,%ESI

        (7) 0x2073 VCVTSS2SD	(%R10,%RDI,4),%XMM1,%XMM0

        (7) 0x2079 VFMADD231SD	%XMM0,%XMM2,%XMM4

        (7) 0x207e CMP	%R8D,%EAX

        (7) 0x2081 JB	2060

      (8) 0x2083 LEA	(%R11,%RCX,1),%EAX

      (8) 0x2087 INC	%R11D

      (8) 0x208a VCVTSD2SS	%XMM4,%XMM4,%XMM4

      (8) 0x208e VMOVSS	%XMM4,(%R14,%RAX,4)

      (8) 0x2094 CMP	%R8D,%R11D

      (8) 0x2097 JB	2050

    (9) 0x2099 INC	%EDX

    (9) 0x209b ADD	%R8D,%ECX

    (9) 0x209e CMP	%R9D,%EDX

    (9) 0x20a1 JB	2048

  (22) 0x20a3 MOV	%R9,-0x2810(%RBP)

  (22) 0x20aa MOV	-0x2800(%RBP),%R14

  (22) 0x20b1 VMOVAPS	%XMM1,-0x2820(%RBP)

  (22) 0x20b9 MOV	%R8,-0x2800(%RBP)

  (22) 0x20c0 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x20c5 SUB	-0x27f0(%RBP),%RAX

  (22) 0x20cc MOV	%RAX,%RCX

  (22) 0x20cf MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x20d9 IMUL	%RCX

  (22) 0x20dc SAR	$0x3f,%RCX

  (22) 0x20e0 MOV	%RDX,%RAX

  (22) 0x20e3 SAR	$0x7,%RAX

  (22) 0x20e7 SUB	%RCX,%RAX

  (22) 0x20ea ADD	%RAX,-0x27a8(%RBP)

  (22) 0x20f1 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x20f6 MOV	-0x2810(%RBP),%R9

  (22) 0x20fd MOV	-0x2800(%RBP),%R8

  (22) 0x2104 XOR	%ECX,%ECX

  (22) 0x2106 MOV	%RAX,-0x27f0(%RBP)

  (22) 0x210d VMOVAPS	-0x2820(%RBP),%XMM1

  (22) 0x2115 XOR	%EDX,%EDX

    (12) 0x2117 XOR	%EDI,%EDI

    (12) 0x2119 NOPL	(%RAX)

      (11) 0x2120 MOV	%EDI,%ESI

      (11) 0x2122 VXORPD	%XMM4,%XMM4,%XMM4

      (11) 0x2126 XOR	%EAX,%EAX

      (11) 0x2128 NOPL	(%RAX,%RAX,1)

        (10) 0x2130 LEA	(%RAX,%RCX,1),%R10D

        (10) 0x2134 INC	%EAX

        (10) 0x2136 VCVTSS2SD	(%RBX,%R10,4),%XMM1,%XMM0

        (10) 0x213c MOV	%ESI,%R10D

        (10) 0x213f VMOVAPD	%XMM0,%XMM2

        (10) 0x2143 ADD	%R8D,%ESI

        (10) 0x2146 VCVTSS2SD	(%R14,%R10,4),%XMM1,%XMM0

        (10) 0x214c VFMADD231SD	%XMM0,%XMM2,%XMM4

        (10) 0x2151 CMP	%R8D,%EAX

        (10) 0x2154 JB	2130

      (11) 0x2156 LEA	(%RDI,%RCX,1),%EAX

      (11) 0x2159 INC	%EDI

      (11) 0x215b VCVTSD2SS	%XMM4,%XMM4,%XMM4

      (11) 0x215f VMOVSS	%XMM4,(%R13,%RAX,4)

      (11) 0x2166 CMP	%R8D,%EDI

      (11) 0x2169 JB	2120

    (12) 0x216b INC	%EDX

    (12) 0x216d ADD	%R8D,%ECX

    (12) 0x2170 CMP	%R9D,%EDX

    (12) 0x2173 JB	2117

  (22) 0x2175 MOV	%R9,-0x2830(%RBP)

  (22) 0x217c MOV	%R8,-0x2800(%RBP)

  (22) 0x2183 VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x218b CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x2190 MOV	-0x2800(%RBP),%R8

  (22) 0x2197 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x219f VMOVSS	0x1e65(%RIP),%XMM3

  (22) 0x21a7 SUB	-0x27f0(%RBP),%RAX

  (22) 0x21ae VCVTSI2SS	%R8D,%XMM1,%XMM0

  (22) 0x21b3 MOV	%RAX,%RCX

  (22) 0x21b6 MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x21c0 MOV	%R8,-0x2820(%RBP)

  (22) 0x21c7 IMUL	%RCX

  (22) 0x21ca SAR	$0x3f,%RCX

  (22) 0x21ce VSQRTSS	%XMM0,%XMM0,%XMM2

  (22) 0x21d2 MOV	%RDX,%RAX

  (22) 0x21d5 SAR	$0x7,%RAX

  (22) 0x21d9 SUB	%RCX,%RAX

  (22) 0x21dc VDIVSS	%XMM2,%XMM3,%XMM2

  (22) 0x21e0 ADD	%RAX,-0x27a0(%RBP)

  (22) 0x21e7 VMOVSS	%XMM2,-0x2800(%RBP)

  (22) 0x21ef CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x21f4 MOV	-0x2898(%RBP),%RDI

  (22) 0x21fb MOV	-0x2888(%RBP),%RCX

  (22) 0x2202 XOR	%ESI,%ESI

  (22) 0x2204 MOV	-0x28a0(%RBP),%R10

  (22) 0x220b MOV	-0x28f0(%RBP),%R11

  (22) 0x2212 MOV	%RAX,-0x27f0(%RBP)

  (22) 0x2219 MOV	-0x2830(%RBP),%R9

  (22) 0x2220 MOV	-0x2820(%RBP),%R8

  (22) 0x2227 VMOVSS	-0x2800(%RBP),%XMM2

  (22) 0x222f VMOVAPS	-0x2810(%RBP),%XMM1

    (14) 0x2237 MOV	%RDI,%RDX

    (14) 0x223a XOR	%EAX,%EAX

    (14) 0x223c NOPL	(%RAX)

      (13) 0x2240 VMOVSS	(%RCX,%RAX,4),%XMM0

      (13) 0x2245 INC	%RAX

      (13) 0x2248 VMOVSS	%XMM0,(%RDX)

      (13) 0x224c ADD	%R10,%RDX

      (13) 0x224f CMP	%EAX,%R8D

      (13) 0x2252 JG	2240

    (14) 0x2254 INC	%ESI

    (14) 0x2256 ADD	$0x4,%RDI

    (14) 0x225a ADD	%R11,%RCX

    (14) 0x225d CMP	-0x285c(%RBP),%ESI

    (14) 0x2263 JL	2237

  (22) 0x2265 MOV	%R9,-0x2830(%RBP)

  (22) 0x226c MOV	%R8,-0x2820(%RBP)

  (22) 0x2273 VMOVAPS	%XMM1,-0x2850(%RBP)

  (22) 0x227b VMOVSS	%XMM2,-0x2840(%RBP)

  (22) 0x2283 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x2288 SUB	-0x27f0(%RBP),%RAX

  (22) 0x228f MOV	%RAX,%RCX

  (22) 0x2292 MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x229c IMUL	%RCX

  (22) 0x229f SAR	$0x3f,%RCX

  (22) 0x22a3 MOV	%RDX,%RAX

  (22) 0x22a6 SAR	$0x7,%RAX

  (22) 0x22aa SUB	%RCX,%RAX

  (22) 0x22ad ADD	%RAX,-0x2798(%RBP)

  (22) 0x22b4 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x22b9 MOV	%R14,-0x2810(%RBP)

  (22) 0x22c0 MOV	-0x2898(%RBP),%R11

  (22) 0x22c7 XOR	%ECX,%ECX

  (22) 0x22c9 MOV	%RAX,-0x2800(%RBP)

  (22) 0x22d0 MOV	-0x2830(%RBP),%R9

  (22) 0x22d7 XOR	%EDI,%EDI

  (22) 0x22d9 XOR	%EDX,%EDX

  (22) 0x22db MOV	-0x2820(%RBP),%R8

  (22) 0x22e2 MOV	-0x2878(%RBP),%R14

  (22) 0x22e9 MOV	%R13,%RSI

  (22) 0x22ec VMOVSS	-0x2840(%RBP),%XMM2

  (22) 0x22f4 VMOVAPS	-0x2850(%RBP),%XMM1

    (17) 0x22fc MOV	%EDX,-0x27f0(%RBP)

    (17) 0x2302 XOR	%R13D,%R13D

    (17) 0x2305 NOPL	(%RAX)

      (16) 0x2308 MOV	%R13D,%EDX

      (16) 0x230b VXORPD	%XMM5,%XMM5,%XMM5

      (16) 0x230f XOR	%EAX,%EAX

      (16) 0x2311 NOPL	(%RAX)

        (15) 0x2318 LEA	(%RAX,%RCX,1),%R10D

        (15) 0x231c INC	%EAX

        (15) 0x231e VCVTSS2SD	(%R12,%R10,4),%XMM1,%XMM0

        (15) 0x2324 MOV	%EDX,%R10D

        (15) 0x2327 VMOVAPD	%XMM0,%XMM4

        (15) 0x232b ADD	%R9D,%EDX

        (15) 0x232e VCVTSS2SD	(%R11,%R10,4),%XMM1,%XMM0

        (15) 0x2334 VFMADD231SD	%XMM0,%XMM4,%XMM5

        (15) 0x2339 CMP	%R8D,%EAX

        (15) 0x233c JB	2318

      (16) 0x233e VCVTSD2SS	%XMM5,%XMM5,%XMM5

      (16) 0x2342 VMULSS	%XMM2,%XMM5,%XMM5

      (16) 0x2346 LEA	(%R13,%RDI,1),%EAX

      (16) 0x234b INC	%R13D

      (16) 0x234e VMOVSS	%XMM5,(%R14,%RAX,4)

      (16) 0x2354 CMP	%R9D,%R13D

      (16) 0x2357 JB	2308

    (17) 0x2359 MOV	-0x27f0(%RBP),%EDX

    (17) 0x235f ADD	%R9D,%EDI

    (17) 0x2362 ADD	%R8D,%ECX

    (17) 0x2365 INC	%EDX

    (17) 0x2367 CMP	%R9D,%EDX

    (17) 0x236a JB	22fc

  (22) 0x236c MOV	%R9,-0x2820(%RBP)

  (22) 0x2373 MOV	-0x2810(%RBP),%R14

  (22) 0x237a MOV	%RSI,%R13

  (22) 0x237d MOV	%R8,-0x2810(%RBP)

  (22) 0x2384 VMOVAPS	%XMM1,-0x2830(%RBP)

  (22) 0x238c CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x2391 SUB	-0x2800(%RBP),%RAX

  (22) 0x2398 MOV	%RAX,%RCX

  (22) 0x239b MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x23a5 IMUL	%RCX

  (22) 0x23a8 SAR	$0x3f,%RCX

  (22) 0x23ac MOV	%RDX,%RAX

  (22) 0x23af SAR	$0x7,%RAX

  (22) 0x23b3 SUB	%RCX,%RAX

  (22) 0x23b6 ADD	%RAX,-0x2790(%RBP)

  (22) 0x23bd CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x23c2 MOV	-0x2878(%RBP),%RDI

  (22) 0x23c9 MOV	-0x285c(%RBP),%ECX

  (22) 0x23cf MOV	%R15,%RDX

  (22) 0x23d2 MOV	-0x28c0(%RBP),%RSI

  (22) 0x23d9 MOV	%RAX,-0x27f0(%RBP)

  (22) 0x23e0 CALL	2e10 <_Z7softmaxPKfPfS1_i>

  (22) 0x23e5 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x23ea MOV	%RAX,%RCX

  (22) 0x23ed MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x23f7 SUB	-0x27f0(%RBP),%RCX

  (22) 0x23fe IMUL	%RCX

  (22) 0x2401 SAR	$0x3f,%RCX

  (22) 0x2405 MOV	%RDX,%RAX

  (22) 0x2408 SAR	$0x7,%RAX

  (22) 0x240c SUB	%RCX,%RAX

  (22) 0x240f ADD	%RAX,-0x2788(%RBP)

  (22) 0x2416 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x241b MOV	%R14,-0x2800(%RBP)

  (22) 0x2422 MOV	-0x2820(%RBP),%R9

  (22) 0x2429 XOR	%ECX,%ECX

  (22) 0x242b MOV	%RAX,-0x27f0(%RBP)

  (22) 0x2432 MOV	-0x2810(%RBP),%R8

  (22) 0x2439 XOR	%EDI,%EDI

  (22) 0x243b XOR	%EDX,%EDX

  (22) 0x243d MOV	-0x28b8(%RBP),%R14

  (22) 0x2444 VMOVAPS	-0x2830(%RBP),%XMM1

    (20) 0x244c XOR	%R11D,%R11D

    (20) 0x244f NOP

      (19) 0x2450 MOV	%R11D,%ESI

      (19) 0x2453 VXORPD	%XMM4,%XMM4,%XMM4

      (19) 0x2457 XOR	%EAX,%EAX

      (19) 0x2459 NOPL	(%RAX)

        (18) 0x2460 LEA	(%RAX,%RCX,1),%R10D

        (18) 0x2464 INC	%EAX

        (18) 0x2466 VCVTSS2SD	(%R15,%R10,4),%XMM1,%XMM0

        (18) 0x246c MOV	%ESI,%R10D

        (18) 0x246f VMOVAPD	%XMM0,%XMM2

        (18) 0x2473 ADD	%R8D,%ESI

        (18) 0x2476 VCVTSS2SD	(%R13,%R10,4),%XMM1,%XMM0

        (18) 0x247d VFMADD231SD	%XMM0,%XMM2,%XMM4

        (18) 0x2482 CMP	%R9D,%EAX

        (18) 0x2485 JB	2460

      (19) 0x2487 LEA	(%R11,%RDI,1),%EAX

      (19) 0x248b INC	%R11D

      (19) 0x248e VCVTSD2SS	%XMM4,%XMM4,%XMM4

      (19) 0x2492 VMOVSS	%XMM4,(%R14,%RAX,4)

      (19) 0x2498 CMP	%R8D,%R11D

      (19) 0x249b JB	2450

    (20) 0x249d INC	%EDX

    (20) 0x249f ADD	%R8D,%EDI

    (20) 0x24a2 ADD	%R9D,%ECX

    (20) 0x24a5 CMP	%R9D,%EDX

    (20) 0x24a8 JB	244c

  (22) 0x24aa MOV	%R9,-0x2810(%RBP)

  (22) 0x24b1 MOV	-0x2800(%RBP),%R14

  (22) 0x24b8 VMOVAPS	%XMM1,-0x2820(%RBP)

  (22) 0x24c0 MOV	%R8,-0x2800(%RBP)

  (22) 0x24c7 CALL	10e0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt>

  (22) 0x24cc MOV	-0x2800(%RBP),%R8

  (22) 0x24d3 MOV	-0x2810(%RBP),%R9

  (22) 0x24da SUB	-0x27f0(%RBP),%RAX

  (22) 0x24e1 VMOVAPS	-0x2820(%RBP),%XMM1

  (22) 0x24e9 MOV	%RAX,%RCX

  (22) 0x24ec MOV	$0x20c49ba5e353f7cf,%RAX

  (22) 0x24f6 IMUL	%RCX

  (22) 0x24f9 SAR	$0x3f,%RCX

  (22) 0x24fd MOV	%RDX,%RAX

  (22) 0x2500 SAR	$0x7,%RAX

  (22) 0x2504 SUB	%RCX,%RAX

  (22) 0x2507 ADD	%RAX,-0x2780(%RBP)

  (22) 0x250e MOV	-0x28e0(%RBP),%EAX

  (22) 0x2514 DEC	%EAX

  (22) 0x2516 CLTQ

  (22) 0x2518 CMP	-0x28b0(%RBP),%RAX

  (22) 0x251f JE	2758

  (22) 0x2525 LEA	-0x13c0(%RBP),%RDI

  (22) 0x252c MOV	%R8,-0x2800(%RBP)

  (22) 0x2533 MOV	%R9,-0x27f0(%RBP)

  (22) 0x253a VMOVAPS	%XMM1,-0x2810(%RBP)

  (22) 0x2542 CALL	1060 <_ZNSt13random_device7_M_finiEv@plt>

  (22) 0x2547 MOV	-0x28a0(%RBP),%RSI

  (22) 0x254e MOV	-0x28c0(%RBP),%RDI

  (22) 0x2555 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x255a MOV	-0x2870(%RBP),%RSI

  (22) 0x2561 MOV	%R15,%RDI

  (22) 0x2564 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x2569 MOV	-0x2870(%RBP),%RSI

  (22) 0x2570 MOV	-0x2878(%RBP),%RDI

  (22) 0x2577 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x257c MOV	-0x2838(%RBP),%R15

  (22) 0x2583 MOV	%R13,%RDI

  (22) 0x2586 MOV	%R15,%RSI

  (22) 0x2589 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x258e MOV	-0x2898(%RBP),%RDI

  (22) 0x2595 MOV	%R15,%RSI

  (22) 0x2598 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x259d MOV	-0x2888(%RBP),%RDI

  (22) 0x25a4 MOV	%R15,%RSI

  (22) 0x25a7 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25ac MOV	%R12,%RDI

  (22) 0x25af MOV	%R15,%RSI

  (22) 0x25b2 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25b7 MOV	-0x28b8(%RBP),%RDI

  (22) 0x25be MOV	%R15,%RSI

  (22) 0x25c1 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25c6 MOV	-0x2868(%RBP),%R12

  (22) 0x25cd MOV	%R14,%RDI

  (22) 0x25d0 MOV	%R12,%RSI

  (22) 0x25d3 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25d8 MOV	-0x2880(%RBP),%RDI

  (22) 0x25df MOV	%R12,%RSI

  (22) 0x25e2 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25e7 MOV	-0x28a8(%RBP),%RDI

  (22) 0x25ee MOV	%R12,%RSI

  (22) 0x25f1 CALL	10a0 <_ZdlPvm@plt>

  (22) 0x25f6 MOV	%RBX,%RDI

  (22) 0x25f9 MOV	%R15,%RSI

  (22) 0x25fc CALL	10a0 <_ZdlPvm@plt>

  (22) 0x2601 INCQ	-0x28b0(%RBP)

  (22) 0x2608 MOV	-0x28f8(%RBP),%RBX

  (22) 0x260f MOV	-0x27f0(%RBP),%R9

  (22) 0x2616 MOV	-0x2800(%RBP),%R8

  (22) 0x261d CMP	%RBX,-0x28b0(%RBP)

  (22) 0x2624 JE	2950

  (22) 0x262a MOV	-0x2838(%RBP),%RDI

  (22) 0x2631 MOV	%R8,-0x2800(%RBP)

  (22) 0x2638 MOV	%R9,-0x27f0(%RBP)

  (22) 0x263f CALL	1090 <_Znwm@plt>

  (22) 0x2644 CMPQ	$0x1,-0x28c8(%RBP)

  (22) 0x264c MOV	-0x27f0(%RBP),%R9

  (22) 0x2653 MOV	-0x2800(%RBP),%R8

  (22) 0x265a VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x2662 MOVL	$0,(%RAX)

  (22) 0x2668 MOV	%RAX,%RBX

  (22) 0x266b JNE	14d1

  (22) 0x2671 JMP	151e

  (22) 0x2676 MOV	$0x4,%EDI

  (22) 0x267b CALL	1090 <_Znwm@plt>

  (22) 0x2680 MOV	-0x27f0(%RBP),%R9

  (22) 0x2687 MOV	-0x2800(%RBP),%R8

  (22) 0x268e MOVL	$0,(%RAX)

  (22) 0x2694 MOV	%RAX,%R15

  (22) 0x2697 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x269f JMP	17ce

  (22) 0x26a4 MOV	$0x4,%EDI

  (22) 0x26a9 CALL	1090 <_Znwm@plt>

  (22) 0x26ae MOVL	$0,(%RAX)

  (22) 0x26b4 MOV	$0x4,%EDI

  (22) 0x26b9 MOV	%RAX,%R12

  (22) 0x26bc CALL	1090 <_Znwm@plt>

  (22) 0x26c1 MOVL	$0,(%RAX)

  (22) 0x26c7 MOV	$0x4,%EDI

  (22) 0x26cc MOV	%RAX,-0x2888(%RBP)

  (22) 0x26d3 CALL	1090 <_Znwm@plt>

  (22) 0x26d8 MOVL	$0,(%RAX)

  (22) 0x26de MOV	$0x4,%EDI

  (22) 0x26e3 MOV	%RAX,-0x2898(%RBP)

  (22) 0x26ea CALL	1090 <_Znwm@plt>

  (22) 0x26ef MOV	-0x27f0(%RBP),%R9

  (22) 0x26f6 MOV	-0x2800(%RBP),%R8

  (22) 0x26fd MOVL	$0,(%RAX)

  (22) 0x2703 MOV	%RAX,%R13

  (22) 0x2706 VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x270e JMP	16f8

  (22) 0x2713 MOV	$0x4,%EDI

  (22) 0x2718 CALL	1090 <_Znwm@plt>

  (22) 0x271d MOVL	$0,(%RAX)

  (22) 0x2723 MOV	$0x4,%EDI

  (22) 0x2728 MOV	%RAX,-0x2880(%RBP)

  (22) 0x272f CALL	1090 <_Znwm@plt>

  (22) 0x2734 MOV	-0x27f0(%RBP),%R9

  (22) 0x273b MOV	-0x2800(%RBP),%R8

  (22) 0x2742 MOVL	$0,(%RAX)

  (22) 0x2748 MOV	%RAX,%R14

  (22) 0x274b VMOVAPS	-0x2810(%RBP),%XMM1

  (22) 0x2753 JMP	15e7

  (22) 0x2758 VMOVSS	0x18b0(%RIP),%XMM0

  (22) 0x2760 MOV	-0x285c(%RBP),%ECX

  (22) 0x2766 MOV	%R15,%RSI

  (22) 0x2769 MOV	%R8,-0x2820(%RBP)

  (22) 0x2770 MOV	-0x28c0(%RBP),%RDX

  (22) 0x2777 MOV	-0x2878(%RBP),%RDI

  (22) 0x277e VMOVAPS	%XMM1,-0x2830(%RBP)

  (22) 0x2786 CALL	30f0 <_Z15ValidateSoftmaxPKfS0_S0_if>

  (22) 0x278b MOV	$0x14,%EDX

  (22) 0x2790 LEA	0x199f(%RIP),%RSI

  (22) 0x2797 LEA	0x3922(%RIP),%RDI

  (22) 0x279e MOV	%AL,-0x27f0(%RBP)

  (22) 0x27a4 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x27a9 MOV	$0x1b,%EDX

  (22) 0x27ae LEA	0x1996(%RIP),%RSI

  (22) 0x27b5 LEA	0x3904(%RIP),%RDI

  (22) 0x27bc CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x27c1 CMPB	$0,-0x27f0(%RBP)

  (22) 0x27c8 LEA	0x1937(%RIP),%RAX

  (22) 0x27cf LEA	0x1933(%RIP),%RSI

  (22) 0x27d6 CMOVNE	%RAX,%RSI

  (22) 0x27da MOV	%RSI,%RDI

  (22) 0x27dd MOV	%RSI,-0x2800(%RBP)

  (22) 0x27e4 CALL	1030 <strlen@plt>

  (22) 0x27e9 MOV	-0x2800(%RBP),%RSI

  (22) 0x27f0 LEA	0x38c9(%RIP),%RDI

  (22) 0x27f7 MOV	%RAX,%RDX

  (22) 0x27fa CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x27ff MOV	$0x1,%EDX

  (22) 0x2804 LEA	0x18f9(%RIP),%RSI

  (22) 0x280b LEA	0x38ae(%RIP),%RDI

  (22) 0x2812 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x2817 MOV	$0x15,%EDX

  (22) 0x281c LEA	0x1944(%RIP),%RSI

  (22) 0x2823 LEA	0x3896(%RIP),%RDI

  (22) 0x282a CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x282f MOV	$0x3,%EDX

  (22) 0x2834 LEA	0x1942(%RIP),%RSI

  (22) 0x283b LEA	0x387e(%RIP),%RDI

  (22) 0x2842 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x2847 MOV	$0x1,%EDX

  (22) 0x284c LEA	0x18b1(%RIP),%RSI

  (22) 0x2853 LEA	0x3866(%RIP),%RDI

  (22) 0x285a CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

  (22) 0x285f CMPB	$0,-0x27f0(%RBP)

  (22) 0x2866 MOV	-0x2810(%RBP),%R9

  (22) 0x286d MOV	-0x2820(%RBP),%R8

  (22) 0x2874 VMOVAPS	-0x2830(%RBP),%XMM1

  (22) 0x287c JNE	2525

0x2882 LEA	-0x13c0(%RBP),%RDI

0x2889 CALL	1060 <_ZNSt13random_device7_M_finiEv@plt>

0x288e MOV	-0x28a0(%RBP),%RSI

0x2895 MOV	-0x28c0(%RBP),%RDI

0x289c CALL	10a0 <_ZdlPvm@plt>

0x28a1 MOV	-0x2870(%RBP),%RSI

0x28a8 MOV	%R15,%RDI

0x28ab CALL	10a0 <_ZdlPvm@plt>

0x28b0 MOV	-0x2870(%RBP),%RSI

0x28b7 MOV	-0x2878(%RBP),%RDI

0x28be CALL	10a0 <_ZdlPvm@plt>

0x28c3 MOV	-0x2838(%RBP),%R15

0x28ca MOV	%R13,%RDI

0x28cd MOV	%R15,%RSI

0x28d0 CALL	10a0 <_ZdlPvm@plt>

0x28d5 MOV	-0x2898(%RBP),%RDI

0x28dc MOV	%R15,%RSI

0x28df CALL	10a0 <_ZdlPvm@plt>

0x28e4 MOV	-0x2888(%RBP),%RDI

0x28eb MOV	%R15,%RSI

0x28ee CALL	10a0 <_ZdlPvm@plt>

0x28f3 MOV	%R15,%RSI

0x28f6 MOV	%R12,%RDI

0x28f9 CALL	10a0 <_ZdlPvm@plt>

0x28fe MOV	-0x28b8(%RBP),%RDI

0x2905 MOV	%R15,%RSI

0x2908 CALL	10a0 <_ZdlPvm@plt>

0x290d MOV	-0x2868(%RBP),%R12

0x2914 MOV	%R14,%RDI

0x2917 MOV	%R12,%RSI

0x291a CALL	10a0 <_ZdlPvm@plt>

0x291f MOV	-0x2880(%RBP),%RDI

0x2926 MOV	%R12,%RSI

0x2929 CALL	10a0 <_ZdlPvm@plt>

0x292e MOV	-0x28a8(%RBP),%RDI

0x2935 MOV	%R12,%RSI

0x2938 CALL	10a0 <_ZdlPvm@plt>

0x293d MOV	%R15,%RSI

0x2940 MOV	%RBX,%RDI

0x2943 CALL	10a0 <_ZdlPvm@plt>

0x2948 JMP	2b68

0x294d VZEROUPPER

0x2950 MOV	$0x16,%EDX

0x2955 LEA	0x1825(%RIP),%RSI

0x295c LEA	0x375d(%RIP),%RDI

0x2963 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2968 MOV	-0x27b0(%RBP),%RSI

0x296f LEA	0x374a(%RIP),%RDI

0x2976 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x297b MOV	$0x4,%EDX

0x2980 LEA	0x1811(%RIP),%RSI

0x2987 MOV	%RAX,%RDI

0x298a CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x298f MOV	$0x14,%EDX

0x2994 LEA	0x1802(%RIP),%RSI

0x299b LEA	0x371e(%RIP),%RDI

0x29a2 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x29a7 MOV	-0x27a8(%RBP),%RSI

0x29ae LEA	0x370b(%RIP),%RDI

0x29b5 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x29ba MOV	$0x4,%EDX

0x29bf LEA	0x17d2(%RIP),%RSI

0x29c6 MOV	%RAX,%RDI

0x29c9 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x29ce MOV	$0x16,%EDX

0x29d3 LEA	0x17d8(%RIP),%RSI

0x29da LEA	0x36df(%RIP),%RDI

0x29e1 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x29e6 MOV	-0x27a0(%RBP),%RSI

0x29ed LEA	0x36cc(%RIP),%RDI

0x29f4 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x29f9 MOV	$0x4,%EDX

0x29fe LEA	0x1793(%RIP),%RSI

0x2a05 MOV	%RAX,%RDI

0x2a08 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2a0d MOV	$0x13,%EDX

0x2a12 LEA	0x17b0(%RIP),%RSI

0x2a19 LEA	0x36a0(%RIP),%RDI

0x2a20 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2a25 MOV	-0x2798(%RBP),%RSI

0x2a2c LEA	0x368d(%RIP),%RDI

0x2a33 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x2a38 MOV	$0x4,%EDX

0x2a3d LEA	0x1754(%RIP),%RSI

0x2a44 MOV	%RAX,%RDI

0x2a47 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2a4c MOV	$0x14,%EDX

0x2a51 LEA	0x1785(%RIP),%RSI

0x2a58 LEA	0x3661(%RIP),%RDI

0x2a5f CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2a64 MOV	-0x2790(%RBP),%RSI

0x2a6b LEA	0x364e(%RIP),%RDI

0x2a72 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x2a77 MOV	$0x4,%EDX

0x2a7c LEA	0x1715(%RIP),%RSI

0x2a83 MOV	%RAX,%RDI

0x2a86 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2a8b MOV	$0x11,%EDX

0x2a90 LEA	0x175b(%RIP),%RSI

0x2a97 LEA	0x3622(%RIP),%RDI

0x2a9e CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2aa3 MOV	-0x2788(%RBP),%RSI

0x2aaa LEA	0x360f(%RIP),%RDI

0x2ab1 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x2ab6 MOV	$0x4,%EDX

0x2abb LEA	0x16d6(%RIP),%RSI

0x2ac2 MOV	%RAX,%RDI

0x2ac5 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2aca MOV	$0x17,%EDX

0x2acf LEA	0x172e(%RIP),%RSI

0x2ad6 LEA	0x35e3(%RIP),%RDI

0x2add CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2ae2 MOV	-0x2780(%RBP),%RSI

0x2ae9 LEA	0x35d0(%RIP),%RDI

0x2af0 CALL	1070 <_ZNSo9_M_insertIlEERSoT_@plt>

0x2af5 MOV	$0x4,%EDX

0x2afa LEA	0x1697(%RIP),%RSI

0x2b01 MOV	%RAX,%RDI

0x2b04 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2b09 XOR	%EAX,%EAX

0x2b0b MOV	-0x38(%RBP),%RDX

0x2b0f SUB	%FS:0x28,%RDX

0x2b18 JNE	2b84

0x2b1a ADD	$0x2900,%RSP

0x2b21 POP	%RBX

0x2b22 POP	%R10

0x2b24 POP	%R12

0x2b26 POP	%R13

0x2b28 POP	%R14

0x2b2a POP	%R15

0x2b2c POP	%RBP

0x2b2d LEA	-0x8(%R10),%RSP

0x2b31 RET

0x2b32 MOV	$0x7,%EDX

0x2b37 LEA	0x15d2(%RIP),%RSI

0x2b3e LEA	0x369b(%RIP),%RDI

0x2b45 CALL	10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>

0x2b4a MOV	(%RBX),%RSI

0x2b4d LEA	0x368c(%RIP),%RDI

0x2b54 CALL	1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>

0x2b59 LEA	0x15b8(%RIP),%RSI

0x2b60 MOV	%RAX,%RDI

0x2b63 CALL	1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>

0x2b68 MOV	$0x1,%EAX

0x2b6d JMP	2b0b

0x2b6f LEA	0x14da(%RIP),%RSI

0x2b76 LEA	0x3663(%RIP),%RDI

0x2b7d CALL	1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>

0x2b82 JMP	2b68

0x2b84 CALL	10b0 <__stack_chk_fail@plt>

0x2b89 MOV	%RAX,%R12

0x2b8c VZEROUPPER

0x2b8f JMP	123b

0x2b94 JMP	1296

0x2b99 MOV	%RAX,%R12

0x2b9c VZEROUPPER

0x2b9f JMP	1228

0x2ba4 MOV	%RAX,%R13

0x2ba7 VZEROUPPER

0x2baa JMP	1216

0x2baf MOV	%RAX,%R13

0x2bb2 VZEROUPPER

0x2bb5 JMP	1203

0x2bba MOV	%RAX,%R13

0x2bbd VZEROUPPER

0x2bc0 JMP	11f0

0x2bc5 JMP	12fd

0x2bca MOV	%RAX,%R15

0x2bcd VZEROUPPER

0x2bd0 JMP	11cb

0x2bd5 MOV	%RAX,%R12

0x2bd8 VZEROUPPER

0x2bdb JMP	1270

0x2be0 MOV	%RAX,%R12

0x2be3 VZEROUPPER

0x2be6 JMP	125d

0x2beb MOV	%RAX,%R12

0x2bee VZEROUPPER

0x2bf1 JMP	124a

0x2bf6 JMP	1170

0x2bfb VZEROUPPER

0x2bfe JMP	11ae

0x2c03 NOPW	%CS:(%RAX,%RAX,1)

0x2c0d NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►100.00+	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:183	attention-gcc-skl512

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_0

Source file and lines	attention_v2.cpp:26-332
Module	attention-gcc-skl512

The function is defined in:

/usr/include/stdlib.h:487
/usr/include/c++/16.1.1/bits/char_traits.h:355,396,432
/usr/include/c++/16.1.1/bits/allocator.h:189
/usr/include/c++/16.1.1/bits/stl_uninitialized.h:946
/usr/include/c++/16.1.1/bits/ostream.h:175,739
/usr/include/c++/16.1.1/bits/stl_construct.h:133
/usr/include/c++/16.1.1/bits/stl_algobase.h:923,1141,1147
/usr/include/c++/16.1.1/bits/basic_string.tcc:248
/usr/include/c++/16.1.1/bits/stl_vector.h:2205
/usr/include/c++/16.1.1/bits/random.h:585,2371,2377,2393
/home/eoseret/Applications/llm-attention/attention_v2.cpp:26-33,97-100,107-109,129-135,144,160-167,175-178,185,194,204,213,223-226,233-238,245,254,264,273-276,283,292,302-310,317,331-332
/usr/include/c++/16.1.1/bits/random.tcc:326-342,404-423,458-466,3519,3557-3558
/usr/include/c++/16.1.1/cmath:450
/usr/include/c++/16.1.1/bits/basic_string.h:204,233-238,279,304,920
/usr/include/c++/16.1.1/bits/new_allocator.h:162,183
/usr/include/c++/16.1.1/bits/chrono.h:218,631,720

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 87.75 to 15.75 cycles (5.57x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

11% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
9% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
17% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__isoc23_strtol@plt: 3 occurrences►
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
__stack_chk_fail@plt: 1 occurrences►
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:332
operator delete(void*, unsigned long): 12 occurrences►
operator new(unsigned long): 1 occurrences►
std::basic_ostream
>& std::__ostream_insert
>(std::basic_ostream
>&, char const*, long): 15 occurrences►
- /usr/include/c++/16.1.1/bits/ostream.h:739
std::basic_ostream
>& std::operator<<
>(std::basic_ostream
>&, char const*): 3 occurrences►
std::ostream& std::ostream::_M_insert
(long): 7 occurrences►
std::random_device::_M_fini(): 1 occurrences►
- /usr/include/c++/16.1.1/bits/random.h:2377

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
VZEROUPPER: 12 occurrences►
- /usr/include/c++/16.1.1/bits/new_allocator.h:162
- /usr/include/c++/16.1.1/bits/allocator.h:189
- /usr/include/c++/16.1.1/bits/random.h:2377

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 256 bytes. The binary function is storing 208 bytes.

General properties

nb instructions	271
nb uops	351
loop length	1337
used x86 registers	15
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	87.75 cycles
front end	87.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	27.50	27.25	37.50	37.17	72.00	27.25	60.00	37.33
cycles	27.50	29.25	37.50	37.17	72.00	27.25	60.00	37.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions

Cycles summary

Front-end	87.75
Dispatch	72.00
Overall L1	87.75

Vectorization ratios

all	11%
load	0%
store	9%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Vector efficiency ratios

all	12%
load	12%
store	15%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 87.75 cycles. At this rate:

2% of peak load performance is reached (2.92 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (2.37 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 87.75 to 72.00 cycles (1.22x speedup).

ASM code

In the binary file, the address of the function is: 1340

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
AND $-0x40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
PUSHQ -0x8(%R10)	2	0	0	0.83	0.83	1	0	0	0.33	3	1	N/A
PUSH %RBP	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.25	N/A
PUSH %R15	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R14	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R13	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R12	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R10	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %RBX	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
SUB $0x2900,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %FS:0x28,%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RBX,-0x38(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMP $0x3,%EDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b32 <main+0x17f2>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x8(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %EAX,-0x285c(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (6.3%)
MOV %RAX,-0x2800(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x18(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RAX,-0x27f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2800(%RBP),%R9	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %RAX,-0x28e0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
TEST %R9D,%R9D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b6f <main+0x182f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV -0x27f0(%RBP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
TEST %R8D,%R8D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b6f <main+0x182f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV -0x28e0(%RBP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
VMOVDQA %YMM0,-0x27b0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (50.0%)
VMOVDQU %YMM0,-0x2798(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (50.0%)
TEST %EDX,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JE 294d <main+0x160d>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R9D,%EBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R8D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVSXD %EDX,%RDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %RBX,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,-0x28e8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RAX,%R15	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %RDX,-0x28f8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R15,-0x28c8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x3d,%RDI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
MOV %RSI,-0x28d0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RCX,-0x28d8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
JNE 1313 <main.cold+0x1a3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
SAL $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
SAL $0x2,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
LEA (,%R15,4),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R8,-0x27f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SAL $0x2,%RBX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
SAL $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R9,-0x2800(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDI,-0x2838(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,-0x2868(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RCX,-0x2870(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RBX,-0x28a0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,-0x28f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1090 <_Znwm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
CMP $0x1,%R15	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
MOVQ $0,-0x28b0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV -0x27f0(%RBP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x2800(%RBP),%R9	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOVL $0,(%RAX)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JE 1503 <main+0x1c3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA -0x13c0(%RBP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZNSt13random_device7_M_finiEv@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28a0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x28c0(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2870(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2870(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x2878(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2838(%RBP),%R15	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2898(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2888(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28b8(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2868(%RBP),%R12	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2880(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28a8(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 2b68 <main+0x1828>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1825(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x375d(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27b0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x374a(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1811(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1802(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x371e(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27a8(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x370b(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17d2(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17d8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x36df(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27a0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x36cc(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1793(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x13,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17b0(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x36a0(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2798(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x368d(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1754(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1785(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3661(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2790(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x364e(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1715(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x11,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x175b(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3622(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2788(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x360f(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x16d6(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x17,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x172e(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x35e3(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2780(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x35d0(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1697(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
SUB %FS:0x28,%RDX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 2b84 <main+0x1844>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
ADD $0x2900,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
POP %RBX	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R10	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R12	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R13	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R14	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R15	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %RBP	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
LEA -0x8(%R10),%RSP	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
RET	1	0	0	0.33	0.33	0	0	1	0.33	0	1	N/A
MOV $0x7,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x15d2(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x369b(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV (%RBX),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x368c(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x15b8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x1,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JMP 2b0b <main+0x17cb>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
LEA 0x14da(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3663(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 2b68 <main+0x1828>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
CALL 10b0 <__stack_chk_fail@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 123b <main.cold+0xcb>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 1296 <main.cold+0x126>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1228 <main.cold+0xb8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1216 <main.cold+0xa6>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1203 <main.cold+0x93>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11f0 <main.cold+0x80>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 12fd <main.cold+0x18d>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11cb <main.cold+0x5b>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1270 <main.cold+0x100>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 125d <main.cold+0xed>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 124a <main.cold+0xda>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 1170 <main.cold>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11ae <main.cold+0x3e>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_0

Source file and lines	attention_v2.cpp:26-332
Module	attention-gcc-skl512

The function is defined in:

/usr/include/stdlib.h:487
/usr/include/c++/16.1.1/bits/char_traits.h:355,396,432
/usr/include/c++/16.1.1/bits/allocator.h:189
/usr/include/c++/16.1.1/bits/stl_uninitialized.h:946
/usr/include/c++/16.1.1/bits/ostream.h:175,739
/usr/include/c++/16.1.1/bits/stl_construct.h:133
/usr/include/c++/16.1.1/bits/stl_algobase.h:923,1141,1147
/usr/include/c++/16.1.1/bits/basic_string.tcc:248
/usr/include/c++/16.1.1/bits/stl_vector.h:2205
/usr/include/c++/16.1.1/bits/random.h:585,2371,2377,2393
/home/eoseret/Applications/llm-attention/attention_v2.cpp:26-33,97-100,107-109,129-135,144,160-167,175-178,185,194,204,213,223-226,233-238,245,254,264,273-276,283,292,302-310,317,331-332
/usr/include/c++/16.1.1/bits/random.tcc:326-342,404-423,458-466,3519,3557-3558
/usr/include/c++/16.1.1/cmath:450
/usr/include/c++/16.1.1/bits/basic_string.h:204,233-238,279,304,920
/usr/include/c++/16.1.1/bits/new_allocator.h:162,183
/usr/include/c++/16.1.1/bits/chrono.h:218,631,720

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 12% of vector register length is used (average across all SSE/AVX instructions).

Details

11% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

0% of SSE/AVX loads are used in vector version.
9% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
17% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

__isoc23_strtol@plt: 3 occurrences►
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
- /usr/include/stdlib.h:487
__stack_chk_fail@plt: 1 occurrences►
- /home/eoseret/Applications/llm-attention/attention_v2.cpp:332
operator delete(void*, unsigned long): 12 occurrences►
operator new(unsigned long): 1 occurrences►
std::basic_ostream
>& std::__ostream_insert
>(std::basic_ostream
>&, char const*, long): 15 occurrences►
- /usr/include/c++/16.1.1/bits/ostream.h:739
std::basic_ostream
>& std::operator<<
>(std::basic_ostream
>&, char const*): 3 occurrences►
std::ostream& std::ostream::_M_insert
(long): 7 occurrences►
std::random_device::_M_fini(): 1 occurrences►
- /usr/include/c++/16.1.1/bits/random.h:2377

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

PUSH: 1 occurrences►
VZEROUPPER: 12 occurrences►
- /usr/include/c++/16.1.1/bits/new_allocator.h:162
- /usr/include/c++/16.1.1/bits/allocator.h:189
- /usr/include/c++/16.1.1/bits/random.h:2377

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 256 bytes. The binary function is storing 208 bytes.

General properties

nb instructions	271
nb uops	351
loop length	1337
used x86 registers	15
used mmx registers	0
used xmm registers	1
used ymm registers	1
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	87.75 cycles
front end	87.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7
uops	27.50	27.25	37.50	37.17	72.00	27.25	60.00	37.33
cycles	27.50	29.25	37.50	37.17	72.00	27.25	60.00	37.33

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): store address, load
P3 (512 bits): store address, load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address

Cycles executing div or sqrt instructions

Cycles summary

Front-end	87.75
Dispatch	72.00
Overall L1	87.75

Vectorization ratios

all	11%
load	0%
store	9%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Vector efficiency ratios

all	12%
load	12%
store	15%
mul	12%
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 87.75 cycles. At this rate:

2% of peak load performance is reached (2.92 out of 128.00 bytes loaded per cycle (GB/s @ 1GHz))
3% of peak store performance is reached (2.37 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 1340

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	Latency	Recip. throughput	Vectorization
LEA 0x8(%RSP),%R10	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
AND $-0x40,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
PUSHQ -0x8(%R10)	2	0	0	0.83	0.83	1	0	0	0.33	3	1	N/A
PUSH %RBP	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0.25	N/A
PUSH %R15	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R14	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R13	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R12	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %R10	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
PUSH %RBX	1	0	0	0.33	0.33	1	0	0	0.33	3	1	N/A
SUB $0x2900,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
MOV %FS:0x28,%RBX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %RBX,-0x38(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
CMP $0x3,%EDI	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b32 <main+0x17f2>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV 0x8(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %EAX,-0x285c(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (6.3%)
MOV %RAX,-0x2800(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV 0x18(%RBX),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV $0xa,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RAX,-0x27f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
CALL 1160 <__isoc23_strtol@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2800(%RBP),%R9	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %RAX,-0x28e0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
TEST %R9D,%R9D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b6f <main+0x182f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV -0x27f0(%RBP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
TEST %R8D,%R8D	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JLE 2b6f <main+0x182f>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV -0x28e0(%RBP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
VMOVDQA %YMM0,-0x27b0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (50.0%)
VMOVDQU %YMM0,-0x2798(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	4	1	vect (50.0%)
TEST %EDX,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
JE 294d <main+0x160d>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
MOV %R9D,%EBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %R8D,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVSXD %EDX,%RDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
MOV %RBX,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %RAX,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,%RCX	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,-0x28e8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RAX,%R15	1	0	1	0	0	0	0	0	0	3	1	N/A
MOV %RDX,-0x28f8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	3	1	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R15,-0x28c8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SHR $0x3d,%RDI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
MOV %RSI,-0x28d0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RCX,-0x28d8(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
JNE 1313 <main.cold+0x1a3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
SAL $0x2,%RSI	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
SAL $0x2,%RCX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	scal (12.5%)
LEA (,%R15,4),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %R8,-0x27f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
SAL $0x2,%RBX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
SAL $0x2,%RAX	1	0.50	0	0	0	0	0	0.50	0	1	0.50	N/A
MOV %R9,-0x2800(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RDI,-0x2838(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RSI,-0x2868(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RCX,-0x2870(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RBX,-0x28a0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
MOV %RAX,-0x28f0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	3	1	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 1090 <_Znwm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
CMP $0x1,%R15	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (12.5%)
MOVQ $0,-0x28b0(%RBP)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV -0x27f0(%RBP),%R8	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x2800(%RBP),%R9	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOVL $0,(%RAX)	1	0	0	0.33	0.33	1	0	0	0.33	2	1	scal (6.3%)
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
JE 1503 <main+0x1c3>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
LEA -0x13c0(%RBP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1060 <_ZNSt13random_device7_M_finiEv@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28a0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x28c0(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2870(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2870(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV -0x2878(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2838(%RBP),%R15	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	N/A
MOV %R13,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2898(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2888(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R12,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28b8(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2868(%RBP),%R12	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R14,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2880(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x28a8(%RBP),%RDI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %R15,%RSI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
MOV %RBX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10a0 <_ZdlPvm@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 2b68 <main+0x1828>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1825(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x375d(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27b0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x374a(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1811(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1802(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x371e(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27a8(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x370b(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17d2(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x16,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17d8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x36df(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x27a0(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x36cc(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1793(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x13,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x17b0(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x36a0(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2798(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x368d(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1754(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x14,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1785(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3661(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2790(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x364e(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1715(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x11,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x175b(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3622(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2788(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x360f(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x16d6(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x17,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x172e(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x35e3(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV -0x2780(%RBP),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x35d0(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1070 <_ZNSo9_M_insertIlEERSoT_@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x4,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x1697(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV -0x38(%RBP),%RDX	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
SUB %FS:0x28,%RDX	1	0.25	0.25	0.50	0.50	0	0.25	0.25	0	1	0.50	scal (12.5%)
JNE 2b84 <main+0x1844>	1	0.50	0	0	0	0	0	0.50	0	0	0.50-1	N/A
ADD $0x2900,%RSP	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
POP %RBX	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R10	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R12	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R13	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R14	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %R15	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
POP %RBP	1	0	0	0.50	0.50	0	0	0	0	2	0.50	N/A
LEA -0x8(%R10),%RSP	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
RET	1	0	0	0.33	0.33	0	0	1	0.33	0	1	N/A
MOV $0x7,%EDX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	scal (6.3%)
LEA 0x15d2(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x369b(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 10c0 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV (%RBX),%RSI	1	0	0	0.50	0.50	0	0	0	0	4-5	0.50	scal (12.5%)
LEA 0x368c(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
LEA 0x15b8(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV $0x1,%EAX	1	0.25	0.25	0	0	0	0.25	0.25	0	1	0.25	N/A
JMP 2b0b <main+0x17cb>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
LEA 0x14da(%RIP),%RSI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
LEA 0x3663(%RIP),%RDI	1	0	0.50	0	0	0	0.50	0	0	1	0.50	N/A
CALL 1080 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
JMP 2b68 <main+0x1828>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
CALL 10b0 <__stack_chk_fail@plt>	2	0	0	0.33	0.33	1	0	1	0.33	0	1	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 123b <main.cold+0xcb>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 1296 <main.cold+0x126>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1228 <main.cold+0xb8>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1216 <main.cold+0xa6>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1203 <main.cold+0x93>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11f0 <main.cold+0x80>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 12fd <main.cold+0x18d>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0.25	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11cb <main.cold+0x5b>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 1270 <main.cold+0x100>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 125d <main.cold+0xed>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0.25	scal (12.5%)
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 124a <main.cold+0xda>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
JMP 1170 <main.cold>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
VZEROUPPER	4	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
JMP 11ae <main.cold+0x3e>	1	0	0	0	0	0	0	1	0	0	1-2	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0.25	N/A

Name	Coverage (%)	Time (s)
▼main–	88.68	24.55
▼Loop 21 - stl_algobase.h:923-1147 - attention-gcc-skl512–	0.00	0.00
▼Loop 22 - stl_algobase.h:923-1147 - attention-gcc-skl512–	0.00	0.00
○Loop 2 - random.tcc:458-3558 - attention-gcc-skl512	1.30	0.36
▼Loop 3 - random.tcc:404-3558 - attention-gcc-skl512–	0.29	0.08
○Loop 26 - random.tcc:458-3558 - attention-gcc-skl512	0.14	0.04
▼Loop 23 - random.tcc:404-3558 - attention-gcc-skl512–	0.09	0.03
○Loop 25 - random.tcc:412-417 - attention-gcc-skl512	0.07	0.02
○Loop 24 - random.tcc:404-409 - attention-gcc-skl512	0.02	0.01
○Loop 1 - random.tcc:333-339 - attention-gcc-skl512	0.02	0.01
▼Loop 20 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.02	0.01
▼Loop 19 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.40	0.11
○Loop 18 - attention_v2.cpp:30-31 - attention-gcc-skl512	34.01	9.41
▼Loop 9 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.00	0.00
▼Loop 8 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.49	0.13
○Loop 7 - attention_v2.cpp:30-31 - attention-gcc-skl512	6.74	1.87
▼Loop 6 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.00	0.00
▼Loop 5 - attention_v2.cpp:27-33 - attention-gcc-skl512–	0.52	0.14
○Loop 4 - attention_v2.cpp:30-31 - attention-gcc-skl512	6.95	1.92
▼Loop 12 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.00	0.00
▼Loop 11 - attention_v2.cpp:26-33 - attention-gcc-skl512–	0.51	0.14
○Loop 10 - attention_v2.cpp:30-31 - attention-gcc-skl512	7.68	2.13
▼Loop 14 - attention_v2.cpp:26-238 - attention-gcc-skl512–	0.00	0.00
○Loop 13 - attention_v2.cpp:237-238 - attention-gcc-skl512	0.14	0.04
▼Loop 17 - attention_v2.cpp:26-236 - attention-gcc-skl512–	0.00	0.00
▼Loop 16 - attention_v2.cpp:27-236 - attention-gcc-skl512–	2.40	0.66
○Loop 15 - attention_v2.cpp:30-31 - attention-gcc-skl512	26.89	7.44

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512-bits vectorization

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Matching between your function (in the source code) and the binary function

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ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

512-bits vectorization

Workaround

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code