| Loop Id: 55 | Module: attention-avx512 | Source: attention.cpp:27-33 | Coverage: 0.42% |
|---|
| Loop Id: 55 | Module: attention-avx512 | Source: attention.cpp:27-33 | Coverage: 0.42% |
|---|
0x406780 VMOVDQU64 0x180(%RSP),%ZMM24 |
0x406788 VPMOVSXBD 0x9ce7(%RIP),%YMM4 |
0x406791 VCVTSD2SS %XMM22,%XMM22,%XMM0 |
0x406797 LEA (%RCX,%RDI,1),%ESI |
0x40679a VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067a0 VCVTSD2SS %XMM21,%XMM21,%XMM0 |
0x4067a6 LEA 0x1(%RCX,%RDI,1),%ESI |
0x4067aa VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067b0 VCVTSD2SS %XMM20,%XMM20,%XMM0 |
0x4067b6 LEA 0x2(%RCX,%RDI,1),%ESI |
0x4067ba VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067c0 VCVTSD2SS %XMM19,%XMM19,%XMM0 |
0x4067c6 LEA 0x3(%RCX,%RDI,1),%ESI |
0x4067ca VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067d0 VCVTSD2SS %XMM18,%XMM18,%XMM0 |
0x4067d6 LEA 0x4(%RCX,%RDI,1),%ESI |
0x4067da VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067e0 VCVTSD2SS %XMM17,%XMM17,%XMM0 |
0x4067e6 LEA 0x5(%RCX,%RDI,1),%ESI |
0x4067ea VMOVSS %XMM0,(%R14,%RSI,4) |
0x4067f0 VCVTSD2SS %XMM16,%XMM16,%XMM0 |
0x4067f6 LEA 0x6(%RCX,%RDI,1),%ESI |
0x4067fa VMOVSS %XMM0,(%R14,%RSI,4) |
0x406800 VCVTSD2SS %XMM23,%XMM23,%XMM0 |
0x406806 LEA 0x7(%RCX,%RDI,1),%ESI |
0x40680a VMOVSS %XMM0,(%R14,%RSI,4) |
0x406810 ADD $0x8,%EDX |
0x406813 CMP 0x1c0(%RSP),%RAX |
0x40681b LEA 0x1(%RAX),%RAX |
0x40681f JE 406569 |
0x406825 LEA (,%RAX,8),%EDI |
0x40682c TEST %R8,%R8 |
0x40682f JE 406b80 |
0x406835 VPBROADCASTD %EDI,%YMM22 |
0x40683b VXORPD %XMM15,%XMM15,%XMM15 |
0x406840 VXORPD %XMM16,%XMM16,%XMM16 |
0x406846 VXORPD %XMM17,%XMM17,%XMM17 |
0x40684c VXORPD %XMM18,%XMM18,%XMM18 |
0x406852 VXORPD %XMM19,%XMM19,%XMM19 |
0x406858 VXORPD %XMM20,%XMM20,%XMM20 |
0x40685e VXORPD %XMM21,%XMM21,%XMM21 |
0x406864 VXORPS %XMM23,%XMM23,%XMM23 |
0x40686a XOR %ESI,%ESI |
0x40686c NOPL (%RAX) |
(56) 0x406870 LEA (%R11,%RSI,1),%EBX |
(56) 0x406874 VPBROADCASTD %EBX,%YMM24 |
(56) 0x40687a VPADDD %YMM3,%YMM24,%YMM24 |
(56) 0x406880 VXORPS %XMM25,%XMM25,%XMM25 |
(56) 0x406886 KXNORW %K0,%K0,%K1 |
(56) 0x40688a VGATHERDPS (%R9,%YMM24,4),%YMM25{%K1} |
(56) 0x406891 VPBROADCASTD %ESI,%YMM24 |
(56) 0x406897 VPADDD %YMM1,%YMM24,%YMM24 |
(56) 0x40689d VPMULLD %YMM24,%YMM26,%YMM24 |
(56) 0x4068a3 VPADDD %YMM22,%YMM24,%YMM24 |
(56) 0x4068a9 VPSUBD %YMM2,%YMM24,%YMM26 |
(56) 0x4068af VMOVAPS %YMM27,%YMM4 |
(56) 0x4068b5 VXORPS %XMM27,%XMM27,%XMM27 |
(56) 0x4068bb KXNORW %K0,%K0,%K1 |
(56) 0x4068bf VGATHERDPS (%R10,%YMM26,4),%YMM27{%K1} |
(56) 0x4068c6 VPADDD %YMM10,%YMM24,%YMM26 |
(56) 0x4068cc VXORPS %XMM28,%XMM28,%XMM28 |
(56) 0x4068d2 KXNORW %K0,%K0,%K1 |
(56) 0x4068d6 VGATHERDPS (%R10,%YMM26,4),%YMM28{%K1} |
(56) 0x4068dd VPADDD %YMM9,%YMM24,%YMM26 |
(56) 0x4068e3 VXORPS %XMM29,%XMM29,%XMM29 |
(56) 0x4068e9 KXNORW %K0,%K0,%K1 |
(56) 0x4068ed VGATHERDPS (%R10,%YMM26,4),%YMM29{%K1} |
(56) 0x4068f4 VPADDD %YMM30,%YMM24,%YMM26 |
(56) 0x4068fa VMOVDQA64 %YMM30,%YMM11 |
(56) 0x406900 VPXORD %XMM30,%XMM30,%XMM30 |
(56) 0x406906 KXNORW %K0,%K0,%K1 |
(56) 0x40690a VGATHERDPS (%R10,%YMM26,4),%YMM30{%K1} |
(56) 0x406911 VPADDD %YMM31,%YMM24,%YMM26 |
(56) 0x406917 VMOVDQA64 %YMM31,%YMM12 |
(56) 0x40691d VPXORD %XMM31,%XMM31,%XMM31 |
(56) 0x406923 KXNORW %K0,%K0,%K1 |
(56) 0x406927 VGATHERDPS (%R10,%YMM26,4),%YMM31{%K1} |
(56) 0x40692e VPADDD %YMM13,%YMM24,%YMM26 |
(56) 0x406934 VXORPS %XMM0,%XMM0,%XMM0 |
(56) 0x406938 KXNORW %K0,%K0,%K1 |
(56) 0x40693c VGATHERDPS (%R10,%YMM26,4),%YMM0{%K1} |
(56) 0x406943 VPADDD %YMM14,%YMM24,%YMM26 |
(56) 0x406949 VPXOR %XMM8,%XMM8,%XMM8 |
(56) 0x40694e KXNORW %K0,%K0,%K1 |
(56) 0x406952 VGATHERDPS (%R10,%YMM26,4),%YMM8{%K1} |
(56) 0x406959 VCVTPS2PD %YMM25,%ZMM25 |
(56) 0x40695f VCVTPS2PD %YMM27,%ZMM26 |
(56) 0x406965 VCVTPS2PD %YMM28,%ZMM27 |
(56) 0x40696b VFMADD231PD %ZMM26,%ZMM25,%ZMM23 |
(56) 0x406971 VFMADD231PD %ZMM27,%ZMM25,%ZMM21 |
(56) 0x406977 VCVTPS2PD %YMM29,%ZMM26 |
(56) 0x40697d VCVTPS2PD %YMM30,%ZMM27 |
(56) 0x406983 VMOVDQA64 %YMM11,%YMM30 |
(56) 0x406989 VFMADD231PD %ZMM26,%ZMM25,%ZMM20 |
(56) 0x40698f VFMADD231PD %ZMM27,%ZMM25,%ZMM19 |
(56) 0x406995 VMOVAPS %YMM4,%YMM27 |
(56) 0x40699b VCVTPS2PD %YMM31,%ZMM26 |
(56) 0x4069a1 VMOVDQA64 %YMM12,%YMM31 |
(56) 0x4069a7 VCVTPS2PD %YMM0,%ZMM0 |
(56) 0x4069ad VFMADD231PD %ZMM26,%ZMM25,%ZMM18 |
(56) 0x4069b3 VMOVDQU64 0x120(%RSP),%YMM26 |
(56) 0x4069bb VFMADD231PD %ZMM0,%ZMM25,%ZMM17 |
(56) 0x4069c1 VCVTPS2PD %YMM8,%ZMM0 |
(56) 0x4069c7 VPADDD %YMM4,%YMM24,%YMM8 |
(56) 0x4069cd VPXORD %XMM24,%XMM24,%XMM24 |
(56) 0x4069d3 KXNORW %K0,%K0,%K1 |
(56) 0x4069d7 VGATHERDPS (%R10,%YMM8,4),%YMM24{%K1} |
(56) 0x4069de VFMADD231PD %ZMM0,%ZMM25,%ZMM16 |
(56) 0x4069e4 VCVTPS2PD %YMM24,%ZMM0 |
(56) 0x4069ea VFMADD231PD %ZMM0,%ZMM25,%ZMM15 |
(56) 0x4069f0 ADD $0x8,%RSI |
(56) 0x4069f4 CMP %R8,%RSI |
(56) 0x4069f7 JB 406870 |
0x4069fd VEXTRACTF64X4 $0x1,%ZMM23,%YMM0 |
0x406a04 VADDPD %ZMM0,%ZMM23,%ZMM0 |
0x406a0a VMOVAPD %XMM0,%XMM8 |
0x406a0e VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406a14 VADDPD %XMM0,%XMM8,%XMM0 |
0x406a18 VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406a1d VADDSD %XMM8,%XMM0,%XMM22 |
0x406a23 VEXTRACTF64X4 $0x1,%ZMM21,%YMM0 |
0x406a2a VADDPD %ZMM0,%ZMM21,%ZMM0 |
0x406a30 VMOVAPD %XMM0,%XMM8 |
0x406a34 VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406a3a VADDPD %XMM0,%XMM8,%XMM0 |
0x406a3e VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406a43 VADDSD %XMM8,%XMM0,%XMM21 |
0x406a49 VEXTRACTF64X4 $0x1,%ZMM20,%YMM0 |
0x406a50 VADDPD %ZMM0,%ZMM20,%ZMM0 |
0x406a56 VMOVAPD %XMM0,%XMM8 |
0x406a5a VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406a60 VADDPD %XMM0,%XMM8,%XMM0 |
0x406a64 VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406a69 VADDSD %XMM8,%XMM0,%XMM20 |
0x406a6f VEXTRACTF64X4 $0x1,%ZMM19,%YMM0 |
0x406a76 VADDPD %ZMM0,%ZMM19,%ZMM0 |
0x406a7c VMOVAPD %XMM0,%XMM8 |
0x406a80 VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406a86 VADDPD %XMM0,%XMM8,%XMM0 |
0x406a8a VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406a8f VADDSD %XMM8,%XMM0,%XMM19 |
0x406a95 VEXTRACTF64X4 $0x1,%ZMM18,%YMM0 |
0x406a9c VADDPD %ZMM0,%ZMM18,%ZMM0 |
0x406aa2 VMOVAPD %XMM0,%XMM8 |
0x406aa6 VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406aac VADDPD %XMM0,%XMM8,%XMM0 |
0x406ab0 VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406ab5 VADDSD %XMM8,%XMM0,%XMM18 |
0x406abb VEXTRACTF64X4 $0x1,%ZMM17,%YMM0 |
0x406ac2 VADDPD %ZMM0,%ZMM17,%ZMM0 |
0x406ac8 VMOVAPD %XMM0,%XMM8 |
0x406acc VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406ad2 VADDPD %XMM0,%XMM8,%XMM0 |
0x406ad6 VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406adb VADDSD %XMM8,%XMM0,%XMM17 |
0x406ae1 VEXTRACTF64X4 $0x1,%ZMM16,%YMM0 |
0x406ae8 VADDPD %ZMM0,%ZMM16,%ZMM0 |
0x406aee VMOVAPD %XMM0,%XMM8 |
0x406af2 VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406af8 VADDPD %XMM0,%XMM8,%XMM0 |
0x406afc VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406b01 VADDSD %XMM8,%XMM0,%XMM16 |
0x406b07 VEXTRACTF64X4 $0x1,%ZMM15,%YMM0 |
0x406b0e VADDPD %ZMM0,%ZMM15,%ZMM0 |
0x406b14 VMOVAPD %XMM0,%XMM8 |
0x406b18 VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x406b1e VADDPD %XMM0,%XMM8,%XMM0 |
0x406b22 VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 |
0x406b27 VADDSD %XMM8,%XMM0,%XMM23 |
0x406b2d CMP %R8D,%R15D |
0x406b30 JE 406780 |
0x406b36 VPUNPCKLQDQ %XMM23,%XMM16,%XMM0 |
0x406b3c VPUNPCKLQDQ %XMM17,%XMM18,%XMM8 |
0x406b42 VINSERTF128 $0x1,%XMM0,%YMM8,%YMM0 |
0x406b48 VPUNPCKLQDQ %XMM19,%XMM20,%XMM8 |
0x406b4e VPUNPCKLQDQ %XMM21,%XMM22,%XMM15 |
0x406b54 VINSERTF128 $0x1,%XMM8,%YMM15,%YMM8 |
0x406b5a VINSERTF64X4 $0x1,%YMM0,%ZMM8,%ZMM15 |
0x406b61 MOV %R8,%RSI |
0x406b64 VMOVDQU64 0x180(%RSP),%ZMM24 |
0x406b6c VPMOVSXBD 0x9903(%RIP),%YMM4 |
0x406b75 JMP 406b87 |
0x406b80 VXORPD %XMM15,%XMM15,%XMM15 |
0x406b85 XOR %ESI,%ESI |
0x406b87 MOV 0x40(%RSP),%R15 |
0x406b8c MOV %R15D,%EBX |
0x406b8f IMUL %ESI,%EBX |
0x406b92 MOV %RDX,0x30(%RSP) |
0x406b97 ADD %EDX,%EBX |
0x406b99 MOV 0x88(%RSP),%RDX |
0x406ba1 NOPW %CS:(%RAX,%RAX,1) |
(50) 0x406bb0 LEA (%R11,%RSI,1),%R14D |
(50) 0x406bb4 VMOVSS (%R12,%R14,4),%XMM0 |
(50) 0x406bba VCVTSS2SD %XMM0,%XMM0,%XMM0 |
(50) 0x406bbe LEA 0x5(%RBX),%R14D |
(50) 0x406bc2 VPBROADCASTD %EBX,%XMM8 |
(50) 0x406bc8 VPADDD %YMM4,%YMM8,%YMM9 |
(50) 0x406bcc VPERMT2D %YMM8,%YMM5,%YMM9 |
(50) 0x406bd2 VPBROADCASTD %R14D,%YMM10 |
(50) 0x406bd8 VPBLENDD $0x20,%YMM10,%YMM9,%YMM9 |
(50) 0x406bde VPADDD %YMM6,%YMM8,%YMM8 |
(50) 0x406be2 VPERMT2Q %YMM8,%YMM7,%YMM9 |
(50) 0x406be8 VPSUBD %YMM2,%YMM9,%YMM8 |
(50) 0x406bec VPXOR %XMM9,%XMM9,%XMM9 |
(50) 0x406bf1 KXNORW %K0,%K0,%K1 |
(50) 0x406bf5 VGATHERDPS (%R10,%YMM8,4),%YMM9{%K1} |
(50) 0x406bfc VCVTPS2PD %YMM9,%ZMM8 |
(50) 0x406c02 VBROADCASTSD %XMM0,%ZMM0 |
(50) 0x406c08 VFMADD231PD %ZMM0,%ZMM8,%ZMM15 |
(50) 0x406c0e INC %RSI |
(50) 0x406c11 ADD %R15D,%EBX |
(50) 0x406c14 CMP %RSI,%RDX |
(50) 0x406c17 JNE 406bb0 |
0x406c19 VEXTRACTF32X4 $0x3,%ZMM15,%XMM16 |
0x406c20 VSHUFPD $0x1,%XMM16,%XMM16,%XMM23 |
0x406c27 VEXTRACTF32X4 $0x2,%ZMM15,%XMM18 |
0x406c2e VSHUFPD $0x1,%XMM18,%XMM18,%XMM17 |
0x406c35 VMOVAPD %YMM15,%YMM0 |
0x406c39 VEXTRACTF32X4 $0x1,%YMM15,%XMM20 |
0x406c40 VSHUFPD $0x1,%XMM20,%XMM20,%XMM19 |
0x406c47 VSHUFPD $0x1,%XMM0,%XMM0,%XMM21 |
0x406c4e VMOVAPD %XMM15,%XMM22 |
0x406c54 MOV 0xd0(%RSP),%R14 |
0x406c5c MOV %RDX,%R15 |
0x406c5f VPBROADCASTD 0x977c(%RIP),%YMM10 |
0x406c68 VPBROADCASTD 0x9777(%RIP),%YMM9 |
0x406c71 MOV 0x30(%RSP),%RDX |
0x406c76 JMP 406791 |
/home/eoseret/llm-attention/attention.cpp: 27 - 33 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.06 |
| CQA speedup if FP arith vectorized | 1.10 |
| CQA speedup if fully vectorized | 3.18 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.22 |
| Bottlenecks | |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 25.50 |
| CQA cycles if no scalar integer | 24.17 |
| CQA cycles if FP arith vectorized | 23.17 |
| CQA cycles if fully vectorized | 8.01 |
| Front-end cycles | 17.50 |
| P0 cycles | 13.17 |
| P1 cycles | 25.50 |
| P2 cycles | 2.11 |
| P3 cycles | 2.11 |
| P4 cycles | 4.33 |
| P5 cycles | 25.33 |
| P6 cycles | 4.33 |
| P7 cycles | 4.33 |
| P8 cycles | 4.33 |
| P9 cycles | 4.33 |
| P10 cycles | 4.33 |
| P11 cycles | 2.11 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 96.67 |
| Nb uops | 105.00 |
| Nb loads | 6.33 |
| Nb stores | 8.67 |
| Nb stack references | 4.33 |
| FLOP/cycle | 2.30 |
| Nb FLOP add-sub | 58.67 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 5.32 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 82.67 |
| Bytes stored | 37.33 |
| Stride 0 | 0.67 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.67 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 54.39 |
| Vectorization ratio load | 33.33 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 65.33 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 65.05 |
| Vector-efficiency ratio all | 24.63 |
| Vector-efficiency ratio load | 25.35 |
| Vector-efficiency ratio store | 6.71 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 45.04 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 23.14 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.05 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 6.57 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.10 |
| Bottlenecks | P1, P5, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 11.50 |
| CQA cycles if no scalar integer | 11.00 |
| CQA cycles if FP arith vectorized | 11.50 |
| CQA cycles if fully vectorized | 1.75 |
| Front-end cycles | 10.50 |
| P0 cycles | 8.00 |
| P1 cycles | 11.50 |
| P2 cycles | 2.33 |
| P3 cycles | 2.33 |
| P4 cycles | 4.50 |
| P5 cycles | 11.50 |
| P6 cycles | 4.00 |
| P7 cycles | 4.50 |
| P8 cycles | 4.50 |
| P9 cycles | 4.50 |
| P10 cycles | 4.00 |
| P11 cycles | 2.33 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 55.00 |
| Nb uops | 63.00 |
| Nb loads | 7.00 |
| Nb stores | 9.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 7.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 48.00 |
| Bytes stored | 40.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 30.30 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 43.48 |
| Vector-efficiency ratio all | 15.15 |
| Vector-efficiency ratio load | 9.38 |
| Vector-efficiency ratio store | 6.94 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 18.48 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.04 |
| CQA speedup if FP arith vectorized | 1.13 |
| CQA speedup if fully vectorized | 2.86 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.52 |
| Bottlenecks | P1, P5, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 36.00 |
| CQA cycles if no scalar integer | 34.50 |
| CQA cycles if FP arith vectorized | 32.00 |
| CQA cycles if fully vectorized | 12.57 |
| Front-end cycles | 23.67 |
| P0 cycles | 16.00 |
| P1 cycles | 36.00 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 4.50 |
| P5 cycles | 36.00 |
| P6 cycles | 5.00 |
| P7 cycles | 4.50 |
| P8 cycles | 4.50 |
| P9 cycles | 4.50 |
| P10 cycles | 5.00 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 133.00 |
| Nb uops | 142.00 |
| Nb loads | 9.00 |
| Nb stores | 9.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 2.44 |
| Nb FLOP add-sub | 88.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 4.44 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 120.00 |
| Bytes stored | 40.00 |
| Stride 0 | 1.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 3.00 |
| Vectorization ratio all | 65.42 |
| Vectorization ratio load | 33.33 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 66.67 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 73.24 |
| Vector-efficiency ratio all | 28.50 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | 6.94 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 45.83 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 24.82 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.12 |
| CQA speedup if fully vectorized | 2.99 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P1, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 29.00 |
| CQA cycles if no scalar integer | 27.00 |
| CQA cycles if FP arith vectorized | 26.00 |
| CQA cycles if fully vectorized | 9.71 |
| Front-end cycles | 18.33 |
| P0 cycles | 15.50 |
| P1 cycles | 29.00 |
| P2 cycles | 1.00 |
| P3 cycles | 1.00 |
| P4 cycles | 4.00 |
| P5 cycles | 28.50 |
| P6 cycles | 4.00 |
| P7 cycles | 4.00 |
| P8 cycles | 4.00 |
| P9 cycles | 4.00 |
| P10 cycles | 4.00 |
| P11 cycles | 1.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 102.00 |
| Nb uops | 110.00 |
| Nb loads | 3.00 |
| Nb stores | 8.00 |
| Nb stack references | 2.00 |
| FLOP/cycle | 3.03 |
| Nb FLOP add-sub | 88.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 3.86 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 80.00 |
| Bytes stored | 32.00 |
| Stride 0 | 1.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 67.44 |
| Vectorization ratio load | 66.67 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 64.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 78.43 |
| Vector-efficiency ratio all | 30.23 |
| Vector-efficiency ratio load | 41.67 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 44.25 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 26.10 |
| Path / |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 96.67 |
| nb uops | 105 |
| loop length | 534.33 |
| used x86 registers | 9.67 |
| used mmx registers | 0 |
| used xmm registers | 10.67 |
| used ymm registers | 4.67 |
| used zmm registers | 7.33 |
| nb stack references | 4.33 |
| micro-operation queue | 17.50 cycles |
| front end | 17.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 13.17 | 25.50 | 2.11 | 2.11 | 4.33 | 25.33 | 4.33 | 4.33 | 4.33 | 4.33 | 4.33 | 2.11 |
| cycles | 13.17 | 25.50 | 2.11 | 2.11 | 4.33 | 25.33 | 4.33 | 4.33 | 4.33 | 4.33 | 4.33 | 2.11 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 17.50 |
| Dispatch | 25.50 |
| Data deps. | 0.00 |
| Overall L1 | 25.50 |
| all | 15% |
| load | 33% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 60% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 75% |
| all | 54% |
| load | 33% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 65% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 65% |
| all | 17% |
| load | 25% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 25% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 24% |
| load | 25% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 23% |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 55 |
| nb uops | 63 |
| loop length | 310 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 10 |
| used ymm registers | 4 |
| used zmm registers | 1 |
| nb stack references | 5 |
| micro-operation queue | 10.50 cycles |
| front end | 10.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 8.00 | 11.50 | 2.33 | 2.33 | 4.50 | 11.50 | 4.00 | 4.50 | 4.50 | 4.50 | 4.00 | 2.33 |
| cycles | 8.00 | 11.50 | 2.33 | 2.33 | 4.50 | 11.50 | 4.00 | 4.50 | 4.50 | 4.50 | 4.00 | 2.33 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 10.50 |
| Dispatch | 11.50 |
| Data deps. | 0.00 |
| Overall L1 | 11.50 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 38% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 55% |
| all | 30% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 43% |
| all | 10% |
| load | 9% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 16% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 20% |
| all | 15% |
| load | 9% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 18% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM22,%XMM22,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RCX,%RDI,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM21,%XMM21,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x1(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM20,%XMM20,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x2(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM19,%XMM19,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x3(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM18,%XMM18,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x4(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM17,%XMM17,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x5(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM16,%XMM16,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x6(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM23,%XMM23,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x7(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| ADD $0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP 0x1c0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406569 <main+0x1be9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA (,%RAX,8),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406b80 <main+0x2200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VXORPD %XMM15,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x40(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %R15D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %ESI,%EBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VEXTRACTF32X4 $0x3,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM16,%XMM16,%XMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VEXTRACTF32X4 $0x2,%ZMM15,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM18,%XMM18,%XMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VMOVAPD %YMM15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (50.0%) |
| VEXTRACTF32X4 $0x1,%YMM15,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM20,%XMM20,%XMM19 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM21 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VMOVAPD %XMM15,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| MOV 0xd0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| VPBROADCASTD 0x977c(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VPBROADCASTD 0x9777(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 406791 <main+0x1e11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 133 |
| nb uops | 142 |
| loop length | 740 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 11 |
| used ymm registers | 7 |
| used zmm registers | 11 |
| nb stack references | 6 |
| micro-operation queue | 23.67 cycles |
| front end | 23.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 16.00 | 36.00 | 3.00 | 3.00 | 4.50 | 36.00 | 5.00 | 4.50 | 4.50 | 4.50 | 5.00 | 3.00 |
| cycles | 16.00 | 36.00 | 3.00 | 3.00 | 4.50 | 36.00 | 5.00 | 4.50 | 4.50 | 4.50 | 5.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 23.67 |
| Dispatch | 36.00 |
| Data deps. | 0.00 |
| Overall L1 | 36.00 |
| all | 13% |
| load | 33% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 73% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 86% |
| all | 65% |
| load | 33% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 73% |
| all | 16% |
| load | 25% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 30% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 27% |
| all | 28% |
| load | 25% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 24% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM22,%XMM22,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RCX,%RDI,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM21,%XMM21,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x1(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM20,%XMM20,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x2(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM19,%XMM19,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x3(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM18,%XMM18,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x4(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM17,%XMM17,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x5(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM16,%XMM16,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x6(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM23,%XMM23,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x7(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| ADD $0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP 0x1c0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406569 <main+0x1be9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA (,%RAX,8),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406b80 <main+0x2200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPBROADCASTD %EDI,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VXORPD %XMM15,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM18,%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM19,%XMM19,%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM20,%XMM20,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPS %XMM23,%XMM23,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VEXTRACTF64X4 $0x1,%ZMM23,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM23,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM22 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM21,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM21,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM21 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM20,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM20,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM20 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM19,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM19,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM19 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM18,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM17,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM17,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM16,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM16,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM16 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM15,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| CMP %R8D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (6.3%) |
| JE 406780 <main+0x1e00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPUNPCKLQDQ %XMM23,%XMM16,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPUNPCKLQDQ %XMM17,%XMM18,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VINSERTF128 $0x1,%XMM0,%YMM8,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPUNPCKLQDQ %XMM19,%XMM20,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VPUNPCKLQDQ %XMM21,%XMM22,%XMM15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VINSERTF128 $0x1,%XMM8,%YMM15,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VINSERTF64X4 $0x1,%YMM0,%ZMM8,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVDQU64 0x180(%RSP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VPMOVSXBD 0x9903(%RIP),%YMM4 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| JMP 406b87 <main+0x2207> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV 0x40(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %R15D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %ESI,%EBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VEXTRACTF32X4 $0x3,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM16,%XMM16,%XMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VEXTRACTF32X4 $0x2,%ZMM15,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM18,%XMM18,%XMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VMOVAPD %YMM15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (50.0%) |
| VEXTRACTF32X4 $0x1,%YMM15,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VSHUFPD $0x1,%XMM20,%XMM20,%XMM19 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM21 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VMOVAPD %XMM15,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| MOV 0xd0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| VPBROADCASTD 0x977c(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VPBROADCASTD 0x9777(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 406791 <main+0x1e11> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 102 |
| nb uops | 110 |
| loop length | 553 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 11 |
| used ymm registers | 3 |
| used zmm registers | 10 |
| nb stack references | 2 |
| micro-operation queue | 18.33 cycles |
| front end | 18.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 15.50 | 29.00 | 1.00 | 1.00 | 4.00 | 28.50 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 1.00 |
| cycles | 15.50 | 29.00 | 1.00 | 1.00 | 4.00 | 28.50 | 4.00 | 4.00 | 4.00 | 4.00 | 4.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 18.33 |
| Dispatch | 29.00 |
| Data deps. | 0.00 |
| Overall L1 | 29.00 |
| all | 33% |
| load | 66% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 70% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 83% |
| all | 67% |
| load | 66% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 64% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 78% |
| all | 25% |
| load | 41% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 10% |
| all | 30% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 27% |
| all | 30% |
| load | 41% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 44% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 26% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVDQU64 0x180(%RSP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VPMOVSXBD 0x9ce7(%RIP),%YMM4 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VCVTSD2SS %XMM22,%XMM22,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA (%RCX,%RDI,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM21,%XMM21,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x1(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM20,%XMM20,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x2(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM19,%XMM19,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x3(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM18,%XMM18,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x4(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM17,%XMM17,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x5(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM16,%XMM16,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x6(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VCVTSD2SS %XMM23,%XMM23,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| LEA 0x7(%RCX,%RDI,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM0,(%R14,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| ADD $0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (6.3%) |
| CMP 0x1c0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406569 <main+0x1be9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA (,%RAX,8),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406b80 <main+0x2200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPBROADCASTD %EDI,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VXORPD %XMM15,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM16,%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM18,%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM19,%XMM19,%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM20,%XMM20,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| VXORPS %XMM23,%XMM23,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VEXTRACTF64X4 $0x1,%ZMM23,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM23,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM22 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM21,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM21,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM21 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM20,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM20,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM20 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM19,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM19,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM19 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM18,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM18,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM17,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM17,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM16,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM16,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM16 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VEXTRACTF64X4 $0x1,%ZMM15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM0,%ZMM15,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM0,%XMM8,%XMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM0,%XMM0,%XMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM8,%XMM0,%XMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| CMP %R8D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JE 406780 <main+0x1e00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
