| Loop Id: 39 | Module: attention-avx512 | Source: attention.cpp:27-33 | Coverage: 2.91% |
|---|
| Loop Id: 39 | Module: attention-avx512 | Source: attention.cpp:27-33 | Coverage: 2.91% |
|---|
0x406480 XOR %R12D,%R12D |
0x406483 VMOVAPD %ZMM12,%ZMM2 |
0x406489 MOV 0x70(%RSP),%RDX |
0x40648e LEA (%RDX,%R12,1),%ESI |
0x406492 VMOVSS (%R14,%RSI,4),%XMM12 |
0x406498 IMUL 0x60(%RSP),%R12D |
0x40649e LEA (%RBX,%R12,1),%ESI |
0x4064a2 LEA 0x5(%RBX,%R12,1),%R8D |
0x4064a7 VPBROADCASTD %ESI,%XMM13 |
0x4064ad VPADDD %YMM6,%YMM13,%YMM14 |
0x4064b1 VPERMT2D %YMM13,%YMM7,%YMM14 |
0x4064b7 VPBROADCASTD %R8D,%YMM15 |
0x4064bd VPBLENDD $0x20,%YMM15,%YMM14,%YMM14 |
0x4064c3 VPADDD %YMM8,%YMM13,%YMM13 |
0x4064c8 VPERMT2Q %YMM13,%YMM9,%YMM14 |
0x4064ce VPSUBD %YMM4,%YMM14,%YMM13 |
0x4064d2 VPXOR %XMM14,%XMM14,%XMM14 |
0x4064d7 KXNORB %K0,%K0,%K1 |
0x4064db VGATHERDPS (%R11,%YMM13,4),%YMM14{%K1} |
0x4064e2 VCVTSS2SD %XMM12,%XMM12,%XMM12 |
0x4064e7 VCVTPS2PD %YMM14,%ZMM13 |
0x4064ed VBROADCASTSD %XMM12,%ZMM12 |
0x4064f3 VFMADD213PD %ZMM2,%ZMM13,%ZMM12 |
0x4064f9 VCVTSD2SS %XMM12,%XMM12,%XMM13 |
0x4064fe VMULSS %XMM1,%XMM13,%XMM13 |
0x406502 MOV 0x38(%RSP),%RDX |
0x406507 LEA (%RDX,%RBX,1),%ESI |
0x40650a MOV 0xa0(%RSP),%R12 |
0x406512 VMOVSS %XMM13,(%R12,%RSI,4) |
0x406518 VSHUFPD $0x1,%XMM12,%XMM12,%XMM2 |
0x40651e VCVTSD2SS %XMM2,%XMM2,%XMM2 |
0x406522 VMULSS %XMM1,%XMM2,%XMM2 |
0x406526 LEA 0x1(%RDX,%RBX,1),%ESI |
0x40652a VMOVSS %XMM2,(%R12,%RSI,4) |
0x406530 VEXTRACTF128 $0x1,%YMM12,%XMM2 |
0x406536 VCVTSD2SS %XMM2,%XMM2,%XMM13 |
0x40653a VMULSS %XMM1,%XMM13,%XMM13 |
0x40653e LEA 0x2(%RDX,%RBX,1),%ESI |
0x406542 VMOVSS %XMM13,(%R12,%RSI,4) |
0x406548 VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 |
0x40654d VCVTSD2SS %XMM2,%XMM2,%XMM2 |
0x406551 VMULSS %XMM1,%XMM2,%XMM2 |
0x406555 LEA 0x3(%RDX,%RBX,1),%ESI |
0x406559 VMOVSS %XMM2,(%R12,%RSI,4) |
0x40655f VEXTRACTF32X4 $0x2,%ZMM12,%XMM2 |
0x406566 VCVTSD2SS %XMM2,%XMM2,%XMM13 |
0x40656a VMULSS %XMM1,%XMM13,%XMM13 |
0x40656e LEA 0x4(%RDX,%RBX,1),%ESI |
0x406572 VMOVSS %XMM13,(%R12,%RSI,4) |
0x406578 VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 |
0x40657d VCVTSD2SS %XMM2,%XMM2,%XMM2 |
0x406581 VMULSS %XMM1,%XMM2,%XMM2 |
0x406585 LEA 0x5(%RDX,%RBX,1),%ESI |
0x406589 VMOVSS %XMM2,(%R12,%RSI,4) |
0x40658f VEXTRACTF32X4 $0x3,%ZMM12,%XMM2 |
0x406596 VCVTSD2SS %XMM2,%XMM2,%XMM12 |
0x40659a VMULSS %XMM1,%XMM12,%XMM12 |
0x40659e LEA 0x6(%RDX,%RBX,1),%ESI |
0x4065a2 VMOVSS %XMM12,(%R12,%RSI,4) |
0x4065a8 VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 |
0x4065ad VCVTSD2SS %XMM2,%XMM2,%XMM2 |
0x4065b1 VMULSS %XMM1,%XMM2,%XMM2 |
0x4065b5 LEA 0x7(%RDX,%RBX,1),%ESI |
0x4065b9 VMOVSS %XMM2,(%R12,%RSI,4) |
0x4065bf MOV 0x40(%RSP),%R8D |
0x4065c4 ADD $0x8,%R8D |
0x4065c8 MOV 0x30(%RSP),%RSI |
0x4065cd ADD $0x8,%ESI |
0x4065d0 MOV 0x50(%RSP),%RDX |
0x4065d5 CMP 0x58(%RSP),%RDX |
0x4065da LEA 0x1(%RDX),%RDX |
0x4065de JE 406740 |
0x4065e4 MOV %RDX,0x50(%RSP) |
0x4065e9 LEA (,%RDX,8),%EBX |
0x4065f0 CMPL $0x1,0x90(%RSP) |
0x4065f8 MOV %RSI,0x30(%RSP) |
0x4065fd MOV %R8D,0x40(%RSP) |
0x406602 VXORPS %XMM12,%XMM12,%XMM12 |
0x406607 JE 406480 |
0x40660d MOV %R14,%RDX |
0x406610 MOV %R8D,%R14D |
0x406613 MOV 0x28(%RSP),%R8D |
0x406618 MOV %R8D,%R13D |
0x40661b XOR %R12D,%R12D |
0x40661e XCHG %AX,%AX |
(40) 0x406620 LEA -0x1(%R13),%R8D |
(40) 0x406624 VMOVSS (%RDX,%R8,4),%XMM13 |
(40) 0x40662a VCVTSS2SD %XMM13,%XMM13,%XMM13 |
(40) 0x40662f LEA 0x5(%RSI),%R8D |
(40) 0x406633 VPBROADCASTD %ESI,%XMM14 |
(40) 0x406639 VPADDD %YMM10,%YMM14,%YMM15 |
(40) 0x40663e VPERMT2D %YMM14,%YMM7,%YMM15 |
(40) 0x406644 VPBROADCASTD %R8D,%YMM2 |
(40) 0x40664a VPBLENDD $0x20,%YMM2,%YMM15,%YMM2 |
(40) 0x406650 VPADDD %YMM11,%YMM14,%YMM14 |
(40) 0x406655 VPERMT2Q %YMM14,%YMM9,%YMM2 |
(40) 0x40665b VPSUBD %YMM4,%YMM2,%YMM2 |
(40) 0x40665f VPXOR %XMM14,%XMM14,%XMM14 |
(40) 0x406664 KXNORB %K0,%K0,%K1 |
(40) 0x406668 VGATHERDPS (%R11,%YMM2,4),%YMM14{%K1} |
(40) 0x40666f VCVTPS2PD %YMM14,%ZMM2 |
(40) 0x406675 VBROADCASTSD %XMM13,%ZMM13 |
(40) 0x40667b VMULPD %ZMM13,%ZMM2,%ZMM2 |
(40) 0x406681 VADDPD %ZMM2,%ZMM12,%ZMM2 |
(40) 0x406687 MOV %R13D,%R8D |
(40) 0x40668a VMOVSS (%RDX,%R8,4),%XMM12 |
(40) 0x406690 LEA 0x5(%R14),%R8D |
(40) 0x406694 VPBROADCASTD %R14D,%XMM13 |
(40) 0x40669a VPADDD %YMM10,%YMM13,%YMM14 |
(40) 0x40669f VPERMT2D %YMM13,%YMM7,%YMM14 |
(40) 0x4066a5 VPBROADCASTD %R8D,%YMM15 |
(40) 0x4066ab VPBLENDD $0x20,%YMM15,%YMM14,%YMM14 |
(40) 0x4066b1 VPADDD %YMM11,%YMM13,%YMM13 |
(40) 0x4066b6 VPERMT2Q %YMM13,%YMM9,%YMM14 |
(40) 0x4066bc VPSUBD %YMM4,%YMM14,%YMM13 |
(40) 0x4066c0 VPXOR %XMM14,%XMM14,%XMM14 |
(40) 0x4066c5 KXNORB %K0,%K0,%K1 |
(40) 0x4066c9 VGATHERDPS (%R11,%YMM13,4),%YMM14{%K1} |
(40) 0x4066d0 VCVTSS2SD %XMM12,%XMM12,%XMM12 |
(40) 0x4066d5 VCVTPS2PD %YMM14,%ZMM13 |
(40) 0x4066db VBROADCASTSD %XMM12,%ZMM12 |
(40) 0x4066e1 VMULPD %ZMM12,%ZMM13,%ZMM12 |
(40) 0x4066e7 VADDPD %ZMM12,%ZMM2,%ZMM12 |
(40) 0x4066ed ADD $0x2,%R12 |
(40) 0x4066f1 ADD $0x2,%R13D |
(40) 0x4066f5 ADD %R10D,%R14D |
(40) 0x4066f8 ADD %R10D,%ESI |
(40) 0x4066fb CMP %R12,%RDI |
(40) 0x4066fe JNE 406620 |
0x406704 TESTB $0x1,0x18(%RSP) |
0x406709 MOV %RDX,%R14 |
0x40670c MOV 0x130(%RSP),%R13 |
0x406714 JNE 406483 |
0x40671a JMP 4064f9 |
/home/eoseret/llm-attention/attention.cpp: 27 - 33 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.10 |
| CQA speedup if FP arith vectorized | 1.10 |
| CQA speedup if fully vectorized | 2.32 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.15 |
| Bottlenecks | |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 17.22 |
| CQA cycles if no scalar integer | 15.67 |
| CQA cycles if FP arith vectorized | 15.67 |
| CQA cycles if fully vectorized | 7.41 |
| Front-end cycles | 15.00 |
| P0 cycles | 17.22 |
| P1 cycles | 17.22 |
| P2 cycles | 5.44 |
| P3 cycles | 5.44 |
| P4 cycles | 5.50 |
| P5 cycles | 16.89 |
| P6 cycles | 5.33 |
| P7 cycles | 5.50 |
| P8 cycles | 5.50 |
| P9 cycles | 5.50 |
| P10 cycles | 5.33 |
| P11 cycles | 5.44 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 78.00 |
| Nb uops | 90.00 |
| Nb loads | 11.67 |
| Nb stores | 11.00 |
| Nb stack references | 10.33 |
| FLOP/cycle | 1.08 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 5.33 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 8.23 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 88.67 |
| Bytes stored | 52.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 28.71 |
| Vectorization ratio load | 13.10 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 50.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 47.22 |
| Vector-efficiency ratio all | 17.35 |
| Vector-efficiency ratio load | 13.93 |
| Vector-efficiency ratio store | 7.39 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 28.13 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 22.14 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.07 |
| CQA speedup if fully vectorized | 1.89 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.25 |
| Bottlenecks | P0, P1, P5, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 19.33 |
| CQA cycles if no scalar integer | 18.00 |
| CQA cycles if FP arith vectorized | 18.00 |
| CQA cycles if fully vectorized | 10.24 |
| Front-end cycles | 15.50 |
| P0 cycles | 19.33 |
| P1 cycles | 19.33 |
| P2 cycles | 6.00 |
| P3 cycles | 6.00 |
| P4 cycles | 5.50 |
| P5 cycles | 19.33 |
| P6 cycles | 5.00 |
| P7 cycles | 5.50 |
| P8 cycles | 5.50 |
| P9 cycles | 5.50 |
| P10 cycles | 5.00 |
| P11 cycles | 6.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 79.00 |
| Nb uops | 93.00 |
| Nb loads | 11.00 |
| Nb stores | 11.00 |
| Nb stack references | 9.00 |
| FLOP/cycle | 1.24 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 7.66 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 96.00 |
| Bytes stored | 52.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 35.19 |
| Vectorization ratio load | 25.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 75.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 53.57 |
| Vector-efficiency ratio all | 20.72 |
| Vector-efficiency ratio load | 18.75 |
| Vector-efficiency ratio store | 7.39 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 39.06 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 25.67 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.18 |
| CQA speedup if FP arith vectorized | 1.18 |
| CQA speedup if fully vectorized | 7.43 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.04 |
| Bottlenecks | P0, P1, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 13.00 |
| CQA cycles if no scalar integer | 11.00 |
| CQA cycles if FP arith vectorized | 11.00 |
| CQA cycles if fully vectorized | 1.75 |
| Front-end cycles | 12.50 |
| P0 cycles | 13.00 |
| P1 cycles | 13.00 |
| P2 cycles | 3.33 |
| P3 cycles | 3.33 |
| P4 cycles | 5.50 |
| P5 cycles | 12.00 |
| P6 cycles | 5.00 |
| P7 cycles | 5.50 |
| P8 cycles | 5.50 |
| P9 cycles | 5.50 |
| P10 cycles | 5.00 |
| P11 cycles | 3.33 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 67.00 |
| Nb uops | 75.00 |
| Nb loads | 10.00 |
| Nb stores | 11.00 |
| Nb stack references | 10.00 |
| FLOP/cycle | 0.62 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 8.69 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 61.00 |
| Bytes stored | 52.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 18.18 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 38.10 |
| Vector-efficiency ratio all | 11.51 |
| Vector-efficiency ratio load | 8.75 |
| Vector-efficiency ratio store | 7.39 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 6.25 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 16.37 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.07 |
| CQA speedup if fully vectorized | 1.89 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.14 |
| Bottlenecks | P0, P1, P5, |
| Function | main |
| Source | attention.cpp:27-27,attention.cpp:30-33 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 19.33 |
| CQA cycles if no scalar integer | 18.00 |
| CQA cycles if FP arith vectorized | 18.00 |
| CQA cycles if fully vectorized | 10.25 |
| Front-end cycles | 17.00 |
| P0 cycles | 19.33 |
| P1 cycles | 19.33 |
| P2 cycles | 7.00 |
| P3 cycles | 7.00 |
| P4 cycles | 5.50 |
| P5 cycles | 19.33 |
| P6 cycles | 6.00 |
| P7 cycles | 5.50 |
| P8 cycles | 5.50 |
| P9 cycles | 5.50 |
| P10 cycles | 6.00 |
| P11 cycles | 7.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 88.00 |
| Nb uops | 102.00 |
| Nb loads | 14.00 |
| Nb stores | 11.00 |
| Nb stack references | 12.00 |
| FLOP/cycle | 1.24 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 8.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 8.33 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 109.00 |
| Bytes stored | 52.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 32.76 |
| Vectorization ratio load | 14.29 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 75.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 50.00 |
| Vector-efficiency ratio all | 19.83 |
| Vector-efficiency ratio load | 14.29 |
| Vector-efficiency ratio store | 7.39 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 39.06 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 24.38 |
| Path / |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 78 |
| nb uops | 90 |
| loop length | 384.67 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 4.67 |
| used ymm registers | 6.33 |
| used zmm registers | 2.33 |
| nb stack references | 10.33 |
| micro-operation queue | 15.00 cycles |
| front end | 15.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 17.22 | 17.22 | 5.44 | 5.44 | 5.50 | 16.89 | 5.33 | 5.50 | 5.50 | 5.50 | 5.33 | 5.44 |
| cycles | 17.22 | 17.22 | 5.44 | 5.44 | 5.50 | 16.89 | 5.33 | 5.50 | 5.50 | 5.50 | 5.33 | 5.44 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 15.00 |
| Dispatch | 17.22 |
| Data deps. | 0.00 |
| Overall L1 | 17.22 |
| all | 27% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 33% |
| all | 28% |
| load | 50% |
| store | 0% |
| mul | 0% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 51% |
| all | 28% |
| load | 13% |
| store | 0% |
| mul | 0% |
| add-sub | 50% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 47% |
| all | 19% |
| load | 8% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 28% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 20% |
| all | 16% |
| load | 28% |
| store | 6% |
| mul | 6% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 22% |
| all | 17% |
| load | 13% |
| store | 7% |
| mul | 6% |
| add-sub | 28% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 22% |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 79 |
| nb uops | 93 |
| loop length | 397 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 9 |
| used zmm registers | 3 |
| nb stack references | 9 |
| micro-operation queue | 15.50 cycles |
| front end | 15.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 19.33 | 19.33 | 6.00 | 6.00 | 5.50 | 19.33 | 5.00 | 5.50 | 5.50 | 5.50 | 5.00 | 6.00 |
| cycles | 19.33 | 19.33 | 6.00 | 6.00 | 5.50 | 19.33 | 5.00 | 5.50 | 5.50 | 5.50 | 5.00 | 6.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 15.50 |
| Dispatch | 19.33 |
| Data deps. | 0.00 |
| Overall L1 | 19.33 |
| all | 46% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 75% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 57% |
| all | 30% |
| load | 50% |
| store | 0% |
| mul | 0% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 52% |
| all | 35% |
| load | 25% |
| store | 0% |
| mul | 0% |
| add-sub | 75% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 53% |
| all | 26% |
| load | 9% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 39% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 28% |
| all | 18% |
| load | 28% |
| store | 6% |
| mul | 6% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 24% |
| all | 20% |
| load | 18% |
| store | 7% |
| mul | 6% |
| add-sub | 39% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VMOVAPD %ZMM12,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%R12,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VMOVSS (%R14,%RSI,4),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| IMUL 0x60(%RSP),%R12D | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| LEA (%RBX,%R12,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| LEA 0x5(%RBX,%R12,1),%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VPBROADCASTD %ESI,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPADDD %YMM6,%YMM13,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPERMT2D %YMM13,%YMM7,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPBROADCASTD %R8D,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPBLENDD $0x20,%YMM15,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPADDD %YMM8,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPERMT2Q %YMM13,%YMM9,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPSUBD %YMM4,%YMM14,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VPXOR %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KXNORB %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%R11,%YMM13,4),%YMM14{%K1} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTSS2SD %XMM12,%XMM12,%XMM12 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4-5 | 1 | scal (6.3%) |
| VCVTPS2PD %YMM14,%ZMM13 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VBROADCASTSD %XMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| VFMADD213PD %ZMM2,%ZMM13,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VCVTSD2SS %XMM12,%XMM12,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RBX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0xa0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM12,%XMM12,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF128 $0x1,%YMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x2(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x3(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x2,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x4(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x5(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x3,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM12 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x6(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM12,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x7(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV 0x40(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| ADD $0x8,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (6.3%) |
| MOV 0x30(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x50(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP 0x58(%RSP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406740 <main+0x2400> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| LEA (,%RDX,8),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| CMPL $0x1,0x90(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %R8D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| JE 406480 <main+0x2140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 67 |
| nb uops | 75 |
| loop length | 322 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 1 |
| used zmm registers | 1 |
| nb stack references | 10 |
| micro-operation queue | 12.50 cycles |
| front end | 12.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 13.00 | 13.00 | 3.33 | 3.33 | 5.50 | 12.00 | 5.00 | 5.50 | 5.50 | 5.50 | 5.00 | 3.33 |
| cycles | 13.00 | 13.00 | 3.33 | 3.33 | 5.50 | 12.00 | 5.00 | 5.50 | 5.50 | 5.50 | 5.00 | 3.33 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 12.50 |
| Dispatch | 13.00 |
| Data deps. | 0.00 |
| Overall L1 | 13.00 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 25% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 0% |
| mul | 0% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 18% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 38% |
| all | 8% |
| load | 8% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 8% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | 6% |
| mul | 6% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 18% |
| all | 11% |
| load | 8% |
| store | 7% |
| mul | 6% |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 16% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VCVTSD2SS %XMM12,%XMM12,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RBX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0xa0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM12,%XMM12,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF128 $0x1,%YMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x2(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x3(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x2,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x4(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x5(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x3,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM12 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x6(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM12,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x7(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV 0x40(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| ADD $0x8,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (6.3%) |
| MOV 0x30(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x50(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP 0x58(%RSP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406740 <main+0x2400> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| LEA (,%RDX,8),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| CMPL $0x1,0x90(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %R8D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| JE 406480 <main+0x2140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| MOV 0x28(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| MOV %R8D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| TESTB $0x1,0x18(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 | N/A |
| MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
| MOV 0x130(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 406483 <main+0x2143> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| JMP 4064f9 <main+0x21b9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| Function | main |
| Source file and lines | attention.cpp:27-33 |
| Module | attention-avx512 |
| nb instructions | 88 |
| nb uops | 102 |
| loop length | 435 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 9 |
| used zmm registers | 3 |
| nb stack references | 12 |
| micro-operation queue | 17.00 cycles |
| front end | 17.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 19.33 | 19.33 | 7.00 | 7.00 | 5.50 | 19.33 | 6.00 | 5.50 | 5.50 | 5.50 | 6.00 | 7.00 |
| cycles | 19.33 | 19.33 | 7.00 | 7.00 | 5.50 | 19.33 | 6.00 | 5.50 | 5.50 | 5.50 | 6.00 | 7.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 17.00 |
| Dispatch | 19.33 |
| Data deps. | 0.00 |
| Overall L1 | 19.33 |
| all | 36% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 75% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 44% |
| all | 30% |
| load | 50% |
| store | 0% |
| mul | 0% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 52% |
| all | 32% |
| load | 14% |
| store | 0% |
| mul | 0% |
| add-sub | 75% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 22% |
| load | 8% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 39% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 23% |
| all | 18% |
| load | 28% |
| store | 6% |
| mul | 6% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 24% |
| all | 19% |
| load | 14% |
| store | 7% |
| mul | 6% |
| add-sub | 39% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 24% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVAPD %ZMM12,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%R12,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VMOVSS (%R14,%RSI,4),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| IMUL 0x60(%RSP),%R12D | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| LEA (%RBX,%R12,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| LEA 0x5(%RBX,%R12,1),%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VPBROADCASTD %ESI,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPADDD %YMM6,%YMM13,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPERMT2D %YMM13,%YMM7,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPBROADCASTD %R8D,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPBLENDD $0x20,%YMM15,%YMM14,%YMM14 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPADDD %YMM8,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPERMT2Q %YMM13,%YMM9,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPSUBD %YMM4,%YMM14,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VPXOR %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KXNORB %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%R11,%YMM13,4),%YMM14{%K1} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTSS2SD %XMM12,%XMM12,%XMM12 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4-5 | 1 | scal (6.3%) |
| VCVTPS2PD %YMM14,%ZMM13 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VBROADCASTSD %XMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| VFMADD213PD %ZMM2,%ZMM13,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VCVTSD2SS %XMM12,%XMM12,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RBX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0xa0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM12,%XMM12,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF128 $0x1,%YMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x2(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x3(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x2,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x4(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM13,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x5(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VEXTRACTF32X4 $0x3,%ZMM12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM12 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x6(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM12,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VSHUFPD $0x1,%XMM2,%XMM2,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VCVTSD2SS %XMM2,%XMM2,%XMM2 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS %XMM1,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
| LEA 0x7(%RDX,%RBX,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VMOVSS %XMM2,(%R12,%RSI,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV 0x40(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| ADD $0x8,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (6.3%) |
| MOV 0x30(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x50(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP 0x58(%RSP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| LEA 0x1(%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JE 406740 <main+0x2400> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| LEA (,%RDX,8),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| CMPL $0x1,0x90(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %R8D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| JE 406480 <main+0x2140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x28(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| MOV %R8D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| TESTB $0x1,0x18(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 | N/A |
| MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x130(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 406483 <main+0x2143> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
