| Loop Id: 29 | Module: attention-gnr-512 | Source: attention_v2.cpp:27-98 [...] | Coverage: 22.00% |
|---|
| Loop Id: 29 | Module: attention-gnr-512 | Source: attention_v2.cpp:27-98 [...] | Coverage: 22.00% |
|---|
0x4054a0 VPBROADCASTQ %R8,%ZMM3 |
0x4054a6 VMOVDQU64 0x2c0(%RSP),%ZMM4 |
0x4054ae VPSUBQ %ZMM3,%ZMM4,%ZMM4 |
0x4054b4 VPCMPNLEUQ 0x7d41(%RIP),%ZMM4,%K1 |
0x4054bf VPMOVQD %ZMM3,%YMM3 |
0x4054c5 VPADDD 0x7b73(%RIP),%YMM3,%YMM3 |
0x4054cd VPADDD %YMM3,%YMM0,%YMM4 |
0x4054d1 MOV 0x70(%RSP),%R8 |
0x4054d6 ADD %R15,%R8 |
0x4054d9 VPBROADCASTD 0x7b7e(%RIP),%YMM6 |
0x4054e2 VPSUBD %YMM6,%YMM4,%YMM4 |
0x4054e6 VXORPS %XMM5,%XMM5,%XMM5 |
0x4054ea KMOVQ %K1,%K2 |
0x4054ef VGATHERDPS (%R8,%YMM4,4),%YMM5{%K2} |
0x4054f6 VPMULLD 0x2a0(%RSP),%YMM3,%YMM3 |
0x405500 VPADDD %YMM3,%YMM2,%YMM2 |
0x405504 MOV 0x40(%RSP),%R8 |
0x405509 ADD %R15,%R8 |
0x40550c VPSUBD %YMM6,%YMM2,%YMM2 |
0x405510 VPXOR %XMM3,%XMM3,%XMM3 |
0x405514 KMOVQ %K1,%K2 |
0x405519 VGATHERDPS (%R8,%YMM2,4),%YMM3{%K2} |
0x405520 VCVTPS2PD %YMM5,%ZMM2 |
0x405526 VCVTPS2PD %YMM3,%ZMM3 |
0x40552c VFMADD231PD %ZMM2,%ZMM3,%ZMM1{%K1} |
0x405532 VEXTRACTF64X4 $0x1,%ZMM1,%YMM2 |
0x405539 VADDPD %ZMM2,%ZMM1,%ZMM1 |
0x40553f VEXTRACTF128 $0x1,%YMM1,%XMM2 |
0x405545 VADDPD %XMM2,%XMM1,%XMM1 |
0x405549 VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
0x40554e VADDSD %XMM2,%XMM1,%XMM1 |
0x405552 VCVTSD2SS %XMM1,%XMM1,%XMM1 |
0x405556 VMULSS 0x1d4(%RSP),%XMM1,%XMM1 |
0x40555f LEA (%RSI,%RDI,1),%R8D |
0x405563 MOV 0x68(%RSP),%R9 |
0x405568 VMOVSS %XMM1,(%R9,%R8,4) |
0x40556e LEA 0x1(%RDI),%R8 |
0x405572 CMP 0x140(%RSP),%RDI |
0x40557a MOV %R8,%RDI |
0x40557d JE 405460 |
0x405583 VPBROADCASTD %EDI,%YMM2 |
0x405589 VXORPS %XMM1,%XMM1,%XMM1 |
0x40558d XOR %R8D,%R8D |
0x405590 TEST %RBX,%RBX |
0x405593 JE 4054a0 |
0x405599 MOV 0x70(%RSP),%R10 |
0x40559e VMOVDQU 0x2a0(%RSP),%YMM6 |
0x4055a7 VPMOVSXBD 0x7cd8(%RIP),%YMM7 |
0x4055b0 VPBROADCASTD 0x7aa7(%RIP),%YMM8 |
0x4055b9 VMOVDQU 0x7a5f(%RIP),%YMM9 |
0x4055c1 MOV 0x40(%RSP),%R11 |
0x4055c6 NOPW %CS:(%RAX,%RAX,1) |
(30) 0x4055d0 LEA (%RCX,%R8,1),%R9D |
(30) 0x4055d4 VPBROADCASTD %R9D,%YMM3 |
(30) 0x4055da LEA (%R10,%R15,1),%R9 |
(30) 0x4055de VPADDD %YMM3,%YMM9,%YMM3 |
(30) 0x4055e2 VXORPD %XMM4,%XMM4,%XMM4 |
(30) 0x4055e6 KXNORW %K0,%K0,%K1 |
(30) 0x4055ea VGATHERDPS (%R9,%YMM3,4),%YMM4{%K1} |
(30) 0x4055f1 VCVTPS2PD %YMM4,%ZMM3 |
(30) 0x4055f7 VPBROADCASTD %R8D,%YMM4 |
(30) 0x4055fd VPADDD %YMM7,%YMM4,%YMM4 |
(30) 0x405601 VPMULLD %YMM4,%YMM6,%YMM4 |
(30) 0x405606 VPADDD %YMM4,%YMM2,%YMM4 |
(30) 0x40560a LEA (%R11,%R15,1),%R9 |
(30) 0x40560e VPSUBD %YMM8,%YMM4,%YMM4 |
(30) 0x405613 VXORPS %XMM5,%XMM5,%XMM5 |
(30) 0x405617 KXNORW %K0,%K0,%K1 |
(30) 0x40561b VGATHERDPS (%R9,%YMM4,4),%YMM5{%K1} |
(30) 0x405622 VCVTPS2PD %YMM5,%ZMM4 |
(30) 0x405628 VFMADD231PD %ZMM4,%ZMM3,%ZMM1 |
(30) 0x40562e ADD $0x8,%R8 |
(30) 0x405632 CMP %RBX,%R8 |
(30) 0x405635 JB 4055d0 |
0x405637 MOV %RBX,%R8 |
0x40563a TEST $0x1,%AL |
0x40563c JE 4054a0 |
0x405642 JMP 405532 |
/home/eoseret/llm-attention/attention_v2.cpp: 27 - 98 |
-------------------------------------------------------------------------------- |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
[...] |
98: if (argc < 4) { |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.08 |
| CQA speedup if fully vectorized | 1.72 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 9.33 |
| CQA cycles if no scalar integer | 8.72 |
| CQA cycles if FP arith vectorized | 8.68 |
| CQA cycles if fully vectorized | 5.44 |
| Front-end cycles | 8.67 |
| P0 cycles | 8.58 |
| P1 cycles | 8.57 |
| P2 cycles | 7.22 |
| P3 cycles | 7.22 |
| P4 cycles | 0.50 |
| P5 cycles | 9.06 |
| P6 cycles | 3.40 |
| P7 cycles | 0.50 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 3.40 |
| P11 cycles | 7.22 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 43.67 |
| Nb uops | 52.00 |
| Nb loads | 13.00 |
| Nb stores | 1.00 |
| Nb stack references | 6.67 |
| FLOP/cycle | 2.43 |
| Nb FLOP add-sub | 11.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 5.33 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 27.51 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 265.33 |
| Bytes stored | 4.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 63.33 |
| Vectorization ratio load | 54.72 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 33.33 |
| Vectorization ratio add_sub | 81.48 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 59.40 |
| Vector-efficiency ratio all | 36.33 |
| Vector-efficiency ratio load | 35.15 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 20.83 |
| Vector-efficiency ratio add_sub | 51.39 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 30.03 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.06 |
| CQA speedup if FP arith vectorized | 1.10 |
| CQA speedup if fully vectorized | 1.79 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P1, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 11.17 |
| CQA cycles if no scalar integer | 10.50 |
| CQA cycles if FP arith vectorized | 10.17 |
| CQA cycles if fully vectorized | 6.22 |
| Front-end cycles | 9.33 |
| P0 cycles | 11.00 |
| P1 cycles | 11.17 |
| P2 cycles | 8.33 |
| P3 cycles | 8.33 |
| P4 cycles | 0.50 |
| P5 cycles | 10.83 |
| P6 cycles | 3.00 |
| P7 cycles | 0.50 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 3.00 |
| P11 cycles | 8.33 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 45.00 |
| Nb uops | 56.00 |
| Nb loads | 12.00 |
| Nb stores | 1.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 2.51 |
| Nb FLOP add-sub | 11.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 26.87 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 296.00 |
| Bytes stored | 4.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 74.19 |
| Vectorization ratio load | 66.67 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 50.00 |
| Vectorization ratio add_sub | 88.89 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 70.59 |
| Vector-efficiency ratio all | 44.35 |
| Vector-efficiency ratio load | 47.22 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 28.13 |
| Vector-efficiency ratio add_sub | 54.17 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 36.76 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.10 |
| CQA speedup if FP arith vectorized | 1.07 |
| CQA speedup if fully vectorized | 1.78 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.10 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 5.50 |
| CQA cycles if no scalar integer | 5.00 |
| CQA cycles if FP arith vectorized | 5.13 |
| CQA cycles if fully vectorized | 3.08 |
| Front-end cycles | 5.50 |
| P0 cycles | 3.40 |
| P1 cycles | 3.20 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 0.50 |
| P5 cycles | 5.00 |
| P6 cycles | 3.20 |
| P7 cycles | 0.50 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 3.20 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 31.00 |
| Nb uops | 33.00 |
| Nb loads | 9.00 |
| Nb stores | 1.00 |
| Nb stack references | 6.00 |
| FLOP/cycle | 2.18 |
| Nb FLOP add-sub | 11.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 21.09 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 112.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 47.37 |
| Vectorization ratio load | 37.50 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 66.67 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 44.44 |
| Vector-efficiency ratio all | 24.34 |
| Vector-efficiency ratio load | 20.31 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 6.25 |
| Vector-efficiency ratio add_sub | 45.83 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 19.44 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.06 |
| CQA speedup if FP arith vectorized | 1.06 |
| CQA speedup if fully vectorized | 1.62 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.01 |
| Bottlenecks | P0, P1, P5, |
| Function | main |
| Source | attention_v2.cpp:27-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 11.33 |
| CQA cycles if no scalar integer | 10.67 |
| CQA cycles if FP arith vectorized | 10.74 |
| CQA cycles if fully vectorized | 7.02 |
| Front-end cycles | 11.17 |
| P0 cycles | 11.33 |
| P1 cycles | 11.33 |
| P2 cycles | 10.33 |
| P3 cycles | 10.33 |
| P4 cycles | 0.50 |
| P5 cycles | 11.33 |
| P6 cycles | 4.00 |
| P7 cycles | 0.50 |
| P8 cycles | 0.50 |
| P9 cycles | 0.50 |
| P10 cycles | 4.00 |
| P11 cycles | 10.33 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 0 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 55.00 |
| Nb uops | 67.00 |
| Nb loads | 18.00 |
| Nb stores | 1.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 2.47 |
| Nb FLOP add-sub | 11.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 34.59 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 388.00 |
| Bytes stored | 4.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 68.42 |
| Vectorization ratio load | 60.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 50.00 |
| Vectorization ratio add_sub | 88.89 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 63.16 |
| Vector-efficiency ratio all | 40.30 |
| Vector-efficiency ratio load | 37.92 |
| Vector-efficiency ratio store | 6.25 |
| Vector-efficiency ratio mul | 28.13 |
| Vector-efficiency ratio add_sub | 54.17 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 33.88 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-gnr-512 |
| nb instructions | 43.67 |
| nb uops | 52 |
| loop length | 246 |
| used x86 registers | 8.67 |
| used mmx registers | 0 |
| used xmm registers | 3.33 |
| used ymm registers | 7.67 |
| used zmm registers | 3.33 |
| nb stack references | 6.67 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 8.67 cycles |
| front end | 8.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 8.58 | 8.57 | 7.22 | 7.22 | 0.50 | 9.06 | 3.40 | 0.50 | 0.50 | 0.50 | 3.40 | 7.22 |
| cycles | 8.58 | 8.57 | 7.22 | 7.22 | 0.50 | 9.06 | 3.40 | 0.50 | 0.50 | 0.50 | 3.40 | 7.22 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 8.67 |
| Dispatch | 9.17 |
| Data deps. | 0.00 |
| Overall L1 | 9.33 |
| all | 56% |
| load | 55% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 25% |
| all | 70% |
| load | 44% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 86% |
| all | 63% |
| load | 54% |
| store | 0% |
| mul | 33% |
| add-sub | 81% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 59% |
| all | 37% |
| load | 37% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 58% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 26% |
| all | 35% |
| load | 25% |
| store | 6% |
| mul | 6% |
| add-sub | 45% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| all | 36% |
| load | 35% |
| store | 6% |
| mul | 20% |
| add-sub | 51% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 30% |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-gnr-512 |
| nb instructions | 45 |
| nb uops | 56 |
| loop length | 249 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 7 |
| used zmm registers | 4 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 9.33 cycles |
| front end | 9.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 11.00 | 11.17 | 8.33 | 8.33 | 0.50 | 10.83 | 3.00 | 0.50 | 0.50 | 0.50 | 3.00 | 8.33 |
| cycles | 11.00 | 11.17 | 8.33 | 8.33 | 0.50 | 10.83 | 3.00 | 0.50 | 0.50 | 0.50 | 3.00 | 8.33 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 9.33 |
| Dispatch | 11.17 |
| Data deps. | 0.00 |
| Overall L1 | 11.17 |
| all | 73% |
| load | 66% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 42% |
| all | 75% |
| load | 66% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 90% |
| all | 74% |
| load | 66% |
| store | 0% |
| mul | 50% |
| add-sub | 88% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 70% |
| all | 50% |
| load | 53% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 58% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 37% |
| all | 38% |
| load | 35% |
| store | 6% |
| mul | 6% |
| add-sub | 45% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 36% |
| all | 44% |
| load | 47% |
| store | 6% |
| mul | 28% |
| add-sub | 54% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 36% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPBROADCASTQ %R8,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| VMOVDQU64 0x2c0(%RSP),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VPSUBQ %ZMM3,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 | vect (100.0%) |
| VPCMPNLEUQ 0x7d41(%RIP),%ZMM4,%K1 | vect (100.0%) | |||||||||||||||
| VPMOVQD %ZMM3,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPADDD 0x7b73(%RIP),%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 | vect (50.0%) |
| VPADDD %YMM3,%YMM0,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x70(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %R15,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VPBROADCASTD 0x7b7e(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VPSUBD %YMM6,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| VGATHERDPS (%R8,%YMM4,4),%YMM5{%K2} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VPMULLD 0x2a0(%RSP),%YMM3,%YMM3 | 3 | 1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM3,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x40(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %R15,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VPSUBD %YMM6,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VPXOR %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| VGATHERDPS (%R8,%YMM2,4),%YMM3{%K2} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTPS2PD %YMM5,%ZMM2 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VCVTPS2PD %YMM3,%ZMM3 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VFMADD231PD %ZMM2,%ZMM3,%ZMM1{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF64X4 $0x1,%ZMM1,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM2,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VCVTSD2SS %XMM1,%XMM1,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS 0x1d4(%RSP),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | scal (6.3%) |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0x68(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM1,(%R9,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP 0x140(%RSP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 405460 <main+0x21a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPBROADCASTD %EDI,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VXORPS %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | N/A |
| JE 4054a0 <main+0x21e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-gnr-512 |
| nb instructions | 31 |
| nb uops | 33 |
| loop length | 174 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 6 |
| used zmm registers | 2 |
| nb stack references | 6 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 5.50 cycles |
| front end | 5.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.40 | 3.20 | 3.00 | 3.00 | 0.50 | 5.00 | 3.20 | 0.50 | 0.50 | 0.50 | 3.20 | 3.00 |
| cycles | 3.40 | 3.20 | 3.00 | 3.00 | 0.50 | 5.00 | 3.20 | 0.50 | 0.50 | 0.50 | 3.20 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 5.50 |
| Dispatch | 5.00 |
| Data deps. | 0.00 |
| Overall L1 | 5.50 |
| all | 33% |
| load | 42% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 60% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 80% |
| all | 47% |
| load | 37% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 44% |
| all | 19% |
| load | 22% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 9% |
| all | 28% |
| load | 6% |
| store | 6% |
| mul | 6% |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 27% |
| all | 24% |
| load | 20% |
| store | 6% |
| mul | 6% |
| add-sub | 45% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 19% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VEXTRACTF64X4 $0x1,%ZMM1,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM2,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VCVTSD2SS %XMM1,%XMM1,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS 0x1d4(%RSP),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | scal (6.3%) |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0x68(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM1,(%R9,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP 0x140(%RSP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 405460 <main+0x21a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPBROADCASTD %EDI,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VXORPS %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4054a0 <main+0x21e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x70(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| VMOVDQU 0x2a0(%RSP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPMOVSXBD 0x7cd8(%RIP),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x7aa7(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VMOVDQU 0x7a5f(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| MOV 0x40(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RBX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | N/A |
| JE 4054a0 <main+0x21e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| JMP 405532 <main+0x2272> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:27-98 |
| Module | attention-gnr-512 |
| nb instructions | 55 |
| nb uops | 67 |
| loop length | 315 |
| used x86 registers | 10 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 10 |
| used zmm registers | 4 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 11.17 cycles |
| front end | 11.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 11.33 | 11.33 | 10.33 | 10.33 | 0.50 | 11.33 | 4.00 | 0.50 | 0.50 | 0.50 | 4.00 | 10.33 |
| cycles | 11.33 | 11.33 | 10.33 | 10.33 | 0.50 | 11.33 | 4.00 | 0.50 | 0.50 | 0.50 | 4.00 | 10.33 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 0.00 |
| Front-end | 11.17 |
| Dispatch | 11.33 |
| Data deps. | 0.00 |
| Overall L1 | 11.33 |
| all | 63% |
| load | 58% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 33% |
| all | 75% |
| load | 66% |
| store | 0% |
| mul | 0% |
| add-sub | 66% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 90% |
| all | 68% |
| load | 60% |
| store | 0% |
| mul | 50% |
| add-sub | 88% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 63% |
| all | 41% |
| load | 38% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 58% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 31% |
| all | 38% |
| load | 35% |
| store | 6% |
| mul | 6% |
| add-sub | 45% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 36% |
| all | 40% |
| load | 37% |
| store | 6% |
| mul | 28% |
| add-sub | 54% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPBROADCASTQ %R8,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
| VMOVDQU64 0x2c0(%RSP),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VPSUBQ %ZMM3,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 | vect (100.0%) |
| VPCMPNLEUQ 0x7d41(%RIP),%ZMM4,%K1 | vect (100.0%) | |||||||||||||||
| VPMOVQD %ZMM3,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPADDD 0x7b73(%RIP),%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 | vect (50.0%) |
| VPADDD %YMM3,%YMM0,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x70(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %R15,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VPBROADCASTD 0x7b7e(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VPSUBD %YMM6,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| VGATHERDPS (%R8,%YMM4,4),%YMM5{%K2} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VPMULLD 0x2a0(%RSP),%YMM3,%YMM3 | 3 | 1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM3,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| MOV 0x40(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %R15,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VPSUBD %YMM6,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VPXOR %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
| VGATHERDPS (%R8,%YMM2,4),%YMM3{%K2} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTPS2PD %YMM5,%ZMM2 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VCVTPS2PD %YMM3,%ZMM3 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VFMADD231PD %ZMM2,%ZMM3,%ZMM1{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VEXTRACTF64X4 $0x1,%ZMM1,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VADDPD %ZMM2,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VEXTRACTF128 $0x1,%YMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VADDPD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
| VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
| VADDSD %XMM2,%XMM1,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
| VCVTSD2SS %XMM1,%XMM1,%XMM1 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| VMULSS 0x1d4(%RSP),%XMM1,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | scal (6.3%) |
| LEA (%RSI,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0x68(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM1,(%R9,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP 0x140(%RSP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 405460 <main+0x21a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPBROADCASTD %EDI,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VXORPS %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4054a0 <main+0x21e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x70(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| VMOVDQU 0x2a0(%RSP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPMOVSXBD 0x7cd8(%RIP),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPBROADCASTD 0x7aa7(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| VMOVDQU 0x7a5f(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| MOV 0x40(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RBX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| TEST $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | N/A |
| JE 4054a0 <main+0x21e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
