| Loop Id: 22 | Module: attention-gnr-512 | Source: attention_v2.cpp:30-31 | Coverage: 18.24% |
|---|
| Loop Id: 22 | Module: attention-gnr-512 | Source: attention_v2.cpp:30-31 | Coverage: 18.24% |
|---|
0x405c90 LEA (%RAX,%RDI,1),%R8D |
0x405c94 VCVTPS2PD (%R12,%R8,4),%ZMM3 [2] |
0x405c9b VPBROADCASTD %EDI,%YMM4 |
0x405ca1 VPADDD %YMM7,%YMM4,%YMM4 |
0x405ca5 VPMULLD %YMM4,%YMM6,%YMM4 |
0x405caa VPADDD %YMM4,%YMM2,%YMM4 |
0x405cae LEA (%R10,%R15,1),%R8 |
0x405cb2 VPSUBD %YMM8,%YMM4,%YMM4 |
0x405cb7 VXORPS %XMM5,%XMM5,%XMM5 |
0x405cbb KXNORW %K0,%K0,%K1 |
0x405cbf VGATHERDPS (%R8,%YMM4,4),%YMM5{%K1} [1] |
0x405cc6 VCVTPS2PD %YMM5,%ZMM4 |
0x405ccc VFMADD231PD %ZMM4,%ZMM3,%ZMM1 |
0x405cd2 ADD $0x8,%RDI |
0x405cd6 CMP %R9,%RDI |
0x405cd9 JB 405c90 |
/home/eoseret/llm-attention/attention_v2.cpp: 30 - 31 |
-------------------------------------------------------------------------------- |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.79 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | P0, |
| Function | main |
| Source | attention_v2.cpp:30-31 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 5.17 |
| CQA cycles if no scalar integer | 4.83 |
| CQA cycles if FP arith vectorized | 5.17 |
| CQA cycles if fully vectorized | 2.89 |
| Front-end cycles | 3.67 |
| P0 cycles | 5.17 |
| P1 cycles | 4.83 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 0.00 |
| P5 cycles | 5.00 |
| P6 cycles | 1.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 1.00 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 4 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 16.00 |
| Nb uops | 22.00 |
| Nb loads | 2.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.10 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.39 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 64.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 90.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 80.00 |
| Vector-efficiency ratio all | 48.13 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 36.25 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.79 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | P0, |
| Function | main |
| Source | attention_v2.cpp:30-31 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 5.17 |
| CQA cycles if no scalar integer | 4.83 |
| CQA cycles if FP arith vectorized | 5.17 |
| CQA cycles if fully vectorized | 2.89 |
| Front-end cycles | 3.67 |
| P0 cycles | 5.17 |
| P1 cycles | 4.83 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 0.00 |
| P5 cycles | 5.00 |
| P6 cycles | 1.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 1.00 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 4 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 16.00 |
| Nb uops | 22.00 |
| Nb loads | 2.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.10 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 8.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.39 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 64.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 90.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 80.00 |
| Vector-efficiency ratio all | 48.13 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 36.25 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:30-31 |
| Module | attention-gnr-512 |
| nb instructions | 16 |
| nb uops | 22 |
| loop length | 75 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 6 |
| used zmm registers | 3 |
| nb stack references | 0 |
| micro-operation queue | 3.67 cycles |
| front end | 3.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 5.17 | 4.83 | 3.00 | 3.00 | 0.00 | 5.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 3.00 |
| cycles | 5.17 | 4.83 | 3.00 | 3.00 | 0.00 | 5.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 4.00 |
| Front-end | 3.67 |
| Dispatch | 5.17 |
| Data deps. | 4.00 |
| Overall L1 | 5.17 |
| all | 80% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 90% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 80% |
| all | 41% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 55% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 43% |
| all | 48% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 36% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LEA (%RAX,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VCVTPS2PD (%R12,%R8,4),%ZMM3 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 1 | vect (50.0%) |
| VPBROADCASTD %EDI,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPADDD %YMM7,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPMULLD %YMM4,%YMM6,%YMM4 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM4,%YMM2,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| LEA (%R10,%R15,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VPSUBD %YMM8,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%R8,%YMM4,4),%YMM5{%K1} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTPS2PD %YMM5,%ZMM4 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VFMADD231PD %ZMM4,%ZMM3,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JB 405c90 <main+0x29d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:30-31 |
| Module | attention-gnr-512 |
| nb instructions | 16 |
| nb uops | 22 |
| loop length | 75 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 6 |
| used zmm registers | 3 |
| nb stack references | 0 |
| micro-operation queue | 3.67 cycles |
| front end | 3.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 5.17 | 4.83 | 3.00 | 3.00 | 0.00 | 5.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 3.00 |
| cycles | 5.17 | 4.83 | 3.00 | 3.00 | 0.00 | 5.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 4.00 |
| Front-end | 3.67 |
| Dispatch | 5.17 |
| Data deps. | 4.00 |
| Overall L1 | 5.17 |
| all | 80% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 90% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 80% |
| all | 41% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 6% |
| all | 55% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 43% |
| all | 48% |
| load | 50% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 50% |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 36% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LEA (%RAX,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| VCVTPS2PD (%R12,%R8,4),%ZMM3 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 1 | vect (50.0%) |
| VPBROADCASTD %EDI,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (6.3%) |
| VPADDD %YMM7,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPMULLD %YMM4,%YMM6,%YMM4 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | vect (50.0%) |
| VPADDD %YMM4,%YMM2,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| LEA (%R10,%R15,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VPSUBD %YMM8,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VGATHERDPS (%R8,%YMM4,4),%YMM5{%K1} | 5 | 1 | 1 | 2.67 | 2.67 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 2.67 | 29 | 3 | vect (50.0%) |
| VCVTPS2PD %YMM5,%ZMM4 | 2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 | vect (50.0%) |
| VFMADD231PD %ZMM4,%ZMM3,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JB 405c90 <main+0x29d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
