| Loop Id: 100 | Module: attention-clang-gnr512 | Source: random.tcc:412-414 | Coverage: 0.09% |
|---|
| Loop Id: 100 | Module: attention-clang-gnr512 | Source: random.tcc:412-414 | Coverage: 0.09% |
|---|
0x4720 VMOVDQU 0x598(%RSP,%RDX,8),%XMM3 [1] |
0x4729 VMOVDQU 0x5a8(%RSP,%RDX,8),%XMM4 [1] |
0x4732 VPALIGNR $0x8,%XMM2,%XMM3,%XMM2 |
0x4738 VMOVDQU 0x5b8(%RSP,%RDX,8),%XMM5 [1] |
0x4741 VPAND %XMM3,%XMM8,%XMM6 |
0x4745 VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM6 |
0x474c VPSRLQ $0x1,%XMM6,%XMM2 |
0x4751 VPXOR -0x188(%RSP,%RDX,8),%XMM2,%XMM2 [1] |
0x475a VPTESTMQ %XMM9,%XMM3,%K1 |
0x4760 VPXORQ %XMM10,%XMM2,%XMM2{%K1} |
0x4766 VMOVDQU %XMM2,0x590(%RSP,%RDX,8) [1] |
0x476f VPALIGNR $0x8,%XMM3,%XMM4,%XMM2 |
0x4775 VPAND %XMM4,%XMM8,%XMM3 |
0x4779 VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 |
0x4780 VPSRLQ $0x1,%XMM3,%XMM2 |
0x4785 VPXOR -0x178(%RSP,%RDX,8),%XMM2,%XMM2 [1] |
0x478e VPTESTMQ %XMM9,%XMM4,%K1 |
0x4794 VPXORQ %XMM10,%XMM2,%XMM2{%K1} |
0x479a VMOVDQU %XMM2,0x5a0(%RSP,%RDX,8) [1] |
0x47a3 VPALIGNR $0x8,%XMM4,%XMM5,%XMM2 |
0x47a9 VPAND %XMM5,%XMM8,%XMM3 |
0x47ad VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 |
0x47b4 VPSRLQ $0x1,%XMM3,%XMM2 |
0x47b9 VPXOR -0x168(%RSP,%RDX,8),%XMM2,%XMM2 [1] |
0x47c2 VPTESTMQ %XMM9,%XMM5,%K1 |
0x47c8 VPXORQ %XMM10,%XMM2,%XMM2{%K1} |
0x47ce VMOVDQU %XMM2,0x5b0(%RSP,%RDX,8) [1] |
0x47d7 ADD $0x6,%RDX |
0x47db VMOVDQA %XMM5,%XMM2 |
0x47df CMP $0x274,%RDX |
0x47e6 JNE 4720 |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/random.tcc: 412 - 414 |
-------------------------------------------------------------------------------- |
412: | (_M_x[__k + 1] & __lower_mask)); |
413: _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1) |
414: ^ ((__y & 0x01) ? __a : 0)); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 4.78 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | main |
| Source | random.tcc:412-414 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.17 |
| CQA cycles if no scalar integer | 7.17 |
| CQA cycles if FP arith vectorized | 7.17 |
| CQA cycles if fully vectorized | 1.50 |
| Front-end cycles | 5.50 |
| P0 cycles | 7.17 |
| P1 cycles | 6.83 |
| P2 cycles | 2.00 |
| P3 cycles | 2.00 |
| P4 cycles | 1.50 |
| P5 cycles | 7.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 1.50 |
| P10 cycles | 0.00 |
| P11 cycles | 2.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 31.00 |
| Nb uops | 30.00 |
| Nb loads | 6.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 20.09 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 96.00 |
| Bytes stored | 48.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 89.29 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 86.36 |
| Vector-efficiency ratio all | 23.66 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | 25.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 23.30 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 4.78 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | main |
| Source | random.tcc:412-414 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.17 |
| CQA cycles if no scalar integer | 7.17 |
| CQA cycles if FP arith vectorized | 7.17 |
| CQA cycles if fully vectorized | 1.50 |
| Front-end cycles | 5.50 |
| P0 cycles | 7.17 |
| P1 cycles | 6.83 |
| P2 cycles | 2.00 |
| P3 cycles | 2.00 |
| P4 cycles | 1.50 |
| P5 cycles | 7.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 1.50 |
| P10 cycles | 0.00 |
| P11 cycles | 2.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 31.00 |
| Nb uops | 30.00 |
| Nb loads | 6.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 20.09 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 96.00 |
| Bytes stored | 48.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 89.29 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 86.36 |
| Vector-efficiency ratio all | 23.66 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | 25.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 23.30 |
| Path / |
| Function | main |
| Source file and lines | random.tcc:412-414 |
| Module | attention-clang-gnr512 |
| nb instructions | 31 |
| nb uops | 30 |
| loop length | 204 |
| used x86 registers | 2 |
| used mmx registers | 0 |
| used xmm registers | 9 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.50 cycles |
| front end | 5.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.17 | 6.83 | 2.00 | 2.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 2.00 |
| cycles | 7.17 | 6.83 | 2.00 | 2.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.50 |
| Dispatch | 7.17 |
| Data deps. | 1.00 |
| Overall L1 | 7.17 |
| all | 89% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 86% |
| all | 23% |
| load | 25% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 23% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVDQU 0x598(%RSP,%RDX,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU 0x5a8(%RSP,%RDX,8),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPALIGNR $0x8,%XMM2,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VMOVDQU 0x5b8(%RSP,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPAND %XMM3,%XMM8,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM6,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x188(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM3,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x590(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPALIGNR $0x8,%XMM3,%XMM4,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPAND %XMM4,%XMM8,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x178(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM4,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x5a0(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPALIGNR $0x8,%XMM4,%XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPAND %XMM5,%XMM8,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x168(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM5,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x5b0(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| ADD $0x6,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVDQA %XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| CMP $0x274,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 4720 <main+0xea0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | random.tcc:412-414 |
| Module | attention-clang-gnr512 |
| nb instructions | 31 |
| nb uops | 30 |
| loop length | 204 |
| used x86 registers | 2 |
| used mmx registers | 0 |
| used xmm registers | 9 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.50 cycles |
| front end | 5.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.17 | 6.83 | 2.00 | 2.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 2.00 |
| cycles | 7.17 | 6.83 | 2.00 | 2.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.50 |
| Dispatch | 7.17 |
| Data deps. | 1.00 |
| Overall L1 | 7.17 |
| all | 89% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 86% |
| all | 23% |
| load | 25% |
| store | 25% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 23% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVDQU 0x598(%RSP,%RDX,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU 0x5a8(%RSP,%RDX,8),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPALIGNR $0x8,%XMM2,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VMOVDQU 0x5b8(%RSP,%RDX,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPAND %XMM3,%XMM8,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM6,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x188(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM3,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x590(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPALIGNR $0x8,%XMM3,%XMM4,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPAND %XMM4,%XMM8,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x178(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM4,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x5a0(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPALIGNR $0x8,%XMM4,%XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
| VPAND %XMM5,%XMM8,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPTERNLOGQ $-0x8,%XMM7,%XMM2,%XMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
| VPSRLQ $0x1,%XMM3,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (25.0%) |
| VPXOR -0x168(%RSP,%RDX,8),%XMM2,%XMM2 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VPTESTMQ %XMM9,%XMM5,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VPXORQ %XMM10,%XMM2,%XMM2{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (25.0%) |
| VMOVDQU %XMM2,0x5b0(%RSP,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| ADD $0x6,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| VMOVDQA %XMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (25.0%) |
| CMP $0x274,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 4720 <main+0xea0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
