| Loop Id: 46 | Module: attention-gnr-256 | Source: random.tcc:409-414 | Coverage: 0.16% |
|---|
| Loop Id: 46 | Module: attention-gnr-256 | Source: random.tcc:409-414 | Coverage: 0.16% |
|---|
0x404c10 VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 [1] |
0x404c19 VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 [1] |
0x404c22 VPSRLQ $0x1,%YMM0,%YMM2 |
0x404c27 VPAND %YMM4,%YMM2,%YMM2 |
0x404c2b VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 [1] |
0x404c37 VPAND %YMM5,%YMM3,%YMM3 |
0x404c3b VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 [1] |
0x404c47 VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 [1] |
0x404c50 VPTESTMQ %YMM6,%YMM0,%K1 |
0x404c56 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
0x404c5c VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) [1] |
0x404c65 VPSRLQ $0x1,%YMM1,%YMM0 |
0x404c6a VPAND %YMM4,%YMM0,%YMM0 |
0x404c6e VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 [1] |
0x404c7a VPAND %YMM5,%YMM3,%YMM3 |
0x404c7e VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 [1] |
0x404c8a VPTESTMQ %YMM6,%YMM1,%K1 |
0x404c90 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
0x404c96 VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) [1] |
0x404c9f VPSRLQ $0x1,%YMM2,%YMM0 |
0x404ca4 VPAND %YMM4,%YMM0,%YMM0 |
0x404ca8 VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 [1] |
0x404cb4 VPAND %YMM5,%YMM1,%YMM1 |
0x404cb8 VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 [1] |
0x404cc4 VPTESTMQ %YMM6,%YMM2,%K1 |
0x404cca VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
0x404cd0 VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) [1] |
0x404cd9 ADD $0xc,%RAX |
0x404cdd CMP $0x180,%RAX |
0x404ce3 JB 404c10 |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/random.tcc: 409 - 414 |
-------------------------------------------------------------------------------- |
409: for (size_t __k = (__n - __m); __k < (__n - 1); ++__k) |
410: { |
411: _UIntType __y = ((_M_x[__k] & __upper_mask) |
412: | (_M_x[__k + 1] & __lower_mask)); |
413: _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1) |
414: ^ ((__y & 0x01) ? __a : 0)); |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.20 |
| Bottlenecks | P0, P1, P5, |
| Function | main |
| Source | random.tcc:409-414 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.00 |
| CQA cycles if no scalar integer | 7.00 |
| CQA cycles if FP arith vectorized | 7.00 |
| CQA cycles if fully vectorized | 3.50 |
| Front-end cycles | 5.83 |
| P0 cycles | 7.00 |
| P1 cycles | 7.00 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 1.50 |
| P5 cycles | 7.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 1.50 |
| P10 cycles | 0.00 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 30.00 |
| Nb uops | 35.00 |
| Nb loads | 9.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 54.86 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 288.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 50.00 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.20 |
| Bottlenecks | P0, P1, P5, |
| Function | main |
| Source | random.tcc:409-414 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.00 |
| CQA cycles if no scalar integer | 7.00 |
| CQA cycles if FP arith vectorized | 7.00 |
| CQA cycles if fully vectorized | 3.50 |
| Front-end cycles | 5.83 |
| P0 cycles | 7.00 |
| P1 cycles | 7.00 |
| P2 cycles | 3.00 |
| P3 cycles | 3.00 |
| P4 cycles | 1.50 |
| P5 cycles | 7.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 1.50 |
| P10 cycles | 0.00 |
| P11 cycles | 3.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 30.00 |
| Nb uops | 35.00 |
| Nb loads | 9.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 54.86 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 288.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 50.00 |
| Path / |
| Function | main |
| Source file and lines | random.tcc:409-414 |
| Module | attention-gnr-256 |
| nb instructions | 30 |
| nb uops | 35 |
| loop length | 217 |
| used x86 registers | 2 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 8 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.83 cycles |
| front end | 5.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.00 | 7.00 | 3.00 | 3.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.00 |
| cycles | 7.00 | 7.00 | 3.00 | 3.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.83 |
| Dispatch | 7.00 |
| Data deps. | 1.00 |
| Overall L1 | 7.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,%YMM0,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM3,%YMM3{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VPSRLQ $0x1,%YMM1,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM1,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM3,%YMM3{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VPSRLQ $0x1,%YMM2,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM2,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM1,%YMM1{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0xc,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP $0x180,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JB 404c10 <main+0x17f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | random.tcc:409-414 |
| Module | attention-gnr-256 |
| nb instructions | 30 |
| nb uops | 35 |
| loop length | 217 |
| used x86 registers | 2 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 8 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.83 cycles |
| front end | 5.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.00 | 7.00 | 3.00 | 3.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.00 |
| cycles | 7.00 | 7.00 | 3.00 | 3.00 | 1.50 | 7.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.83 |
| Dispatch | 7.00 |
| Data deps. | 1.00 |
| Overall L1 | 7.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,%YMM0,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM2,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM3,%YMM3{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VPSRLQ $0x1,%YMM1,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM1,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM3,%YMM3{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VPSRLQ $0x1,%YMM2,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM4,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 | 2 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 2-4 | 0.50 | vect (50.0%) |
| VPAND %YMM5,%YMM1,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | vect (50.0%) |
| VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.38 | vect (50.0%) |
| VPTESTMQ %YMM6,%YMM2,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPXORQ %YMM7,%YMM1,%YMM1{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 | vect (50.0%) |
| VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0xc,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP $0x180,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JB 404c10 <main+0x17f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
