| Loop Id: 19 | Module: attention-gnr-256 | Source: attention_v2.cpp:26-317 [...] | Coverage: 1.65% |
|---|
| Loop Id: 19 | Module: attention-gnr-256 | Source: attention_v2.cpp:26-317 [...] | Coverage: 1.65% |
|---|
0x403920 MOV 0x48(%RSP),%RAX |
0x403925 TEST %RAX,%RAX |
0x403928 JE 403c20 |
0x40392e MOV 0xe0(%RSP),%RDI |
0x403936 VZEROUPPER |
0x403939 CALL 402120 <_Znwm@plt> |
0x40393e MOV %RAX,%RDI |
0x403941 MOV 0x48(%RSP),%RCX |
0x403946 LEA (%RAX,%RCX,4),%RAX |
0x40394a MOV %RAX,0x120(%RSP) |
0x403952 MOVL $0,(%RDI) |
0x403958 CMP $0x1,%RCX |
0x40395c MOV %RDI,0x20(%RSP) |
0x403961 JE 403976 |
0x403963 ADD $0x4,%RDI |
0x403967 XOR %ESI,%ESI |
0x403969 MOV 0xd8(%RSP),%RDX |
0x403971 CALL 4097a0 <_intel_fast_memset> |
0x403976 CMPQ $0,0xc8(%RSP) |
0x40397f JE 403c44 |
0x403985 MOV 0x218(%RSP),%RDI |
0x40398d VZEROUPPER |
0x403990 CALL 402120 <_Znwm@plt> |
0x403995 MOV %RAX,%RCX |
0x403998 MOVL $0,(%RAX) |
0x40399e CMPQ $0x1,0x108(%RSP) |
0x4039a7 MOV %RAX,0x78(%RSP) |
0x4039ac JE 4039c6 |
0x4039ae LEA 0x4(%RCX),%RDI |
0x4039b2 XOR %ESI,%ESI |
0x4039b4 MOV 0x1a8(%RSP),%RDX |
0x4039bc CALL 4097a0 <_intel_fast_memset> |
0x4039c1 MOV 0x78(%RSP),%RCX |
0x4039c6 MOV 0x108(%RSP),%RAX |
0x4039ce LEA (%RCX,%RAX,4),%RAX |
0x4039d2 MOV %RAX,0x210(%RSP) |
0x4039da MOV 0x218(%RSP),%RDI |
0x4039e2 CALL 402120 <_Znwm@plt> |
0x4039e7 MOV %RAX,%RCX |
0x4039ea MOVL $0,(%RAX) |
0x4039f0 CMPQ $0x1,0x108(%RSP) |
0x4039f9 MOV %RAX,0x70(%RSP) |
0x4039fe JE 403a18 |
0x403a00 LEA 0x4(%RCX),%RDI |
0x403a04 XOR %ESI,%ESI |
0x403a06 MOV 0x1a8(%RSP),%RDX |
0x403a0e CALL 4097a0 <_intel_fast_memset> |
0x403a13 MOV 0x70(%RSP),%RCX |
0x403a18 MOV 0x108(%RSP),%RAX |
0x403a20 LEA (%RCX,%RAX,4),%RAX |
0x403a24 MOV %RAX,0x208(%RSP) |
0x403a2c MOV 0x218(%RSP),%RDI |
0x403a34 CALL 402120 <_Znwm@plt> |
0x403a39 MOV %RAX,%RCX |
0x403a3c MOVL $0,(%RAX) |
0x403a42 CMPQ $0x1,0x108(%RSP) |
0x403a4b MOV %RAX,0x68(%RSP) |
0x403a50 JE 403a6a |
0x403a52 LEA 0x4(%RCX),%RDI |
0x403a56 XOR %ESI,%ESI |
0x403a58 MOV 0x1a8(%RSP),%RDX |
0x403a60 CALL 4097a0 <_intel_fast_memset> |
0x403a65 MOV 0x68(%RSP),%RCX |
0x403a6a MOV 0x108(%RSP),%RAX |
0x403a72 LEA (%RCX,%RAX,4),%RAX |
0x403a76 MOV %RAX,0x200(%RSP) |
0x403a7e CMPQ $0,0x48(%RSP) |
0x403a84 JE 403c83 |
0x403a8a MOV 0xe0(%RSP),%RDI |
0x403a92 CALL 402120 <_Znwm@plt> |
0x403a97 MOV %RAX,%RCX |
0x403a9a MOVL $0,(%RAX) |
0x403aa0 CMPQ $0x1,0x48(%RSP) |
0x403aa6 MOV %RAX,0xe8(%RSP) |
0x403aae JE 403acb |
0x403ab0 LEA 0x4(%RCX),%RDI |
0x403ab4 XOR %ESI,%ESI |
0x403ab6 MOV 0xd8(%RSP),%RDX |
0x403abe CALL 4097a0 <_intel_fast_memset> |
0x403ac3 MOV 0xe8(%RSP),%RCX |
0x403acb MOV 0x48(%RSP),%RAX |
0x403ad0 LEA (%RCX,%RAX,4),%RAX |
0x403ad4 MOV %RAX,0x150(%RSP) |
0x403adc MOV 0xe0(%RSP),%RDI |
0x403ae4 CALL 402120 <_Znwm@plt> |
0x403ae9 MOV %RAX,%RCX |
0x403aec MOVL $0,(%RAX) |
0x403af2 CMPQ $0x1,0x48(%RSP) |
0x403af8 MOV %RAX,0x58(%RSP) |
0x403afd JE 403b17 |
0x403aff LEA 0x4(%RCX),%RDI |
0x403b03 XOR %ESI,%ESI |
0x403b05 MOV 0xd8(%RSP),%RDX |
0x403b0d CALL 4097a0 <_intel_fast_memset> |
0x403b12 MOV 0x58(%RSP),%RCX |
0x403b17 MOV 0x48(%RSP),%RAX |
0x403b1c LEA (%RCX,%RAX,4),%RAX |
0x403b20 MOV %RAX,0x148(%RSP) |
0x403b28 MOV 0xe0(%RSP),%RDI |
0x403b30 CALL 402120 <_Znwm@plt> |
0x403b35 MOV %RAX,%RCX |
0x403b38 MOVL $0,(%RAX) |
0x403b3e CMPQ $0x1,0x48(%RSP) |
0x403b44 MOV %RAX,0xd0(%RSP) |
0x403b4c JE 403b69 |
0x403b4e LEA 0x4(%RCX),%RDI |
0x403b52 XOR %ESI,%ESI |
0x403b54 MOV 0xd8(%RSP),%RDX |
0x403b5c CALL 4097a0 <_intel_fast_memset> |
0x403b61 MOV 0xd0(%RSP),%RCX |
0x403b69 MOV 0x48(%RSP),%RAX |
0x403b6e LEA (%RCX,%RAX,4),%RAX |
0x403b72 MOV %RAX,0x140(%RSP) |
0x403b7a MOV 0xe0(%RSP),%RDI |
0x403b82 CALL 402120 <_Znwm@plt> |
0x403b87 MOV %RAX,%RCX |
0x403b8a MOVL $0,(%RAX) |
0x403b90 CMPQ $0x1,0x48(%RSP) |
0x403b96 MOV %RAX,0x38(%RSP) |
0x403b9b JE 403bb5 |
0x403b9d LEA 0x4(%RCX),%RDI |
0x403ba1 XOR %ESI,%ESI |
0x403ba3 MOV 0xd8(%RSP),%RDX |
0x403bab CALL 4097a0 <_intel_fast_memset> |
0x403bb0 MOV 0x38(%RSP),%RCX |
0x403bb5 MOV 0x48(%RSP),%RAX |
0x403bba LEA (%RCX,%RAX,4),%RAX |
0x403bbe MOV %RAX,0x138(%RSP) |
0x403bc6 MOV 0xe0(%RSP),%RDI |
0x403bce CALL 402120 <_Znwm@plt> |
0x403bd3 MOV 0x48(%RSP),%RDX |
0x403bd8 LEA (%RAX,%RDX,4),%RCX |
0x403bdc MOV %RCX,0x130(%RSP) |
0x403be4 MOVL $0,(%RAX) |
0x403bea CMP $0x1,%RDX |
0x403bee MOV %RAX,0x80(%RSP) |
0x403bf6 JE 403cf5 |
0x403bfc MOV %RAX,%RDI |
0x403bff ADD $0x4,%RDI |
0x403c03 XOR %ESI,%ESI |
0x403c05 MOV 0xd8(%RSP),%RDX |
0x403c0d CALL 4097a0 <_intel_fast_memset> |
0x403c12 JMP 403cf5 |
0x403c20 MOVQ $0,0x120(%RSP) |
0x403c2c MOVQ $0,0x20(%RSP) |
0x403c35 CMPQ $0,0xc8(%RSP) |
0x403c3e JNE 403985 |
0x403c44 MOVQ $0,0x68(%RSP) |
0x403c4d MOVQ $0,0x200(%RSP) |
0x403c59 MOVQ $0,0x78(%RSP) |
0x403c62 MOVQ $0,0x210(%RSP) |
0x403c6e MOVQ $0,0x208(%RSP) |
0x403c7a MOVQ $0,0x70(%RSP) |
0x403c83 MOVQ $0,0x138(%RSP) |
0x403c8f MOVQ $0,0x38(%RSP) |
0x403c98 MOVQ $0,0x58(%RSP) |
0x403ca1 MOVQ $0,0x148(%RSP) |
0x403cad MOVQ $0,0x150(%RSP) |
0x403cb9 MOVQ $0,0xe8(%RSP) |
0x403cc5 MOVQ $0,0x140(%RSP) |
0x403cd1 MOVQ $0,0xd0(%RSP) |
0x403cdd MOVQ $0,0x80(%RSP) |
0x403ce9 MOVQ $0,0x130(%RSP) |
0x403cf5 MOV $0x1fffffffffffffff,%RAX |
0x403cff CMP %RAX,0x100(%RSP) |
0x403d07 JA 406f91 |
0x403d0d CMPQ $0,0xc0(%RSP) |
0x403d16 JE 403e10 |
0x403d1c MOV 0x258(%RSP),%RDI |
0x403d24 VZEROUPPER |
0x403d27 CALL 402120 <_Znwm@plt> |
0x403d2c MOV %RAX,%RCX |
0x403d2f MOVL $0,(%RAX) |
0x403d35 CMPQ $0x1,0x100(%RSP) |
0x403d3e MOV %RAX,0x50(%RSP) |
0x403d43 JE 403d5d |
0x403d45 LEA 0x4(%RCX),%RDI |
0x403d49 XOR %ESI,%ESI |
0x403d4b MOV 0x250(%RSP),%RDX |
0x403d53 CALL 4097a0 <_intel_fast_memset> |
0x403d58 MOV 0x50(%RSP),%RCX |
0x403d5d MOV 0x100(%RSP),%RAX |
0x403d65 LEA (%RCX,%RAX,4),%RAX |
0x403d69 MOV %RAX,0x1f8(%RSP) |
0x403d71 MOV 0x258(%RSP),%RDI |
0x403d79 CALL 402120 <_Znwm@plt> |
0x403d7e MOV %RAX,%RDX |
0x403d81 MOVL $0,(%RDX) |
0x403d87 CMPQ $0x1,0x100(%RSP) |
0x403d90 MOV %RDX,0x40(%RSP) |
0x403d95 JE 403daf |
0x403d97 LEA 0x4(%RDX),%RDI |
0x403d9b XOR %ESI,%ESI |
0x403d9d MOV 0x250(%RSP),%RDX |
0x403da5 CALL 4097a0 <_intel_fast_memset> |
0x403daa MOV 0x40(%RSP),%RDX |
0x403daf MOV 0x100(%RSP),%RAX |
0x403db7 LEA (%RDX,%RAX,4),%RAX |
0x403dbb MOV %RAX,0x1f0(%RSP) |
0x403dc3 MOV 0x158(%RSP),%RDI |
0x403dcb CALL 402120 <_Znwm@plt> |
0x403dd0 MOV %RAX,%RDI |
0x403dd3 MOV 0xc0(%RSP),%RAX |
0x403ddb LEA (%RDI,%RAX,4),%RCX |
0x403ddf MOV %RCX,0x1e8(%RSP) |
0x403de7 MOVL $0,(%RDI) |
0x403ded CMP $0x1,%RAX |
0x403df1 MOV %RDI,0x110(%RSP) |
0x403df9 JE 403e52 |
0x403dfb ADD $0x4,%RDI |
0x403dff XOR %ESI,%ESI |
0x403e01 MOV 0x278(%RSP),%RDX |
0x403e09 CALL 4097a0 <_intel_fast_memset> |
0x403e0e JMP 403e52 |
0x403e10 MOVQ $0,0x1f0(%RSP) |
0x403e1c MOVQ $0,0x40(%RSP) |
0x403e25 MOVQ $0,0x50(%RSP) |
0x403e2e MOVQ $0,0x1f8(%RSP) |
0x403e3a MOVQ $0,0x110(%RSP) |
0x403e46 MOVQ $0,0x1e8(%RSP) |
0x403e52 LEA 0x3a8(%RSP),%RAX |
0x403e5a MOV %RAX,0x398(%RSP) |
0x403e62 MOVL $0x746c7561,0x3(%RAX) |
0x403e69 MOVL $0x61666564,(%RAX) |
0x403e6f MOVQ $0x7,0x3a0(%RSP) |
0x403e7b MOVB $0,0x3af(%RSP) |
0x403e83 LEA 0x1720(%RSP),%RDI |
0x403e8b LEA 0x398(%RSP),%RSI |
0x403e93 VZEROUPPER |
0x403e96 CALL 402220 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> |
0x403e9b MOV 0x398(%RSP),%RDI |
0x403ea3 LEA 0x3a8(%RSP),%RAX |
0x403eab CMP %RAX,%RDI |
0x403eae JE 403ec0 |
0x403eb0 MOV 0x3a8(%RSP),%RSI |
0x403eb8 INC %RSI |
0x403ebb CALL 402130 <_ZdlPvm@plt> |
0x403ec0 LEA 0x1720(%RSP),%RDI |
0x403ec8 CALL 4021b0 <_ZNSt13random_device9_M_getvalEv@plt> |
0x403ecd MOV %EAX,%R10D |
0x403ed0 MOV %R10,0x398(%RSP) |
0x403ed8 XOR %EAX,%EAX |
0x403eda MOV %R10,%RCX |
0x403edd NOPL (%RAX) |
(17) 0x403ee0 MOV %RCX,%RDX |
(17) 0x403ee3 SHR $0x1e,%RDX |
(17) 0x403ee7 XOR %RCX,%RDX |
(17) 0x403eea IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403ef1 LEA 0x1(%RAX,%RCX,1),%RCX |
(17) 0x403ef6 MOV %ECX,%EDX |
(17) 0x403ef8 MOV %RDX,0x3a0(%RSP,%RAX,8) |
(17) 0x403f00 MOV %ECX,%EDX |
(17) 0x403f02 SHR $0x1e,%EDX |
(17) 0x403f05 XOR %RCX,%RDX |
(17) 0x403f08 IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403f0f LEA 0x2(%RAX,%RCX,1),%RCX |
(17) 0x403f14 MOV %ECX,%EDX |
(17) 0x403f16 MOV %RDX,0x3a8(%RSP,%RAX,8) |
(17) 0x403f1e MOV %ECX,%EDX |
(17) 0x403f20 SHR $0x1e,%EDX |
(17) 0x403f23 XOR %RCX,%RDX |
(17) 0x403f26 IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403f2d LEA 0x3(%RAX,%RCX,1),%RCX |
(17) 0x403f32 MOV %ECX,%EDX |
(17) 0x403f34 MOV %RDX,0x3b0(%RSP,%RAX,8) |
(17) 0x403f3c MOV %ECX,%EDX |
(17) 0x403f3e SHR $0x1e,%EDX |
(17) 0x403f41 XOR %RCX,%RDX |
(17) 0x403f44 IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403f4b LEA 0x4(%RAX,%RCX,1),%RCX |
(17) 0x403f50 MOV %ECX,%EDX |
(17) 0x403f52 MOV %RDX,0x3b8(%RSP,%RAX,8) |
(17) 0x403f5a MOV %ECX,%EDX |
(17) 0x403f5c SHR $0x1e,%EDX |
(17) 0x403f5f XOR %RCX,%RDX |
(17) 0x403f62 IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403f69 LEA 0x5(%RAX,%RCX,1),%RCX |
(17) 0x403f6e MOV %ECX,%EDX |
(17) 0x403f70 MOV %RDX,0x3c0(%RSP,%RAX,8) |
(17) 0x403f78 MOV %ECX,%EDX |
(17) 0x403f7a SHR $0x1e,%EDX |
(17) 0x403f7d XOR %RCX,%RDX |
(17) 0x403f80 IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403f87 LEA 0x6(%RAX,%RCX,1),%RCX |
(17) 0x403f8c MOV %ECX,%EDX |
(17) 0x403f8e MOV %RDX,0x3c8(%RSP,%RAX,8) |
(17) 0x403f96 MOV %ECX,%EDX |
(17) 0x403f98 SHR $0x1e,%EDX |
(17) 0x403f9b XOR %RCX,%RDX |
(17) 0x403f9e IMUL $0x6c078965,%RDX,%RCX |
(17) 0x403fa5 LEA 0x7(%RAX,%RCX,1),%RCX |
(17) 0x403faa MOV %ECX,%EDX |
(17) 0x403fac MOV %RDX,0x3d0(%RSP,%RAX,8) |
(17) 0x403fb4 MOV %ECX,%EDX |
(17) 0x403fb6 SHR $0x1e,%EDX |
(17) 0x403fb9 XOR %RCX,%RDX |
(17) 0x403fbc IMUL $0x6c078965,%EDX,%ECX |
(17) 0x403fc2 LEA 0x8(%RAX,%RCX,1),%ECX |
(17) 0x403fc6 MOV %RCX,0x3d8(%RSP,%RAX,8) |
(17) 0x403fce ADD $0x8,%RAX |
(17) 0x403fd2 CMP $0x268,%RAX |
(17) 0x403fd8 JNE 403ee0 |
0x403fde SHR $0x1e,%ECX |
0x403fe1 IMUL $0x6c078965,%RDX,%RDX |
0x403fe8 ADD %RAX,%RDX |
0x403feb XOR %RCX,%RDX |
0x403fee IMUL $0x6c078965,%RDX,%RAX |
0x403ff5 ADD $0x269,%RAX |
0x403ffb MOV %EAX,%ECX |
0x403ffd SHR $0x1e,%ECX |
0x404000 XOR %RAX,%RCX |
0x404003 IMUL $0x6c078965,%RCX,%RCX |
0x40400a ADD $0x26a,%RCX |
0x404011 MOV %ECX,%EDX |
0x404013 SHR $0x1e,%EDX |
0x404016 XOR %RCX,%RDX |
0x404019 IMUL $0x6c078965,%RDX,%RDX |
0x404020 ADD $0x26b,%RDX |
0x404027 MOV %EDX,%ESI |
0x404029 SHR $0x1e,%ESI |
0x40402c XOR %RDX,%RSI |
0x40402f IMUL $0x6c078965,%RSI,%RSI |
0x404036 ADD $0x26c,%RSI |
0x40403d MOV %ESI,%EDI |
0x40403f SHR $0x1e,%EDI |
0x404042 XOR %RSI,%RDI |
0x404045 IMUL $0x6c078965,%RDI,%RDI |
0x40404c ADD $0x26d,%RDI |
0x404053 MOV %EDI,%R8D |
0x404056 SHR $0x1e,%R8D |
0x40405a XOR %RDI,%R8 |
0x40405d IMUL $0x6c078965,%R8,%R8 |
0x404064 ADD $0x26e,%R8 |
0x40406b MOV %R8D,%R9D |
0x40406e SHR $0x1e,%R9D |
0x404072 XOR %R8D,%R9D |
0x404075 IMUL $0x6c078965,%R9D,%R9D |
0x40407c MOV %EAX,%EAX |
0x40407e MOV %RAX,0x16e0(%RSP) |
0x404086 MOV %ECX,%EAX |
0x404088 MOV %RAX,0x16e8(%RSP) |
0x404090 MOV %EDX,%EAX |
0x404092 MOV %RAX,0x16f0(%RSP) |
0x40409a MOV %ESI,%EAX |
0x40409c MOV %RAX,0x16f8(%RSP) |
0x4040a4 MOV %EDI,%EAX |
0x4040a6 MOV %RAX,0x1700(%RSP) |
0x4040ae MOV %R8D,%EAX |
0x4040b1 MOV %RAX,0x1708(%RSP) |
0x4040b9 ADD $0x26f,%R9D |
0x4040c0 MOV %R9,0x1710(%RSP) |
0x4040c8 MOVQ $0x270,0x1718(%RSP) |
0x4040d4 CMPQ $0,0x48(%RSP) |
0x4040da JE 404470 |
0x4040e0 MOV $0x270,%EDX |
0x4040e5 XOR %R9D,%R9D |
0x4040e8 MOV 0xf8(%RSP),%RSI |
0x4040f0 MOV $-0x66f74f21,%EDI |
0x4040f5 MOV $0x7fffffffc0000000,%R8 |
0x4040ff NOP |
(50) 0x404100 CMP $0x270,%RDX |
(50) 0x404107 JB 404380 |
(50) 0x40410d XOR %EAX,%EAX |
(50) 0x40410f VPBROADCASTQ 0xb088(%RIP),%YMM4 |
(50) 0x404118 VPBROADCASTQ 0xb087(%RIP),%YMM5 |
(50) 0x404121 VPBROADCASTQ 0xb086(%RIP),%YMM6 |
(50) 0x40412a VPBROADCASTQ 0xb085(%RIP),%YMM7 |
(50) 0x404133 NOPW %CS:(%RAX,%RAX,1) |
(51) 0x404140 VPBROADCASTQ %R10,%YMM1 |
(51) 0x404146 MOV 0x3b8(%RSP,%RAX,1),%R10 |
(51) 0x40414e VMOVDQU 0x3a0(%RSP,%RAX,1),%YMM0 |
(51) 0x404157 VPSRLQ $0x1,%YMM0,%YMM2 |
(51) 0x40415c VPAND %YMM4,%YMM2,%YMM2 |
(51) 0x404160 VPBLENDD $-0x40,%YMM1,%YMM0,%YMM1 |
(51) 0x404166 VPSRLQ $0x1,%YMM1,%YMM1 |
(51) 0x40416b VPERMQ $-0x6d,%YMM1,%YMM1 |
(51) 0x404171 VPAND %YMM5,%YMM1,%YMM1 |
(51) 0x404175 VPTERNLOGQ $0x56,0x1000(%RSP,%RAX,1),%YMM2,%YMM1 |
(51) 0x404181 VPTESTMQ %YMM6,%YMM0,%K1 |
(51) 0x404187 VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(51) 0x40418d VMOVDQU %YMM1,0x398(%RSP,%RAX,1) |
(51) 0x404196 ADD $0x20,%RAX |
(51) 0x40419a CMP $0x700,%RAX |
(51) 0x4041a0 JNE 404140 |
(50) 0x4041a2 MOV 0xaa8(%RSP),%RAX |
(50) 0x4041aa VMOVDQU 0xaa0(%RSP),%XMM1 |
(50) 0x4041b3 VPSRLQ $0x1,%XMM1,%XMM2 |
(50) 0x4041b8 VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(50) 0x4041be VPUNPCKHQDQ 0xaa0(%RSP){1to2},%XMM0,%XMM0 |
(50) 0x4041c9 VPANDQ 0xafcd(%RIP){1to2},%XMM2,%XMM2 |
(50) 0x4041d3 VPSRLQ $0x1,%XMM0,%XMM0 |
(50) 0x4041d8 VPANDQ 0xafc6(%RIP){1to2},%XMM0,%XMM0 |
(50) 0x4041e2 VPTERNLOGQ $0x56,0x1700(%RSP),%XMM2,%XMM0 |
(50) 0x4041ee VPTESTMQ 0xafb8(%RIP){1to0},%XMM1,%K1 |
(50) 0x4041f8 VPXORQ 0xafb6(%RIP){1to2},%XMM0,%XMM0{%K1} |
(50) 0x404202 VMOVDQU %XMM0,0xa98(%RSP) |
(50) 0x40420b MOV 0xab0(%RSP),%ECX |
(50) 0x404212 MOV %ECX,%EDX |
(50) 0x404214 SHR $0x1,%EDX |
(50) 0x404216 AND $0x3fffffff,%EDX |
(50) 0x40421c SHR $0x1,%RAX |
(50) 0x40421f AND %R8,%RAX |
(50) 0x404222 ADD %RDX,%RAX |
(50) 0x404225 XOR 0x1710(%RSP),%RAX |
(50) 0x40422d AND $0x1,%ECX |
(50) 0x404230 NEG %ECX |
(50) 0x404232 AND %EDI,%ECX |
(50) 0x404234 XOR %RAX,%RCX |
(50) 0x404237 MOV %RCX,0xaa8(%RSP) |
(50) 0x40423f MOV $-0xc,%RAX |
(50) 0x404246 NOPW %CS:(%RAX,%RAX,1) |
(52) 0x404250 VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 |
(52) 0x404259 VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 |
(52) 0x404262 VPSRLQ $0x1,%YMM0,%YMM2 |
(52) 0x404267 VPAND %YMM4,%YMM2,%YMM2 |
(52) 0x40426b VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 |
(52) 0x404277 VPAND %YMM5,%YMM3,%YMM3 |
(52) 0x40427b VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 |
(52) 0x404287 VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 |
(52) 0x404290 VPTESTMQ %YMM6,%YMM0,%K1 |
(52) 0x404296 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(52) 0x40429c VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) |
(52) 0x4042a5 VPSRLQ $0x1,%YMM1,%YMM0 |
(52) 0x4042aa VPAND %YMM4,%YMM0,%YMM0 |
(52) 0x4042ae VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 |
(52) 0x4042ba VPAND %YMM5,%YMM3,%YMM3 |
(52) 0x4042be VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 |
(52) 0x4042ca VPTESTMQ %YMM6,%YMM1,%K1 |
(52) 0x4042d0 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(52) 0x4042d6 VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) |
(52) 0x4042df VPSRLQ $0x1,%YMM2,%YMM0 |
(52) 0x4042e4 VPAND %YMM4,%YMM0,%YMM0 |
(52) 0x4042e8 VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 |
(52) 0x4042f4 VPAND %YMM5,%YMM1,%YMM1 |
(52) 0x4042f8 VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 |
(52) 0x404304 VPTESTMQ %YMM6,%YMM2,%K1 |
(52) 0x40430a VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(52) 0x404310 VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) |
(52) 0x404319 ADD $0xc,%RAX |
(52) 0x40431d CMP $0x180,%RAX |
(52) 0x404323 JB 404250 |
(50) 0x404329 MOV 0x1710(%RSP),%RCX |
(50) 0x404331 MOV 0x398(%RSP),%RAX |
(50) 0x404339 MOV %EAX,%EDX |
(50) 0x40433b SHR $0x1,%EDX |
(50) 0x40433d AND $0x3fffffff,%EDX |
(50) 0x404343 SHR $0x1,%RCX |
(50) 0x404346 AND %R8,%RCX |
(50) 0x404349 ADD %RDX,%RCX |
(50) 0x40434c XOR 0xff8(%RSP),%RCX |
(50) 0x404354 MOV %EAX,%EDX |
(50) 0x404356 AND $0x1,%EDX |
(50) 0x404359 NEG %EDX |
(50) 0x40435b AND %EDI,%EDX |
(50) 0x40435d XOR %RCX,%RDX |
(50) 0x404360 MOV %RDX,0x1710(%RSP) |
(50) 0x404368 MOV $0x1,%EDX |
(50) 0x40436d MOV %RAX,%R10 |
(50) 0x404370 JMP 40438b |
(50) 0x404380 MOV 0x398(%RSP,%RDX,8),%RAX |
(50) 0x404388 INC %RDX |
(50) 0x40438b MOV %RAX,%RCX |
(50) 0x40438e SHR $0xb,%RCX |
(50) 0x404392 MOV %ECX,%ECX |
(50) 0x404394 XOR %RAX,%RCX |
(50) 0x404397 MOV %ECX,%EAX |
(50) 0x404399 SAL $0x7,%EAX |
(50) 0x40439c AND $-0x62d3a980,%EAX |
(50) 0x4043a1 XOR %RCX,%RAX |
(50) 0x4043a4 MOV %EAX,%ECX |
(50) 0x4043a6 SAL $0xf,%ECX |
(50) 0x4043a9 AND $-0x103a0000,%ECX |
(50) 0x4043af XOR %RAX,%RCX |
(50) 0x4043b2 MOV %RCX,%RAX |
(50) 0x4043b5 SHR $0x12,%RAX |
(50) 0x4043b9 XOR %RCX,%RAX |
(50) 0x4043bc VCVTUSI2SS %RAX,%XMM8,%XMM0 |
(50) 0x4043c2 VMULSS 0xad8e(%RIP),%XMM0,%XMM0 |
(50) 0x4043ca VUCOMISS 0xad7a(%RIP),%XMM0 |
(50) 0x4043d2 JAE 4043f6 |
(50) 0x4043d4 MOV 0x20(%RSP),%RAX |
(50) 0x4043d9 VMOVSS %XMM0,(%RAX,%R9,4) |
(50) 0x4043df LEA 0x1(%R9),%RAX |
(50) 0x4043e3 CMP 0x260(%RSP),%R9 |
(50) 0x4043eb MOV %RAX,%R9 |
(50) 0x4043ee JNE 404100 |
0x4043f4 JMP 404450 |
(50) 0x4043f6 VXORPS %XMM1,%XMM1,%XMM1 |
(50) 0x4043fa VMOVSS 0xad4a(%RIP),%XMM0 |
(50) 0x404402 MOV %R10,0x28(%RSP) |
(50) 0x404407 MOV %RDX,0x18(%RSP) |
(50) 0x40440c MOV %R9,0x30(%RSP) |
(50) 0x404411 VZEROUPPER |
(50) 0x404414 CALL 4088d0 <nextafterf> |
(50) 0x404419 MOV 0x30(%RSP),%R9 |
(50) 0x40441e MOV 0x18(%RSP),%RDX |
(50) 0x404423 MOV 0x28(%RSP),%R10 |
(50) 0x404428 MOV $0x7fffffffc0000000,%R8 |
(50) 0x404432 MOV $-0x66f74f21,%EDI |
(50) 0x404437 MOV 0xf8(%RSP),%RSI |
(50) 0x40443f JMP 4043d4 |
0x404450 MOV %RDX,0x1718(%RSP) |
0x404458 CMPQ $0,0xc8(%RSP) |
0x404461 JNE 40449b |
0x404463 JMP 404e68 |
0x404470 MOV $0x270,%EDX |
0x404475 MOV 0xf8(%RSP),%RSI |
0x40447d MOV $-0x66f74f21,%EDI |
0x404482 MOV $0x7fffffffc0000000,%R8 |
0x40448c CMPQ $0,0xc8(%RSP) |
0x404495 JE 404e68 |
0x40449b XOR %R9D,%R9D |
0x40449e XCHG %AX,%AX |
(47) 0x4044a0 CMP $0x270,%RDX |
(47) 0x4044a7 JB 404720 |
(47) 0x4044ad XOR %EAX,%EAX |
(47) 0x4044af VPBROADCASTQ 0xace8(%RIP),%YMM4 |
(47) 0x4044b8 VPBROADCASTQ 0xace7(%RIP),%YMM5 |
(47) 0x4044c1 VPBROADCASTQ 0xace6(%RIP),%YMM6 |
(47) 0x4044ca VPBROADCASTQ 0xace5(%RIP),%YMM7 |
(47) 0x4044d3 NOPW %CS:(%RAX,%RAX,1) |
(48) 0x4044e0 VPBROADCASTQ %R10,%YMM1 |
(48) 0x4044e6 MOV 0x3b8(%RSP,%RAX,1),%R10 |
(48) 0x4044ee VMOVDQU 0x3a0(%RSP,%RAX,1),%YMM0 |
(48) 0x4044f7 VPSRLQ $0x1,%YMM0,%YMM2 |
(48) 0x4044fc VPAND %YMM4,%YMM2,%YMM2 |
(48) 0x404500 VPBLENDD $-0x40,%YMM1,%YMM0,%YMM1 |
(48) 0x404506 VPSRLQ $0x1,%YMM1,%YMM1 |
(48) 0x40450b VPERMQ $-0x6d,%YMM1,%YMM1 |
(48) 0x404511 VPAND %YMM5,%YMM1,%YMM1 |
(48) 0x404515 VPTERNLOGQ $0x56,0x1000(%RSP,%RAX,1),%YMM2,%YMM1 |
(48) 0x404521 VPTESTMQ %YMM6,%YMM0,%K1 |
(48) 0x404527 VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(48) 0x40452d VMOVDQU %YMM1,0x398(%RSP,%RAX,1) |
(48) 0x404536 ADD $0x20,%RAX |
(48) 0x40453a CMP $0x700,%RAX |
(48) 0x404540 JNE 4044e0 |
(47) 0x404542 MOV 0xaa8(%RSP),%RAX |
(47) 0x40454a VMOVDQU 0xaa0(%RSP),%XMM1 |
(47) 0x404553 VPSRLQ $0x1,%XMM1,%XMM2 |
(47) 0x404558 VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(47) 0x40455e VPUNPCKHQDQ 0xaa0(%RSP){1to2},%XMM0,%XMM0 |
(47) 0x404569 VPANDQ 0xac2d(%RIP){1to2},%XMM2,%XMM2 |
(47) 0x404573 VPSRLQ $0x1,%XMM0,%XMM0 |
(47) 0x404578 VPANDQ 0xac26(%RIP){1to2},%XMM0,%XMM0 |
(47) 0x404582 VPTERNLOGQ $0x56,0x1700(%RSP),%XMM2,%XMM0 |
(47) 0x40458e VPTESTMQ 0xac18(%RIP){1to0},%XMM1,%K1 |
(47) 0x404598 VPXORQ 0xac16(%RIP){1to2},%XMM0,%XMM0{%K1} |
(47) 0x4045a2 VMOVDQU %XMM0,0xa98(%RSP) |
(47) 0x4045ab MOV 0xab0(%RSP),%ECX |
(47) 0x4045b2 MOV %ECX,%EDX |
(47) 0x4045b4 SHR $0x1,%EDX |
(47) 0x4045b6 AND $0x3fffffff,%EDX |
(47) 0x4045bc SHR $0x1,%RAX |
(47) 0x4045bf AND %R8,%RAX |
(47) 0x4045c2 ADD %RDX,%RAX |
(47) 0x4045c5 XOR 0x1710(%RSP),%RAX |
(47) 0x4045cd AND $0x1,%ECX |
(47) 0x4045d0 NEG %ECX |
(47) 0x4045d2 AND %EDI,%ECX |
(47) 0x4045d4 XOR %RAX,%RCX |
(47) 0x4045d7 MOV %RCX,0xaa8(%RSP) |
(47) 0x4045df MOV $-0xc,%RAX |
(47) 0x4045e6 NOPW %CS:(%RAX,%RAX,1) |
(49) 0x4045f0 VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 |
(49) 0x4045f9 VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 |
(49) 0x404602 VPSRLQ $0x1,%YMM0,%YMM2 |
(49) 0x404607 VPAND %YMM4,%YMM2,%YMM2 |
(49) 0x40460b VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 |
(49) 0x404617 VPAND %YMM5,%YMM3,%YMM3 |
(49) 0x40461b VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 |
(49) 0x404627 VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 |
(49) 0x404630 VPTESTMQ %YMM6,%YMM0,%K1 |
(49) 0x404636 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(49) 0x40463c VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) |
(49) 0x404645 VPSRLQ $0x1,%YMM1,%YMM0 |
(49) 0x40464a VPAND %YMM4,%YMM0,%YMM0 |
(49) 0x40464e VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 |
(49) 0x40465a VPAND %YMM5,%YMM3,%YMM3 |
(49) 0x40465e VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 |
(49) 0x40466a VPTESTMQ %YMM6,%YMM1,%K1 |
(49) 0x404670 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(49) 0x404676 VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) |
(49) 0x40467f VPSRLQ $0x1,%YMM2,%YMM0 |
(49) 0x404684 VPAND %YMM4,%YMM0,%YMM0 |
(49) 0x404688 VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 |
(49) 0x404694 VPAND %YMM5,%YMM1,%YMM1 |
(49) 0x404698 VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 |
(49) 0x4046a4 VPTESTMQ %YMM6,%YMM2,%K1 |
(49) 0x4046aa VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(49) 0x4046b0 VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) |
(49) 0x4046b9 ADD $0xc,%RAX |
(49) 0x4046bd CMP $0x180,%RAX |
(49) 0x4046c3 JB 4045f0 |
(47) 0x4046c9 MOV 0x1710(%RSP),%RCX |
(47) 0x4046d1 MOV 0x398(%RSP),%RAX |
(47) 0x4046d9 MOV %EAX,%EDX |
(47) 0x4046db SHR $0x1,%EDX |
(47) 0x4046dd AND $0x3fffffff,%EDX |
(47) 0x4046e3 SHR $0x1,%RCX |
(47) 0x4046e6 AND %R8,%RCX |
(47) 0x4046e9 ADD %RDX,%RCX |
(47) 0x4046ec XOR 0xff8(%RSP),%RCX |
(47) 0x4046f4 MOV %EAX,%EDX |
(47) 0x4046f6 AND $0x1,%EDX |
(47) 0x4046f9 NEG %EDX |
(47) 0x4046fb AND %EDI,%EDX |
(47) 0x4046fd XOR %RCX,%RDX |
(47) 0x404700 MOV %RDX,0x1710(%RSP) |
(47) 0x404708 MOV $0x1,%EDX |
(47) 0x40470d MOV %RAX,%R10 |
(47) 0x404710 JMP 40472b |
(47) 0x404720 MOV 0x398(%RSP,%RDX,8),%RAX |
(47) 0x404728 INC %RDX |
(47) 0x40472b MOV %RAX,%RCX |
(47) 0x40472e SHR $0xb,%RCX |
(47) 0x404732 MOV %ECX,%ECX |
(47) 0x404734 XOR %RAX,%RCX |
(47) 0x404737 MOV %ECX,%EAX |
(47) 0x404739 SAL $0x7,%EAX |
(47) 0x40473c AND $-0x62d3a980,%EAX |
(47) 0x404741 XOR %RCX,%RAX |
(47) 0x404744 MOV %EAX,%ECX |
(47) 0x404746 SAL $0xf,%ECX |
(47) 0x404749 AND $-0x103a0000,%ECX |
(47) 0x40474f XOR %RAX,%RCX |
(47) 0x404752 MOV %RCX,%RAX |
(47) 0x404755 SHR $0x12,%RAX |
(47) 0x404759 XOR %RCX,%RAX |
(47) 0x40475c VCVTUSI2SS %RAX,%XMM8,%XMM0 |
(47) 0x404762 VMULSS 0xa9ee(%RIP),%XMM0,%XMM0 |
(47) 0x40476a VUCOMISS 0xa9da(%RIP),%XMM0 |
(47) 0x404772 JAE 4049f2 |
(47) 0x404778 MOV 0x78(%RSP),%RAX |
(47) 0x40477d VMOVSS %XMM0,(%RAX,%R9,4) |
(47) 0x404783 CMP $0x270,%RDX |
(47) 0x40478a JB 404a60 |
(47) 0x404790 XOR %EAX,%EAX |
(47) 0x404792 VPBROADCASTQ 0xaa05(%RIP),%YMM4 |
(47) 0x40479b VPBROADCASTQ 0xaa04(%RIP),%YMM5 |
(47) 0x4047a4 VPBROADCASTQ 0xaa03(%RIP),%YMM6 |
(47) 0x4047ad VPBROADCASTQ 0xaa02(%RIP),%YMM7 |
(47) 0x4047b6 NOPW %CS:(%RAX,%RAX,1) |
(43) 0x4047c0 VPBROADCASTQ %R10,%YMM1 |
(43) 0x4047c6 MOV 0x3b8(%RSP,%RAX,1),%R10 |
(43) 0x4047ce VMOVDQU 0x3a0(%RSP,%RAX,1),%YMM0 |
(43) 0x4047d7 VPSRLQ $0x1,%YMM0,%YMM2 |
(43) 0x4047dc VPAND %YMM4,%YMM2,%YMM2 |
(43) 0x4047e0 VPBLENDD $-0x40,%YMM1,%YMM0,%YMM1 |
(43) 0x4047e6 VPSRLQ $0x1,%YMM1,%YMM1 |
(43) 0x4047eb VPERMQ $-0x6d,%YMM1,%YMM1 |
(43) 0x4047f1 VPAND %YMM5,%YMM1,%YMM1 |
(43) 0x4047f5 VPTERNLOGQ $0x56,0x1000(%RSP,%RAX,1),%YMM2,%YMM1 |
(43) 0x404801 VPTESTMQ %YMM6,%YMM0,%K1 |
(43) 0x404807 VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(43) 0x40480d VMOVDQU %YMM1,0x398(%RSP,%RAX,1) |
(43) 0x404816 ADD $0x20,%RAX |
(43) 0x40481a CMP $0x700,%RAX |
(43) 0x404820 JNE 4047c0 |
(47) 0x404822 MOV 0xaa8(%RSP),%RAX |
(47) 0x40482a VMOVDQU 0xaa0(%RSP),%XMM1 |
(47) 0x404833 VPSRLQ $0x1,%XMM1,%XMM2 |
(47) 0x404838 VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(47) 0x40483e VPUNPCKHQDQ 0xaa0(%RSP){1to2},%XMM0,%XMM0 |
(47) 0x404849 VPANDQ 0xa94d(%RIP){1to2},%XMM2,%XMM2 |
(47) 0x404853 VPSRLQ $0x1,%XMM0,%XMM0 |
(47) 0x404858 VPANDQ 0xa946(%RIP){1to2},%XMM0,%XMM0 |
(47) 0x404862 VPTERNLOGQ $0x56,0x1700(%RSP),%XMM2,%XMM0 |
(47) 0x40486e VPTESTMQ 0xa938(%RIP){1to0},%XMM1,%K1 |
(47) 0x404878 VPXORQ 0xa936(%RIP){1to2},%XMM0,%XMM0{%K1} |
(47) 0x404882 VMOVDQU %XMM0,0xa98(%RSP) |
(47) 0x40488b MOV 0xab0(%RSP),%ECX |
(47) 0x404892 MOV %ECX,%EDX |
(47) 0x404894 SHR $0x1,%EDX |
(47) 0x404896 AND $0x3fffffff,%EDX |
(47) 0x40489c SHR $0x1,%RAX |
(47) 0x40489f AND %R8,%RAX |
(47) 0x4048a2 ADD %RDX,%RAX |
(47) 0x4048a5 XOR 0x1710(%RSP),%RAX |
(47) 0x4048ad AND $0x1,%ECX |
(47) 0x4048b0 NEG %ECX |
(47) 0x4048b2 AND %EDI,%ECX |
(47) 0x4048b4 XOR %RAX,%RCX |
(47) 0x4048b7 MOV %RCX,0xaa8(%RSP) |
(47) 0x4048bf MOV $-0xc,%RAX |
(47) 0x4048c6 NOPW %CS:(%RAX,%RAX,1) |
(44) 0x4048d0 VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 |
(44) 0x4048d9 VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 |
(44) 0x4048e2 VPSRLQ $0x1,%YMM0,%YMM2 |
(44) 0x4048e7 VPAND %YMM4,%YMM2,%YMM2 |
(44) 0x4048eb VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 |
(44) 0x4048f7 VPAND %YMM5,%YMM3,%YMM3 |
(44) 0x4048fb VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 |
(44) 0x404907 VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 |
(44) 0x404910 VPTESTMQ %YMM6,%YMM0,%K1 |
(44) 0x404916 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(44) 0x40491c VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) |
(44) 0x404925 VPSRLQ $0x1,%YMM1,%YMM0 |
(44) 0x40492a VPAND %YMM4,%YMM0,%YMM0 |
(44) 0x40492e VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 |
(44) 0x40493a VPAND %YMM5,%YMM3,%YMM3 |
(44) 0x40493e VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 |
(44) 0x40494a VPTESTMQ %YMM6,%YMM1,%K1 |
(44) 0x404950 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(44) 0x404956 VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) |
(44) 0x40495f VPSRLQ $0x1,%YMM2,%YMM0 |
(44) 0x404964 VPAND %YMM4,%YMM0,%YMM0 |
(44) 0x404968 VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 |
(44) 0x404974 VPAND %YMM5,%YMM1,%YMM1 |
(44) 0x404978 VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 |
(44) 0x404984 VPTESTMQ %YMM6,%YMM2,%K1 |
(44) 0x40498a VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(44) 0x404990 VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) |
(44) 0x404999 ADD $0xc,%RAX |
(44) 0x40499d CMP $0x180,%RAX |
(44) 0x4049a3 JB 4048d0 |
(47) 0x4049a9 MOV 0x1710(%RSP),%RCX |
(47) 0x4049b1 MOV 0x398(%RSP),%RAX |
(47) 0x4049b9 MOV %EAX,%EDX |
(47) 0x4049bb SHR $0x1,%EDX |
(47) 0x4049bd AND $0x3fffffff,%EDX |
(47) 0x4049c3 SHR $0x1,%RCX |
(47) 0x4049c6 AND %R8,%RCX |
(47) 0x4049c9 ADD %RDX,%RCX |
(47) 0x4049cc XOR 0xff8(%RSP),%RCX |
(47) 0x4049d4 MOV %EAX,%EDX |
(47) 0x4049d6 AND $0x1,%EDX |
(47) 0x4049d9 NEG %EDX |
(47) 0x4049db AND %EDI,%EDX |
(47) 0x4049dd XOR %RCX,%RDX |
(47) 0x4049e0 MOV %RDX,0x1710(%RSP) |
(47) 0x4049e8 MOV $0x1,%EDX |
(47) 0x4049ed MOV %RAX,%R10 |
(47) 0x4049f0 JMP 404a6b |
(47) 0x4049f2 VXORPS %XMM1,%XMM1,%XMM1 |
(47) 0x4049f6 VMOVSS 0xa74e(%RIP),%XMM0 |
(47) 0x4049fe MOV %R9,0x30(%RSP) |
(47) 0x404a03 MOV %R10,0x28(%RSP) |
(47) 0x404a08 MOV %RDX,0x18(%RSP) |
(47) 0x404a0d VZEROUPPER |
(47) 0x404a10 CALL 4088d0 <nextafterf> |
(47) 0x404a15 MOV 0x18(%RSP),%RDX |
(47) 0x404a1a MOV 0x28(%RSP),%R10 |
(47) 0x404a1f MOV 0x30(%RSP),%R9 |
(47) 0x404a24 MOV $0x7fffffffc0000000,%R8 |
(47) 0x404a2e MOV $-0x66f74f21,%EDI |
(47) 0x404a33 MOV 0xf8(%RSP),%RSI |
(47) 0x404a3b MOV 0x78(%RSP),%RAX |
(47) 0x404a40 VMOVSS %XMM0,(%RAX,%R9,4) |
(47) 0x404a46 CMP $0x270,%RDX |
(47) 0x404a4d JAE 404790 |
(47) 0x404a53 NOPW %CS:(%RAX,%RAX,1) |
(47) 0x404a60 MOV 0x398(%RSP,%RDX,8),%RAX |
(47) 0x404a68 INC %RDX |
(47) 0x404a6b MOV %RAX,%RCX |
(47) 0x404a6e SHR $0xb,%RCX |
(47) 0x404a72 MOV %ECX,%ECX |
(47) 0x404a74 XOR %RAX,%RCX |
(47) 0x404a77 MOV %ECX,%EAX |
(47) 0x404a79 SAL $0x7,%EAX |
(47) 0x404a7c AND $-0x62d3a980,%EAX |
(47) 0x404a81 XOR %RCX,%RAX |
(47) 0x404a84 MOV %EAX,%ECX |
(47) 0x404a86 SAL $0xf,%ECX |
(47) 0x404a89 AND $-0x103a0000,%ECX |
(47) 0x404a8f XOR %RAX,%RCX |
(47) 0x404a92 MOV %RCX,%RAX |
(47) 0x404a95 SHR $0x12,%RAX |
(47) 0x404a99 XOR %RCX,%RAX |
(47) 0x404a9c VCVTUSI2SS %RAX,%XMM8,%XMM0 |
(47) 0x404aa2 VMULSS 0xa6ae(%RIP),%XMM0,%XMM0 |
(47) 0x404aaa VUCOMISS 0xa69a(%RIP),%XMM0 |
(47) 0x404ab2 JAE 404d32 |
(47) 0x404ab8 MOV 0x70(%RSP),%RAX |
(47) 0x404abd VMOVSS %XMM0,(%RAX,%R9,4) |
(47) 0x404ac3 CMP $0x270,%RDX |
(47) 0x404aca JB 404da0 |
(47) 0x404ad0 XOR %EAX,%EAX |
(47) 0x404ad2 VPBROADCASTQ 0xa6c5(%RIP),%YMM4 |
(47) 0x404adb VPBROADCASTQ 0xa6c4(%RIP),%YMM5 |
(47) 0x404ae4 VPBROADCASTQ 0xa6c3(%RIP),%YMM6 |
(47) 0x404aed VPBROADCASTQ 0xa6c2(%RIP),%YMM7 |
(47) 0x404af6 NOPW %CS:(%RAX,%RAX,1) |
(45) 0x404b00 VPBROADCASTQ %R10,%YMM1 |
(45) 0x404b06 MOV 0x3b8(%RSP,%RAX,1),%R10 |
(45) 0x404b0e VMOVDQU 0x3a0(%RSP,%RAX,1),%YMM0 |
(45) 0x404b17 VPSRLQ $0x1,%YMM0,%YMM2 |
(45) 0x404b1c VPAND %YMM4,%YMM2,%YMM2 |
(45) 0x404b20 VPBLENDD $-0x40,%YMM1,%YMM0,%YMM1 |
(45) 0x404b26 VPSRLQ $0x1,%YMM1,%YMM1 |
(45) 0x404b2b VPERMQ $-0x6d,%YMM1,%YMM1 |
(45) 0x404b31 VPAND %YMM5,%YMM1,%YMM1 |
(45) 0x404b35 VPTERNLOGQ $0x56,0x1000(%RSP,%RAX,1),%YMM2,%YMM1 |
(45) 0x404b41 VPTESTMQ %YMM6,%YMM0,%K1 |
(45) 0x404b47 VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(45) 0x404b4d VMOVDQU %YMM1,0x398(%RSP,%RAX,1) |
(45) 0x404b56 ADD $0x20,%RAX |
(45) 0x404b5a CMP $0x700,%RAX |
(45) 0x404b60 JNE 404b00 |
(47) 0x404b62 MOV 0xaa8(%RSP),%RAX |
(47) 0x404b6a VMOVDQU 0xaa0(%RSP),%XMM1 |
(47) 0x404b73 VPSRLQ $0x1,%XMM1,%XMM2 |
(47) 0x404b78 VEXTRACTI128 $0x1,%YMM0,%XMM0 |
(47) 0x404b7e VPUNPCKHQDQ 0xaa0(%RSP){1to2},%XMM0,%XMM0 |
(47) 0x404b89 VPANDQ 0xa60d(%RIP){1to2},%XMM2,%XMM2 |
(47) 0x404b93 VPSRLQ $0x1,%XMM0,%XMM0 |
(47) 0x404b98 VPANDQ 0xa606(%RIP){1to2},%XMM0,%XMM0 |
(47) 0x404ba2 VPTERNLOGQ $0x56,0x1700(%RSP),%XMM2,%XMM0 |
(47) 0x404bae VPTESTMQ 0xa5f8(%RIP){1to0},%XMM1,%K1 |
(47) 0x404bb8 VPXORQ 0xa5f6(%RIP){1to2},%XMM0,%XMM0{%K1} |
(47) 0x404bc2 VMOVDQU %XMM0,0xa98(%RSP) |
(47) 0x404bcb MOV 0xab0(%RSP),%ECX |
(47) 0x404bd2 MOV %ECX,%EDX |
(47) 0x404bd4 SHR $0x1,%EDX |
(47) 0x404bd6 AND $0x3fffffff,%EDX |
(47) 0x404bdc SHR $0x1,%RAX |
(47) 0x404bdf AND %R8,%RAX |
(47) 0x404be2 ADD %RDX,%RAX |
(47) 0x404be5 XOR 0x1710(%RSP),%RAX |
(47) 0x404bed AND $0x1,%ECX |
(47) 0x404bf0 NEG %ECX |
(47) 0x404bf2 AND %EDI,%ECX |
(47) 0x404bf4 XOR %RAX,%RCX |
(47) 0x404bf7 MOV %RCX,0xaa8(%RSP) |
(47) 0x404bff MOV $-0xc,%RAX |
(47) 0x404c06 NOPW %CS:(%RAX,%RAX,1) |
(46) 0x404c10 VMOVDQU 0xb18(%RSP,%RAX,8),%YMM0 |
(46) 0x404c19 VMOVDQU 0xb38(%RSP,%RAX,8),%YMM1 |
(46) 0x404c22 VPSRLQ $0x1,%YMM0,%YMM2 |
(46) 0x404c27 VPAND %YMM4,%YMM2,%YMM2 |
(46) 0x404c2b VPSRLQ $0x1,0xb10(%RSP,%RAX,8),%YMM3 |
(46) 0x404c37 VPAND %YMM5,%YMM3,%YMM3 |
(46) 0x404c3b VPTERNLOGQ $0x56,0x3f8(%RSP,%RAX,8),%YMM2,%YMM3 |
(46) 0x404c47 VMOVDQU 0xb58(%RSP,%RAX,8),%YMM2 |
(46) 0x404c50 VPTESTMQ %YMM6,%YMM0,%K1 |
(46) 0x404c56 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(46) 0x404c5c VMOVDQU %YMM3,0xb10(%RSP,%RAX,8) |
(46) 0x404c65 VPSRLQ $0x1,%YMM1,%YMM0 |
(46) 0x404c6a VPAND %YMM4,%YMM0,%YMM0 |
(46) 0x404c6e VPSRLQ $0x1,0xb30(%RSP,%RAX,8),%YMM3 |
(46) 0x404c7a VPAND %YMM5,%YMM3,%YMM3 |
(46) 0x404c7e VPTERNLOGQ $0x56,0x418(%RSP,%RAX,8),%YMM0,%YMM3 |
(46) 0x404c8a VPTESTMQ %YMM6,%YMM1,%K1 |
(46) 0x404c90 VPXORQ %YMM7,%YMM3,%YMM3{%K1} |
(46) 0x404c96 VMOVDQU %YMM3,0xb30(%RSP,%RAX,8) |
(46) 0x404c9f VPSRLQ $0x1,%YMM2,%YMM0 |
(46) 0x404ca4 VPAND %YMM4,%YMM0,%YMM0 |
(46) 0x404ca8 VPSRLQ $0x1,0xb50(%RSP,%RAX,8),%YMM1 |
(46) 0x404cb4 VPAND %YMM5,%YMM1,%YMM1 |
(46) 0x404cb8 VPTERNLOGQ $0x56,0x438(%RSP,%RAX,8),%YMM0,%YMM1 |
(46) 0x404cc4 VPTESTMQ %YMM6,%YMM2,%K1 |
(46) 0x404cca VPXORQ %YMM7,%YMM1,%YMM1{%K1} |
(46) 0x404cd0 VMOVDQU %YMM1,0xb50(%RSP,%RAX,8) |
(46) 0x404cd9 ADD $0xc,%RAX |
(46) 0x404cdd CMP $0x180,%RAX |
(46) 0x404ce3 JB 404c10 |
(47) 0x404ce9 MOV 0x1710(%RSP),%RCX |
(47) 0x404cf1 MOV 0x398(%RSP),%RAX |
(47) 0x404cf9 MOV %EAX,%EDX |
(47) 0x404cfb SHR $0x1,%EDX |
(47) 0x404cfd AND $0x3fffffff,%EDX |
(47) 0x404d03 SHR $0x1,%RCX |
(47) 0x404d06 AND %R8,%RCX |
(47) 0x404d09 ADD %RDX,%RCX |
(47) 0x404d0c XOR 0xff8(%RSP),%RCX |
(47) 0x404d14 MOV %EAX,%EDX |
(47) 0x404d16 AND $0x1,%EDX |
(47) 0x404d19 NEG %EDX |
(47) 0x404d1b AND %EDI,%EDX |
(47) 0x404d1d XOR %RCX,%RDX |
(47) 0x404d20 MOV %RDX,0x1710(%RSP) |
(47) 0x404d28 MOV $0x1,%EDX |
(47) 0x404d2d MOV %RAX,%R10 |
(47) 0x404d30 JMP 404dab |
(47) 0x404d32 VXORPS %XMM1,%XMM1,%XMM1 |
(47) 0x404d36 VMOVSS 0xa40e(%RIP),%XMM0 |
(47) 0x404d3e MOV %R9,0x30(%RSP) |
(47) 0x404d43 MOV %R10,0x28(%RSP) |
(47) 0x404d48 MOV %RDX,0x18(%RSP) |
(47) 0x404d4d VZEROUPPER |
(47) 0x404d50 CALL 4088d0 <nextafterf> |
(47) 0x404d55 MOV 0x18(%RSP),%RDX |
(47) 0x404d5a MOV 0x28(%RSP),%R10 |
(47) 0x404d5f MOV 0x30(%RSP),%R9 |
(47) 0x404d64 MOV $0x7fffffffc0000000,%R8 |
(47) 0x404d6e MOV $-0x66f74f21,%EDI |
(47) 0x404d73 MOV 0xf8(%RSP),%RSI |
(47) 0x404d7b MOV 0x70(%RSP),%RAX |
(47) 0x404d80 VMOVSS %XMM0,(%RAX,%R9,4) |
(47) 0x404d86 CMP $0x270,%RDX |
(47) 0x404d8d JAE 404ad0 |
(47) 0x404d93 NOPW %CS:(%RAX,%RAX,1) |
(47) 0x404da0 MOV 0x398(%RSP,%RDX,8),%RAX |
(47) 0x404da8 INC %RDX |
(47) 0x404dab MOV %RAX,%RCX |
(47) 0x404dae SHR $0xb,%RCX |
(47) 0x404db2 MOV %ECX,%ECX |
(47) 0x404db4 XOR %RAX,%RCX |
(47) 0x404db7 MOV %ECX,%EAX |
(47) 0x404db9 SAL $0x7,%EAX |
(47) 0x404dbc AND $-0x62d3a980,%EAX |
(47) 0x404dc1 XOR %RCX,%RAX |
(47) 0x404dc4 MOV %EAX,%ECX |
(47) 0x404dc6 SAL $0xf,%ECX |
(47) 0x404dc9 AND $-0x103a0000,%ECX |
(47) 0x404dcf XOR %RAX,%RCX |
(47) 0x404dd2 MOV %RCX,%RAX |
(47) 0x404dd5 SHR $0x12,%RAX |
(47) 0x404dd9 XOR %RCX,%RAX |
(47) 0x404ddc VCVTUSI2SS %RAX,%XMM8,%XMM0 |
(47) 0x404de2 VMULSS 0xa36e(%RIP),%XMM0,%XMM0 |
(47) 0x404dea VUCOMISS 0xa35a(%RIP),%XMM0 |
(47) 0x404df2 JAE 404e11 |
(47) 0x404df4 MOV 0x68(%RSP),%RAX |
(47) 0x404df9 VMOVSS %XMM0,(%RAX,%R9,4) |
(47) 0x404dff LEA 0x1(%R9),%RAX |
(47) 0x404e03 CMP %RSI,%R9 |
(47) 0x404e06 MOV %RAX,%R9 |
(47) 0x404e09 JNE 4044a0 |
0x404e0f JMP 404e60 |
(47) 0x404e11 VXORPS %XMM1,%XMM1,%XMM1 |
(47) 0x404e15 VMOVSS 0xa32f(%RIP),%XMM0 |
(47) 0x404e1d MOV %R9,0x30(%RSP) |
(47) 0x404e22 MOV %R10,0x28(%RSP) |
(47) 0x404e27 MOV %RDX,0x18(%RSP) |
(47) 0x404e2c VZEROUPPER |
(47) 0x404e2f CALL 4088d0 <nextafterf> |
(47) 0x404e34 MOV 0x18(%RSP),%RDX |
(47) 0x404e39 MOV 0x28(%RSP),%R10 |
(47) 0x404e3e MOV 0x30(%RSP),%R9 |
(47) 0x404e43 MOV $0x7fffffffc0000000,%R8 |
(47) 0x404e4d MOV $-0x66f74f21,%EDI |
(47) 0x404e52 MOV 0xf8(%RSP),%RSI |
(47) 0x404e5a JMP 404df4 |
0x404e60 MOV %RDX,0x1718(%RSP) |
0x404e68 VZEROUPPER |
0x404e6b CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x404e70 MOV %RAX,0xa0(%RSP) |
0x404e78 XOR %EAX,%EAX |
0x404e7a XOR %EDX,%EDX |
0x404e7c MOV 0x90(%RSP),%RCX |
0x404e84 JMP 404eb2 |
(40) 0x404e90 MOV 0xa8(%RSP),%RSI |
(40) 0x404e98 LEA 0x1(%RSI),%EDX |
(40) 0x404e9b MOV 0x90(%RSP),%RCX |
(40) 0x404ea3 ADD %ECX,%EAX |
(40) 0x404ea5 CMP 0xbc(%RSP),%ESI |
(40) 0x404eac JE 405260 |
(40) 0x404eb2 MOV %RDX,0xa8(%RSP) |
(40) 0x404eba IMUL %ECX,%EDX |
(40) 0x404ebd MOV 0x168(%RSP),%RCX |
(40) 0x404ec5 LEA (%RCX,%RDX,1),%ESI |
(40) 0x404ec8 MOV %ESI,0x18(%RSP) |
(40) 0x404ecc LEA (%RCX,%RDX,1),%ESI |
(40) 0x404ecf MOV %ESI,0x30(%RSP) |
(40) 0x404ed3 LEA (%RCX,%RDX,1),%ESI |
(40) 0x404ed6 MOV %ESI,0x60(%RSP) |
(40) 0x404eda LEA (%RCX,%RDX,1),%ESI |
(40) 0x404edd MOV %ESI,0x88(%RSP) |
(40) 0x404ee4 LEA (%RCX,%RDX,1),%ESI |
(40) 0x404ee7 MOV %ESI,0x98(%RSP) |
(40) 0x404eee ADD %EDX,%ECX |
(40) 0x404ef0 MOV %RCX,0x28(%RSP) |
(40) 0x404ef5 MOV 0x160(%RSP),%RCX |
(40) 0x404efd ADD %EDX,%ECX |
(40) 0x404eff MOV %RCX,0xb0(%RSP) |
(40) 0x404f07 XOR %R8D,%R8D |
(40) 0x404f0a JMP 404f35 |
(41) 0x404f0c MOV %R8D,%EDI |
(41) 0x404f0f NOP |
(41) 0x404f10 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
(41) 0x404f14 ADD %EDX,%EDI |
(41) 0x404f16 MOV 0x58(%RSP),%RCX |
(41) 0x404f1b VMOVSS %XMM0,(%RCX,%RDI,4) |
(41) 0x404f20 LEA 0x1(%R8),%RSI |
(41) 0x404f24 CMP 0x198(%RSP),%R8 |
(41) 0x404f2c MOV %RSI,%R8 |
(41) 0x404f2f JE 404e90 |
(41) 0x404f35 VXORPS %XMM0,%XMM0,%XMM0 |
(41) 0x404f39 CMPL $0x8,0xc8(%RSP) |
(41) 0x404f41 MOV 0x20(%RSP),%RCX |
(41) 0x404f46 MOV 0x78(%RSP),%R9 |
(41) 0x404f4b VMOVDQU 0x300(%RSP),%YMM5 |
(41) 0x404f54 VPMOVSXBD 0xa20b(%RIP),%YMM6 |
(41) 0x404f5d VPMOVSXBD 0xa20a(%RIP),%YMM7 |
(41) 0x404f66 VPBROADCASTQ 0xa209(%RIP),%YMM8 |
(41) 0x404f6f VPMOVSXBQ 0xa1cc(%RIP),%YMM9 |
(41) 0x404f78 VPBROADCASTD 0xa1bf(%RIP),%YMM10 |
(41) 0x404f81 JB 405086 |
(41) 0x404f87 MOV %R8D,%EDI |
(41) 0x404f8a MOV %EAX,%R11D |
(41) 0x404f8d MOV 0x188(%RSP),%R10 |
(41) 0x404f95 NOPW %CS:(%RAX,%RAX,1) |
(42) 0x404fa0 LEA 0x5(%R11),%ESI |
(42) 0x404fa4 VPBROADCASTD %R11D,%XMM1 |
(42) 0x404faa VPADDD %YMM6,%YMM1,%YMM2 |
(42) 0x404fae VPERMT2D %YMM1,%YMM7,%YMM2 |
(42) 0x404fb4 VPBROADCASTD %ESI,%YMM3 |
(42) 0x404fba VPBLENDD $0x20,%YMM3,%YMM2,%YMM2 |
(42) 0x404fc0 VPADDD %YMM1,%YMM8,%YMM1 |
(42) 0x404fc4 VPERMT2Q %YMM1,%YMM9,%YMM2 |
(42) 0x404fca VPSUBD %YMM10,%YMM2,%YMM1 |
(42) 0x404fcf LEA (%RCX,%R14,1),%RSI |
(42) 0x404fd3 VPXOR %XMM2,%XMM2,%XMM2 |
(42) 0x404fd7 KXNORW %K0,%K0,%K1 |
(42) 0x404fdb VGATHERDPS (%RSI,%YMM1,4),%YMM2{%K1} |
(42) 0x404fe2 LEA (%R12,%RDI,1),%ESI |
(42) 0x404fe6 VPBROADCASTD %ESI,%YMM1 |
(42) 0x404fec LEA (%R13,%RDI,1),%ESI |
(42) 0x404ff1 VPBROADCASTD %EDI,%XMM3 |
(42) 0x404ff7 VPADDD %YMM5,%YMM3,%YMM4 |
(42) 0x404ffb VPERMT2D %YMM3,%YMM7,%YMM4 |
(42) 0x405001 VPBLENDD $0x20,%YMM1,%YMM4,%YMM1 |
(42) 0x405007 VPBROADCASTD %ESI,%YMM3 |
(42) 0x40500d LEA (%R15,%RDI,1),%ESI |
(42) 0x405011 VPBLENDD $0x40,%YMM3,%YMM1,%YMM1 |
(42) 0x405017 VPBROADCASTD %ESI,%YMM3 |
(42) 0x40501d VPBLENDD $-0x80,%YMM3,%YMM1,%YMM1 |
(42) 0x405023 VPSUBD %YMM10,%YMM1,%YMM1 |
(42) 0x405028 LEA (%R9,%R14,1),%RSI |
(42) 0x40502c VPXOR %XMM3,%XMM3,%XMM3 |
(42) 0x405030 KXNORW %K0,%K0,%K1 |
(42) 0x405034 VGATHERDPS (%RSI,%YMM1,4),%YMM3{%K1} |
(42) 0x40503b VCVTPS2PD %XMM2,%YMM1 |
(42) 0x40503f VEXTRACTF128 $0x1,%YMM2,%XMM2 |
(42) 0x405045 VCVTPS2PD %XMM2,%YMM2 |
(42) 0x405049 VCVTPS2PD %XMM3,%YMM4 |
(42) 0x40504d VEXTRACTF128 $0x1,%YMM3,%XMM3 |
(42) 0x405053 VCVTPS2PD %XMM3,%YMM3 |
(42) 0x405057 VMULPD %YMM2,%YMM3,%YMM2 |
(42) 0x40505b VFMADD231PD %YMM4,%YMM1,%YMM2 |
(42) 0x405060 VEXTRACTF128 $0x1,%YMM2,%XMM1 |
(42) 0x405066 VADDPD %XMM1,%XMM2,%XMM1 |
(42) 0x40506a VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
(42) 0x40506f VADDSD %XMM2,%XMM1,%XMM1 |
(42) 0x405073 VADDSD %XMM1,%XMM0,%XMM0 |
(42) 0x405077 ADD $0x8,%R11D |
(42) 0x40507b ADD %EBX,%EDI |
(42) 0x40507d DEC %R10 |
(42) 0x405080 JNE 404fa0 |
(41) 0x405086 MOV 0x1a0(%RSP),%RCX |
(41) 0x40508e CMP $0x6,%RCX |
(41) 0x405092 MOV 0x238(%RSP),%R9 |
(41) 0x40509a JA 404f0c |
0x405260 VZEROUPPER |
0x405263 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405268 SUB 0xa0(%RSP),%RAX |
0x405270 MOV $0x20c49ba5e353f7cf,%RCX |
0x40527a IMUL %RCX |
0x40527d MOV %RDX,%RAX |
0x405280 SHR $0x3f,%RAX |
0x405284 SAR $0x7,%RDX |
0x405288 ADD %RAX,%RDX |
0x40528b ADD %RDX,0x1b8(%RSP) |
0x405293 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405298 MOV 0x90(%RSP),%RCX |
0x4052a0 MOV %RAX,0xa0(%RSP) |
0x4052a8 XOR %EAX,%EAX |
0x4052aa XOR %EDX,%EDX |
0x4052ac JMP 4052d2 |
(37) 0x4052b0 MOV 0xa8(%RSP),%RSI |
(37) 0x4052b8 LEA 0x1(%RSI),%EDX |
(37) 0x4052bb MOV 0x90(%RSP),%RCX |
(37) 0x4052c3 ADD %ECX,%EAX |
(37) 0x4052c5 CMP 0xbc(%RSP),%ESI |
(37) 0x4052cc JE 405680 |
(37) 0x4052d2 MOV %RDX,0xa8(%RSP) |
(37) 0x4052da IMUL %ECX,%EDX |
(37) 0x4052dd MOV 0x168(%RSP),%RCX |
(37) 0x4052e5 LEA (%RCX,%RDX,1),%ESI |
(37) 0x4052e8 MOV %ESI,0x18(%RSP) |
(37) 0x4052ec LEA (%RCX,%RDX,1),%ESI |
(37) 0x4052ef MOV %ESI,0x30(%RSP) |
(37) 0x4052f3 LEA (%RCX,%RDX,1),%ESI |
(37) 0x4052f6 MOV %ESI,0x60(%RSP) |
(37) 0x4052fa LEA (%RCX,%RDX,1),%ESI |
(37) 0x4052fd MOV %ESI,0x88(%RSP) |
(37) 0x405304 LEA (%RCX,%RDX,1),%ESI |
(37) 0x405307 MOV %ESI,0x98(%RSP) |
(37) 0x40530e ADD %EDX,%ECX |
(37) 0x405310 MOV %RCX,0x28(%RSP) |
(37) 0x405315 MOV 0x160(%RSP),%RCX |
(37) 0x40531d ADD %EDX,%ECX |
(37) 0x40531f MOV %RCX,0xb0(%RSP) |
(37) 0x405327 XOR %R8D,%R8D |
(37) 0x40532a JMP 405358 |
(38) 0x40532c MOV %R8D,%EDI |
(38) 0x40532f NOP |
(38) 0x405330 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
(38) 0x405334 ADD %EDX,%EDI |
(38) 0x405336 MOV 0xd0(%RSP),%RCX |
(38) 0x40533e VMOVSS %XMM0,(%RCX,%RDI,4) |
(38) 0x405343 LEA 0x1(%R8),%RSI |
(38) 0x405347 CMP 0x198(%RSP),%R8 |
(38) 0x40534f MOV %RSI,%R8 |
(38) 0x405352 JE 4052b0 |
(38) 0x405358 VXORPS %XMM0,%XMM0,%XMM0 |
(38) 0x40535c CMPL $0x8,0xc8(%RSP) |
(38) 0x405364 MOV 0x20(%RSP),%RCX |
(38) 0x405369 MOV 0x70(%RSP),%R9 |
(38) 0x40536e VMOVDQU 0x300(%RSP),%YMM5 |
(38) 0x405377 VPMOVSXBD 0x9de8(%RIP),%YMM6 |
(38) 0x405380 VPMOVSXBD 0x9de7(%RIP),%YMM7 |
(38) 0x405389 VPBROADCASTQ 0x9de6(%RIP),%YMM8 |
(38) 0x405392 VPMOVSXBQ 0x9da9(%RIP),%YMM9 |
(38) 0x40539b VPBROADCASTD 0x9d9c(%RIP),%YMM10 |
(38) 0x4053a4 JB 4054a6 |
(38) 0x4053aa MOV %R8D,%EDI |
(38) 0x4053ad MOV %EAX,%R11D |
(38) 0x4053b0 MOV 0x188(%RSP),%R10 |
(38) 0x4053b8 NOPL (%RAX,%RAX,1) |
(39) 0x4053c0 LEA 0x5(%R11),%ESI |
(39) 0x4053c4 VPBROADCASTD %R11D,%XMM1 |
(39) 0x4053ca VPADDD %YMM6,%YMM1,%YMM2 |
(39) 0x4053ce VPERMT2D %YMM1,%YMM7,%YMM2 |
(39) 0x4053d4 VPBROADCASTD %ESI,%YMM3 |
(39) 0x4053da VPBLENDD $0x20,%YMM3,%YMM2,%YMM2 |
(39) 0x4053e0 VPADDD %YMM1,%YMM8,%YMM1 |
(39) 0x4053e4 VPERMT2Q %YMM1,%YMM9,%YMM2 |
(39) 0x4053ea VPSUBD %YMM10,%YMM2,%YMM1 |
(39) 0x4053ef LEA (%RCX,%R14,1),%RSI |
(39) 0x4053f3 VPXOR %XMM2,%XMM2,%XMM2 |
(39) 0x4053f7 KXNORW %K0,%K0,%K1 |
(39) 0x4053fb VGATHERDPS (%RSI,%YMM1,4),%YMM2{%K1} |
(39) 0x405402 LEA (%R12,%RDI,1),%ESI |
(39) 0x405406 VPBROADCASTD %ESI,%YMM1 |
(39) 0x40540c LEA (%R13,%RDI,1),%ESI |
(39) 0x405411 VPBROADCASTD %EDI,%XMM3 |
(39) 0x405417 VPADDD %YMM5,%YMM3,%YMM4 |
(39) 0x40541b VPERMT2D %YMM3,%YMM7,%YMM4 |
(39) 0x405421 VPBLENDD $0x20,%YMM1,%YMM4,%YMM1 |
(39) 0x405427 VPBROADCASTD %ESI,%YMM3 |
(39) 0x40542d LEA (%R15,%RDI,1),%ESI |
(39) 0x405431 VPBLENDD $0x40,%YMM3,%YMM1,%YMM1 |
(39) 0x405437 VPBROADCASTD %ESI,%YMM3 |
(39) 0x40543d VPBLENDD $-0x80,%YMM3,%YMM1,%YMM1 |
(39) 0x405443 VPSUBD %YMM10,%YMM1,%YMM1 |
(39) 0x405448 LEA (%R9,%R14,1),%RSI |
(39) 0x40544c VPXOR %XMM3,%XMM3,%XMM3 |
(39) 0x405450 KXNORW %K0,%K0,%K1 |
(39) 0x405454 VGATHERDPS (%RSI,%YMM1,4),%YMM3{%K1} |
(39) 0x40545b VCVTPS2PD %XMM2,%YMM1 |
(39) 0x40545f VEXTRACTF128 $0x1,%YMM2,%XMM2 |
(39) 0x405465 VCVTPS2PD %XMM2,%YMM2 |
(39) 0x405469 VCVTPS2PD %XMM3,%YMM4 |
(39) 0x40546d VEXTRACTF128 $0x1,%YMM3,%XMM3 |
(39) 0x405473 VCVTPS2PD %XMM3,%YMM3 |
(39) 0x405477 VMULPD %YMM2,%YMM3,%YMM2 |
(39) 0x40547b VFMADD231PD %YMM4,%YMM1,%YMM2 |
(39) 0x405480 VEXTRACTF128 $0x1,%YMM2,%XMM1 |
(39) 0x405486 VADDPD %XMM1,%XMM2,%XMM1 |
(39) 0x40548a VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
(39) 0x40548f VADDSD %XMM2,%XMM1,%XMM1 |
(39) 0x405493 VADDSD %XMM1,%XMM0,%XMM0 |
(39) 0x405497 ADD $0x8,%R11D |
(39) 0x40549b ADD %EBX,%EDI |
(39) 0x40549d DEC %R10 |
(39) 0x4054a0 JNE 4053c0 |
(38) 0x4054a6 MOV 0x1a0(%RSP),%RCX |
(38) 0x4054ae CMP $0x6,%RCX |
(38) 0x4054b2 JA 40532c |
0x405680 VZEROUPPER |
0x405683 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405688 SUB 0xa0(%RSP),%RAX |
0x405690 MOV $0x20c49ba5e353f7cf,%RCX |
0x40569a IMUL %RCX |
0x40569d MOV %RDX,%RAX |
0x4056a0 SHR $0x3f,%RAX |
0x4056a4 SAR $0x7,%RDX |
0x4056a8 ADD %RAX,%RDX |
0x4056ab ADD %RDX,0x1c0(%RSP) |
0x4056b3 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x4056b8 MOV 0x90(%RSP),%RCX |
0x4056c0 MOV %RAX,0xa0(%RSP) |
0x4056c8 XOR %EAX,%EAX |
0x4056ca XOR %EDX,%EDX |
0x4056cc JMP 4056f2 |
(34) 0x4056d0 MOV 0xa8(%RSP),%RSI |
(34) 0x4056d8 LEA 0x1(%RSI),%EDX |
(34) 0x4056db MOV 0x90(%RSP),%RCX |
(34) 0x4056e3 ADD %ECX,%EAX |
(34) 0x4056e5 CMP 0xbc(%RSP),%ESI |
(34) 0x4056ec JE 405aa0 |
(34) 0x4056f2 MOV %RDX,0xa8(%RSP) |
(34) 0x4056fa IMUL %ECX,%EDX |
(34) 0x4056fd MOV 0x168(%RSP),%RCX |
(34) 0x405705 LEA (%RCX,%RDX,1),%ESI |
(34) 0x405708 MOV %ESI,0x18(%RSP) |
(34) 0x40570c LEA (%RCX,%RDX,1),%ESI |
(34) 0x40570f MOV %ESI,0x30(%RSP) |
(34) 0x405713 LEA (%RCX,%RDX,1),%ESI |
(34) 0x405716 MOV %ESI,0x60(%RSP) |
(34) 0x40571a LEA (%RCX,%RDX,1),%ESI |
(34) 0x40571d MOV %ESI,0x88(%RSP) |
(34) 0x405724 LEA (%RCX,%RDX,1),%ESI |
(34) 0x405727 MOV %ESI,0x98(%RSP) |
(34) 0x40572e ADD %EDX,%ECX |
(34) 0x405730 MOV %RCX,0x28(%RSP) |
(34) 0x405735 MOV 0x160(%RSP),%RCX |
(34) 0x40573d ADD %EDX,%ECX |
(34) 0x40573f MOV %RCX,0xb0(%RSP) |
(34) 0x405747 XOR %R8D,%R8D |
(34) 0x40574a JMP 405778 |
(35) 0x40574c MOV %R8D,%EDI |
(35) 0x40574f NOP |
(35) 0x405750 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
(35) 0x405754 ADD %EDX,%EDI |
(35) 0x405756 MOV 0x80(%RSP),%RCX |
(35) 0x40575e VMOVSS %XMM0,(%RCX,%RDI,4) |
(35) 0x405763 LEA 0x1(%R8),%RSI |
(35) 0x405767 CMP 0x198(%RSP),%R8 |
(35) 0x40576f MOV %RSI,%R8 |
(35) 0x405772 JE 4056d0 |
(35) 0x405778 VXORPS %XMM0,%XMM0,%XMM0 |
(35) 0x40577c CMPL $0x8,0xc8(%RSP) |
(35) 0x405784 MOV 0x20(%RSP),%RCX |
(35) 0x405789 MOV 0x68(%RSP),%R9 |
(35) 0x40578e VMOVDQU 0x300(%RSP),%YMM5 |
(35) 0x405797 VPMOVSXBD 0x99c8(%RIP),%YMM6 |
(35) 0x4057a0 VPMOVSXBD 0x99c7(%RIP),%YMM7 |
(35) 0x4057a9 VPBROADCASTQ 0x99c6(%RIP),%YMM8 |
(35) 0x4057b2 VPMOVSXBQ 0x9989(%RIP),%YMM9 |
(35) 0x4057bb VPBROADCASTD 0x997c(%RIP),%YMM10 |
(35) 0x4057c4 JB 4058c6 |
(35) 0x4057ca MOV %R8D,%EDI |
(35) 0x4057cd MOV %EAX,%R11D |
(35) 0x4057d0 MOV 0x188(%RSP),%R10 |
(35) 0x4057d8 NOPL (%RAX,%RAX,1) |
(36) 0x4057e0 LEA 0x5(%R11),%ESI |
(36) 0x4057e4 VPBROADCASTD %R11D,%XMM1 |
(36) 0x4057ea VPADDD %YMM6,%YMM1,%YMM2 |
(36) 0x4057ee VPERMT2D %YMM1,%YMM7,%YMM2 |
(36) 0x4057f4 VPBROADCASTD %ESI,%YMM3 |
(36) 0x4057fa VPBLENDD $0x20,%YMM3,%YMM2,%YMM2 |
(36) 0x405800 VPADDD %YMM1,%YMM8,%YMM1 |
(36) 0x405804 VPERMT2Q %YMM1,%YMM9,%YMM2 |
(36) 0x40580a VPSUBD %YMM10,%YMM2,%YMM1 |
(36) 0x40580f LEA (%RCX,%R14,1),%RSI |
(36) 0x405813 KXNORW %K0,%K0,%K1 |
(36) 0x405817 VPXOR %XMM2,%XMM2,%XMM2 |
(36) 0x40581b VGATHERDPS (%RSI,%YMM1,4),%YMM2{%K1} |
(36) 0x405822 LEA (%R12,%RDI,1),%ESI |
(36) 0x405826 VPBROADCASTD %ESI,%YMM1 |
(36) 0x40582c LEA (%R13,%RDI,1),%ESI |
(36) 0x405831 VPBROADCASTD %EDI,%XMM3 |
(36) 0x405837 VPADDD %YMM5,%YMM3,%YMM4 |
(36) 0x40583b VPERMT2D %YMM3,%YMM7,%YMM4 |
(36) 0x405841 VPBLENDD $0x20,%YMM1,%YMM4,%YMM1 |
(36) 0x405847 VPBROADCASTD %ESI,%YMM3 |
(36) 0x40584d LEA (%R15,%RDI,1),%ESI |
(36) 0x405851 VPBLENDD $0x40,%YMM3,%YMM1,%YMM1 |
(36) 0x405857 VPBROADCASTD %ESI,%YMM3 |
(36) 0x40585d VPBLENDD $-0x80,%YMM3,%YMM1,%YMM1 |
(36) 0x405863 VPSUBD %YMM10,%YMM1,%YMM1 |
(36) 0x405868 LEA (%R9,%R14,1),%RSI |
(36) 0x40586c KXNORW %K0,%K0,%K1 |
(36) 0x405870 VPXOR %XMM3,%XMM3,%XMM3 |
(36) 0x405874 VGATHERDPS (%RSI,%YMM1,4),%YMM3{%K1} |
(36) 0x40587b VCVTPS2PD %XMM2,%YMM1 |
(36) 0x40587f VEXTRACTF128 $0x1,%YMM2,%XMM2 |
(36) 0x405885 VCVTPS2PD %XMM2,%YMM2 |
(36) 0x405889 VCVTPS2PD %XMM3,%YMM4 |
(36) 0x40588d VEXTRACTF128 $0x1,%YMM3,%XMM3 |
(36) 0x405893 VCVTPS2PD %XMM3,%YMM3 |
(36) 0x405897 VMULPD %YMM2,%YMM3,%YMM2 |
(36) 0x40589b VFMADD231PD %YMM4,%YMM1,%YMM2 |
(36) 0x4058a0 VEXTRACTF128 $0x1,%YMM2,%XMM1 |
(36) 0x4058a6 VADDPD %XMM1,%XMM2,%XMM1 |
(36) 0x4058aa VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
(36) 0x4058af VADDSD %XMM2,%XMM1,%XMM1 |
(36) 0x4058b3 VADDSD %XMM1,%XMM0,%XMM0 |
(36) 0x4058b7 ADD $0x8,%R11D |
(36) 0x4058bb ADD %EBX,%EDI |
(36) 0x4058bd DEC %R10 |
(36) 0x4058c0 JNE 4057e0 |
(35) 0x4058c6 MOV 0x1a0(%RSP),%RCX |
(35) 0x4058ce CMP $0x6,%RCX |
(35) 0x4058d2 JA 40574c |
0x405aa0 VZEROUPPER |
0x405aa3 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405aa8 SUB 0xa0(%RSP),%RAX |
0x405ab0 MOV $0x20c49ba5e353f7cf,%RCX |
0x405aba IMUL %RCX |
0x405abd MOV %RDX,0x18(%RSP) |
0x405ac2 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405ac7 MOV %RAX,0x28(%RSP) |
0x405acc MOV 0x260(%RSP),%RCX |
0x405ad4 MOV 0xd0(%RSP),%RDX |
0x405adc LEA (%RDX,%RCX,4),%RAX |
0x405ae0 MOV 0x38(%RSP),%RSI |
0x405ae5 CMP %RSI,%RAX |
0x405ae8 JB 406b60 |
0x405aee LEA (%RSI,%RCX,4),%RAX |
0x405af2 CMP %RDX,%RAX |
0x405af5 JB 406b60 |
0x405afb MOV %RSI,%RAX |
0x405afe MOV %RDX,%RCX |
0x405b01 XOR %EDX,%EDX |
0x405b03 MOV 0x158(%RSP),%R9 |
0x405b0b NOPL (%RAX,%RAX,1) |
(33) 0x405b10 MOV %RAX,%RSI |
(33) 0x405b13 XOR %EDI,%EDI |
(33) 0x405b15 MOV 0xc8(%RSP),%R8 |
(33) 0x405b1d NOPL (%RAX) |
(32) 0x405b20 VMOVD (%RCX,%RDI,4),%XMM0 |
(32) 0x405b25 VMOVD %XMM0,(%RSI) |
(32) 0x405b29 INC %RDI |
(32) 0x405b2c ADD %R9,%RSI |
(32) 0x405b2f CMP %RDI,%R8 |
(32) 0x405b32 JNE 405b20 |
(33) 0x405b34 LEA 0x1(%RDX),%RSI |
(33) 0x405b38 ADD 0x268(%RSP),%RCX |
(33) 0x405b40 ADD $0x4,%RAX |
(33) 0x405b44 CMP 0x170(%RSP),%RDX |
(33) 0x405b4c MOV %RSI,%RDX |
(33) 0x405b4f JNE 405b10 |
0x405b51 MOV 0x18(%RSP),%RCX |
0x405b56 MOV %RCX,%RAX |
0x405b59 SHR $0x3f,%RAX |
0x405b5d SAR $0x7,%RCX |
0x405b61 ADD %RAX,%RCX |
0x405b64 ADD %RCX,0x1c8(%RSP) |
0x405b6c VZEROUPPER |
0x405b6f CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405b74 SUB 0x28(%RSP),%RAX |
0x405b79 MOV $0x20c49ba5e353f7cf,%RCX |
0x405b83 IMUL %RCX |
0x405b86 MOV %RDX,%RAX |
0x405b89 SHR $0x3f,%RAX |
0x405b8d SAR $0x7,%RDX |
0x405b91 ADD %RAX,%RDX |
0x405b94 ADD %RDX,0x1d0(%RSP) |
0x405b9c CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x405ba1 MOV %RAX,0x2a0(%RSP) |
0x405ba9 MOVL $0,0x18(%RSP) |
0x405bb1 XOR %EAX,%EAX |
0x405bb3 MOV 0x90(%RSP),%RDX |
0x405bbb JMP 405be6 |
(26) 0x405bc0 MOV 0x228(%RSP),%RAX |
(26) 0x405bc8 LEA 0x1(%RAX),%ECX |
(26) 0x405bcb MOV 0x90(%RSP),%RDX |
(26) 0x405bd3 ADD %EDX,0x18(%RSP) |
(26) 0x405bd7 CMP 0xbc(%RSP),%EAX |
(26) 0x405bde MOV %ECX,%EAX |
(26) 0x405be0 JE 406000 |
(26) 0x405be6 MOV %EAX,%ESI |
(26) 0x405be8 IMUL %EDX,%ESI |
(26) 0x405beb MOV %RAX,0x228(%RSP) |
(26) 0x405bf3 IMUL 0x128(%RSP),%EAX |
(26) 0x405bfb MOV %EAX,0x28(%RSP) |
(26) 0x405bff MOV 0x168(%RSP),%RCX |
(26) 0x405c07 LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c0a MOV %EAX,0x88(%RSP) |
(26) 0x405c11 LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c14 MOV %EAX,0x98(%RSP) |
(26) 0x405c1b LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c1e MOV %EAX,0xb0(%RSP) |
(26) 0x405c25 LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c28 MOV %EAX,0xa8(%RSP) |
(26) 0x405c2f LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c32 MOV %EAX,0xa0(%RSP) |
(26) 0x405c39 LEA (%RCX,%RSI,1),%EAX |
(26) 0x405c3c MOV %RAX,0x30(%RSP) |
(26) 0x405c41 ADD 0x160(%RSP),%ESI |
(26) 0x405c48 MOV %RSI,0x60(%RSP) |
(26) 0x405c4d XOR %R9D,%R9D |
(26) 0x405c50 JMP 405c8d |
(27) 0x405c52 MOV %R9D,%R8D |
(27) 0x405c55 MOV 0x50(%RSP),%RBX |
(27) 0x405c5a NOPW (%RAX,%RAX,1) |
(27) 0x405c60 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
(27) 0x405c64 ADD 0x28(%RSP),%R8D |
(27) 0x405c69 VMULSS 0x24c(%RSP),%XMM0,%XMM0 |
(27) 0x405c72 VMOVSS %XMM0,(%RBX,%R8,4) |
(27) 0x405c78 LEA 0x1(%R9),%RCX |
(27) 0x405c7c CMP 0x170(%RSP),%R9 |
(27) 0x405c84 MOV %RCX,%R9 |
(27) 0x405c87 JE 405bc0 |
(27) 0x405c8d VPXOR %XMM0,%XMM0,%XMM0 |
(27) 0x405c91 CMPL $0x8,0xc8(%RSP) |
(27) 0x405c99 MOV 0x58(%RSP),%R10 |
(27) 0x405c9e VMOVDQU 0x360(%RSP),%YMM6 |
(27) 0x405ca7 VMOVDQU 0x340(%RSP),%YMM7 |
(27) 0x405cb0 VPMOVSXBD 0x94af(%RIP),%YMM8 |
(27) 0x405cb9 VPMOVSXBD 0x94ae(%RIP),%YMM9 |
(27) 0x405cc2 VPBROADCASTQ 0x94ad(%RIP),%YMM10 |
(27) 0x405ccb VPMOVSXBQ 0x9470(%RIP),%YMM11 |
(27) 0x405cd4 VPBROADCASTD 0x9463(%RIP),%YMM12 |
(27) 0x405cdd MOV 0x248(%RSP),%EAX |
(27) 0x405ce4 MOV 0x270(%RSP),%RSI |
(27) 0x405cec MOV 0x38(%RSP),%RBX |
(27) 0x405cf1 JB 405dde |
(27) 0x405cf7 MOV %R9D,%EDI |
(27) 0x405cfa MOV 0x18(%RSP),%R8D |
(27) 0x405cff MOV 0x188(%RSP),%R11 |
(27) 0x405d07 NOPW (%RAX,%RAX,1) |
(28) 0x405d10 LEA 0x5(%R8),%ECX |
(28) 0x405d14 LEA (%RSI,%RDI,1),%EDX |
(28) 0x405d17 VPBROADCASTD %R8D,%XMM1 |
(28) 0x405d1d VPADDD %YMM1,%YMM8,%YMM2 |
(28) 0x405d21 VPERMT2D %YMM1,%YMM9,%YMM2 |
(28) 0x405d27 VPBROADCASTD %ECX,%YMM3 |
(28) 0x405d2d VPBLENDD $0x20,%YMM3,%YMM2,%YMM2 |
(28) 0x405d33 VPADDD %YMM1,%YMM10,%YMM1 |
(28) 0x405d37 VPERMT2Q %YMM1,%YMM11,%YMM2 |
(28) 0x405d3d VPSUBD %YMM12,%YMM2,%YMM1 |
(28) 0x405d42 LEA (%R10,%R14,1),%RCX |
(28) 0x405d46 KXNORW %K0,%K0,%K1 |
(28) 0x405d4a VPXOR %XMM2,%XMM2,%XMM2 |
(28) 0x405d4e VGATHERDPS (%RCX,%YMM1,4),%YMM2{%K1} |
(28) 0x405d55 VCVTPS2PD %XMM2,%YMM1 |
(28) 0x405d59 VPBROADCASTD %EDI,%XMM3 |
(28) 0x405d5f VPADDD %YMM7,%YMM3,%YMM4 |
(28) 0x405d63 VPERMT2D %YMM3,%YMM9,%YMM4 |
(28) 0x405d69 VPBROADCASTD %EDX,%YMM5 |
(28) 0x405d6f VPBLENDD $0x20,%YMM5,%YMM4,%YMM4 |
(28) 0x405d75 VPADDD %YMM3,%YMM6,%YMM3 |
(28) 0x405d79 VPERMT2Q %YMM3,%YMM11,%YMM4 |
(28) 0x405d7f VPSUBD %YMM12,%YMM4,%YMM3 |
(28) 0x405d84 LEA (%RBX,%R14,1),%RCX |
(28) 0x405d88 KXNORW %K0,%K0,%K1 |
(28) 0x405d8c VPXOR %XMM4,%XMM4,%XMM4 |
(28) 0x405d90 VGATHERDPS (%RCX,%YMM3,4),%YMM4{%K1} |
(28) 0x405d97 VEXTRACTF128 $0x1,%YMM2,%XMM2 |
(28) 0x405d9d VCVTPS2PD %XMM2,%YMM2 |
(28) 0x405da1 VCVTPS2PD %XMM4,%YMM3 |
(28) 0x405da5 VEXTRACTF128 $0x1,%YMM4,%XMM4 |
(28) 0x405dab VCVTPS2PD %XMM4,%YMM4 |
(28) 0x405daf VMULPD %YMM2,%YMM4,%YMM2 |
(28) 0x405db3 VFMADD231PD %YMM3,%YMM1,%YMM2 |
(28) 0x405db8 VEXTRACTF128 $0x1,%YMM2,%XMM1 |
(28) 0x405dbe VADDPD %XMM1,%XMM2,%XMM1 |
(28) 0x405dc2 VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
(28) 0x405dc7 VADDSD %XMM2,%XMM1,%XMM1 |
(28) 0x405dcb VADDSD %XMM1,%XMM0,%XMM0 |
(28) 0x405dcf ADD $0x8,%R8D |
(28) 0x405dd3 ADD %EAX,%EDI |
(28) 0x405dd5 DEC %R11 |
(28) 0x405dd8 JNE 405d10 |
(27) 0x405dde MOV 0x1a0(%RSP),%RCX |
(27) 0x405de6 CMP $0x6,%RCX |
(27) 0x405dea JA 405c52 |
0x406000 VZEROUPPER |
0x406003 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x406008 SUB 0x2a0(%RSP),%RAX |
0x406010 MOV $0x20c49ba5e353f7cf,%RCX |
0x40601a IMUL %RCX |
0x40601d MOV %RDX,%RAX |
0x406020 SHR $0x3f,%RAX |
0x406024 SAR $0x7,%RDX |
0x406028 ADD %RAX,%RDX |
0x40602b ADD %RDX,0x1d8(%RSP) |
0x406033 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x406038 MOV %RAX,0x228(%RSP) |
0x406040 LEA 0x1c(%RBX),%RDX |
0x406044 MOV $0x1,%ESI |
0x406049 MOV 0x40(%RSP),%RAX |
0x40604e MOV %RBX,%RDI |
0x406051 XOR %R8D,%R8D |
0x406054 MOV 0x240(%RSP),%EBX |
0x40605b JMP 4060b3 |
(21) 0x406060 MOV 0x110(%RSP),%RAX |
(21) 0x406068 MOV 0x30(%RSP),%R8 |
(21) 0x40606d VMOVSS %XMM11,(%RAX,%R8,4) |
(21) 0x406073 MOV 0x158(%RSP),%RAX |
(21) 0x40607b MOV 0xb0(%RSP),%RDX |
(21) 0x406083 ADD %RAX,%RDX |
(21) 0x406086 MOV 0xa8(%RSP),%RSI |
(21) 0x40608e INC %RSI |
(21) 0x406091 ADD %RAX,%RDI |
(21) 0x406094 MOV 0x98(%RSP),%RCX |
(21) 0x40609c ADD %RAX,%RCX |
(21) 0x40609f MOV %RCX,%RAX |
(21) 0x4060a2 CMP 0x170(%RSP),%R8 |
(21) 0x4060aa MOV %R9,%R8 |
(21) 0x4060ad JE 406450 |
(21) 0x4060b3 MOV %RAX,0x98(%RSP) |
(21) 0x4060bb LEA 0x1(%R8),%R9 |
(21) 0x4060bf VMOVSS 0x9081(%RIP),%XMM8 |
(21) 0x4060c7 CMP $0x8,%R9 |
(21) 0x4060cb JB 406110 |
(21) 0x4060cd MOV %RSI,%RAX |
(21) 0x4060d0 SHR $0x3,%RAX |
(21) 0x4060d4 MOV %RDX,%RCX |
(21) 0x4060d7 VMOVSS 0x9069(%RIP),%XMM8 |
(21) 0x4060df NOP |
(25) 0x4060e0 VMAXSS -0x1c(%RCX),%XMM8,%XMM0 |
(25) 0x4060e5 VMAXSS -0x18(%RCX),%XMM0,%XMM0 |
(25) 0x4060ea VMAXSS -0x14(%RCX),%XMM0,%XMM0 |
(25) 0x4060ef VMAXSS -0x10(%RCX),%XMM0,%XMM0 |
(25) 0x4060f4 VMAXSS -0xc(%RCX),%XMM0,%XMM0 |
(25) 0x4060f9 VMAXSS -0x8(%RCX),%XMM0,%XMM0 |
(25) 0x4060fe VMAXSS -0x4(%RCX),%XMM0,%XMM0 |
(25) 0x406103 VMAXSS (%RCX),%XMM0,%XMM8 |
(25) 0x406107 ADD $0x20,%RCX |
(25) 0x40610b DEC %RAX |
(25) 0x40610e JNE 4060e0 |
(21) 0x406110 MOV %R9,%RCX |
(21) 0x406113 AND $-0x8,%RCX |
(21) 0x406117 CMP %R9,%RCX |
(21) 0x40611a JE 40612d |
(21) 0x40611c MOV %RCX,%RAX |
(21) 0x40611f NOP |
(24) 0x406120 VMAXSS (%RDI,%RAX,4),%XMM8,%XMM8 |
(24) 0x406125 INC %RAX |
(24) 0x406128 CMP %RAX,%RSI |
(24) 0x40612b JNE 406120 |
(21) 0x40612d MOV %RSI,0xa8(%RSP) |
(21) 0x406135 MOV %RDX,0xb0(%RSP) |
(21) 0x40613d VPBROADCASTQ %RCX,%YMM9 |
(21) 0x406143 TEST %RCX,%RCX |
(21) 0x406146 MOV %R8,0x30(%RSP) |
(21) 0x40614b MOV %R9,0x60(%RSP) |
(21) 0x406150 MOV %RCX,0x88(%RSP) |
(21) 0x406158 MOV %RDI,0x28(%RSP) |
(21) 0x40615d VPBROADCASTQ %R9,%YMM12 |
(21) 0x406163 JE 4061e0 |
(21) 0x406165 LEA -0x1(%RCX),%RSI |
(21) 0x406169 MOV 0xc0(%RSP),%RAX |
(21) 0x406171 IMUL %R8,%RAX |
(21) 0x406175 MOV %RAX,0x18(%RSP) |
(21) 0x40617a VBROADCASTSS %XMM8,%YMM11 |
(21) 0x40617f VPXOR %XMM10,%XMM10,%XMM10 |
(21) 0x406184 XOR %EDI,%EDI |
(21) 0x406186 NOPW %CS:(%RAX,%RAX,1) |
(23) 0x406190 MOV 0x28(%RSP),%RAX |
(23) 0x406195 VMOVUPS (%RAX,%RDI,4),%YMM0 |
(23) 0x40619a VSUBPS %YMM11,%YMM0,%YMM0 |
(23) 0x40619f MOV $0x407900,%RAX |
(23) 0x4061a6 CALL %RAX |
(23) 0x4061a8 VADDPS %YMM0,%YMM10,%YMM10 |
(23) 0x4061ac ADD $0x8,%RDI |
(23) 0x4061b0 CMP %RSI,%RDI |
(23) 0x4061b3 JLE 406190 |
(21) 0x4061b5 VPCMPEQQ %YMM9,%YMM12,%K0 |
(21) 0x4061bb KMOVD %K0,%ECX |
(21) 0x4061bf MOV 0x88(%RSP),%RDX |
(21) 0x4061c7 MOV %RDX,%RAX |
(21) 0x4061ca TEST $0x1,%CL |
(21) 0x4061cd MOV 0x28(%RSP),%RDI |
(21) 0x4061d2 MOV 0x18(%RSP),%RCX |
(21) 0x4061d7 JE 4061f8 |
(21) 0x4061d9 JMP 406260 |
(21) 0x4061e0 MOV 0xc0(%RSP),%RCX |
(21) 0x4061e8 IMUL %R8,%RCX |
(21) 0x4061ec VBROADCASTSS %XMM8,%YMM11 |
(21) 0x4061f1 VPXOR %XMM10,%XMM10,%XMM10 |
(21) 0x4061f6 XOR %EAX,%EAX |
(21) 0x4061f8 VPBROADCASTQ %RAX,%YMM0 |
(21) 0x4061fe VPSUBQ %YMM0,%YMM12,%YMM1 |
(21) 0x406202 VPSUBQ %YMM0,%YMM12,%YMM0 |
(21) 0x406206 VPCMPNLEUQ 0x8e8f(%RIP),%YMM0,%K0 |
(21) 0x406211 VPCMPNLEUQ 0x8ea4(%RIP),%YMM1,%K1 |
(21) 0x40621c KSHIFTLB $0x4,%K1,%K1 |
(21) 0x406222 KORB %K1,%K0,%K1 |
(21) 0x406226 KMOVW %K1,0x18(%RSP) |
(21) 0x40622c ADD %RAX,%RCX |
(21) 0x40622f MOV 0x50(%RSP),%RAX |
(21) 0x406234 VMOVUPS (%RAX,%RCX,4),%YMM0{%K1}{z} |
(21) 0x40623b VSUBPS %YMM11,%YMM0,%YMM0 |
(21) 0x406240 VPMOVM2D %K1,%YMM1 |
(21) 0x406246 CALL 407ca0 <__svml_expf8_mask_e9> |
(21) 0x40624c MOV 0x88(%RSP),%RDX |
(21) 0x406254 KMOVW 0x18(%RSP),%K1 |
(21) 0x40625a VADDPS %YMM0,%YMM10,%YMM10{%K1} |
(21) 0x406260 VEXTRACTF128 $0x1,%YMM10,%XMM0 |
(21) 0x406266 VADDPS %XMM0,%XMM10,%XMM0 |
(21) 0x40626a VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
(21) 0x40626f VADDPS %XMM1,%XMM0,%XMM0 |
(21) 0x406273 VMOVSHDUP %XMM0,%XMM1 |
(21) 0x406277 VADDSS %XMM1,%XMM0,%XMM11 |
(21) 0x40627b VMOVSS 0x8ec9(%RIP),%XMM0 |
(21) 0x406283 VDIVSS %XMM11,%XMM0,%XMM1 |
(21) 0x406288 TEST %RDX,%RDX |
(21) 0x40628b JE 406340 |
(21) 0x406291 LEA -0x1(%RDX),%RAX |
(21) 0x406295 MOV %RAX,0x18(%RSP) |
(21) 0x40629a MOV 0xc0(%RSP),%RAX |
(21) 0x4062a2 IMUL 0x30(%RSP),%RAX |
(21) 0x4062a8 MOV %RAX,0xa0(%RSP) |
(21) 0x4062b0 VBROADCASTSS %XMM8,%YMM10 |
(21) 0x4062b5 VBROADCASTSS %XMM1,%YMM8 |
(21) 0x4062ba XOR %EDI,%EDI |
(21) 0x4062bc MOV 0x98(%RSP),%RSI |
(21) 0x4062c4 NOPW %CS:(%RAX,%RAX,1) |
(22) 0x4062d0 MOV 0x28(%RSP),%RAX |
(22) 0x4062d5 VMOVUPS (%RAX,%RDI,4),%YMM0 |
(22) 0x4062da VSUBPS %YMM10,%YMM0,%YMM0 |
(22) 0x4062df MOV $0x407900,%RAX |
(22) 0x4062e6 CALL %RAX |
(22) 0x4062e8 VMULPS %YMM0,%YMM8,%YMM0 |
(22) 0x4062ec VMOVUPS %YMM0,(%RSI,%RDI,4) |
(22) 0x4062f1 ADD $0x8,%RDI |
(22) 0x4062f5 CMP 0x18(%RSP),%RDI |
(22) 0x4062fa JLE 4062d0 |
(21) 0x4062fc MOV 0x60(%RSP),%R9 |
(21) 0x406301 VPBROADCASTQ %R9,%YMM0 |
(21) 0x406307 VPCMPEQQ %YMM9,%YMM0,%K0 |
(21) 0x40630d KMOVD %K0,%EAX |
(21) 0x406311 TEST $0x1,%AL |
(21) 0x406313 MOV 0x28(%RSP),%RDI |
(21) 0x406318 MOV 0x88(%RSP),%RAX |
(21) 0x406320 MOV 0xa0(%RSP),%RSI |
(21) 0x406328 JE 406365 |
(21) 0x40632a CMP 0xc0(%RSP),%R9 |
(21) 0x406332 JAE 406060 |
(21) 0x406338 JMP 4063e2 |
(21) 0x406340 MOV 0x60(%RSP),%RAX |
(21) 0x406345 VPBROADCASTQ %RAX,%YMM0 |
(21) 0x40634b MOV 0xc0(%RSP),%RSI |
(21) 0x406353 IMUL 0x30(%RSP),%RSI |
(21) 0x406359 VBROADCASTSS %XMM8,%YMM10 |
(21) 0x40635e VBROADCASTSS %XMM1,%YMM8 |
(21) 0x406363 XOR %EAX,%EAX |
(21) 0x406365 VPBROADCASTQ %RAX,%YMM1 |
(21) 0x40636b VPSUBQ %YMM1,%YMM0,%YMM2 |
(21) 0x40636f VPSUBQ %YMM1,%YMM0,%YMM0 |
(21) 0x406373 VPCMPNLEUQ 0x8d22(%RIP),%YMM0,%K0 |
(21) 0x40637e VPCMPNLEUQ 0x8d37(%RIP),%YMM2,%K1 |
(21) 0x406389 KSHIFTLB $0x4,%K1,%K1 |
(21) 0x40638f KORB %K1,%K0,%K1 |
(21) 0x406393 KMOVW %K1,0x18(%RSP) |
(21) 0x406399 ADD %RAX,%RSI |
(21) 0x40639c MOV 0x50(%RSP),%RAX |
(21) 0x4063a1 VMOVUPS (%RAX,%RSI,4),%YMM0{%K1}{z} |
(21) 0x4063a8 VSUBPS %YMM10,%YMM0,%YMM0 |
(21) 0x4063ad VPMOVM2D %K1,%YMM1 |
(21) 0x4063b3 CALL 407ca0 <__svml_expf8_mask_e9> |
(21) 0x4063b9 MOV 0x60(%RSP),%R9 |
(21) 0x4063be VMULPS %YMM0,%YMM8,%YMM0 |
(21) 0x4063c2 MOV 0x40(%RSP),%RAX |
(21) 0x4063c7 KMOVW 0x18(%RSP),%K1 |
(21) 0x4063cd VMOVUPS %YMM0,(%RAX,%RSI,4){%K1} |
(21) 0x4063d4 CMP 0xc0(%RSP),%R9 |
(21) 0x4063dc JAE 406060 |
(21) 0x4063e2 MOV 0x2a8(%RSP),%RDI |
(21) 0x4063ea MOV 0x30(%RSP),%RAX |
(21) 0x4063ef IMUL %RAX,%RDI |
(21) 0x4063f3 ADD $0x4,%RDI |
(21) 0x4063f7 MOV 0x2b0(%RSP),%RDX |
(21) 0x4063ff SUB %RAX,%RDX |
(21) 0x406402 MOV $0x3fffffffc,%RAX |
(21) 0x40640c AND %RAX,%RDI |
(21) 0x40640f ADD 0x40(%RSP),%RDI |
(21) 0x406414 SAL $0x2,%RDX |
(21) 0x406418 AND %RAX,%RDX |
(21) 0x40641b ADD $0x4,%RDX |
(21) 0x40641f XOR %ESI,%ESI |
(21) 0x406421 VMOVSS %XMM11,0x18(%RSP) |
(21) 0x406427 VZEROUPPER |
(21) 0x40642a CALL 4097a0 <_intel_fast_memset> |
(21) 0x40642f VMOVSS 0x18(%RSP),%XMM11 |
(21) 0x406435 MOV 0x60(%RSP),%R9 |
(21) 0x40643a MOV 0x28(%RSP),%RDI |
(21) 0x40643f JMP 406060 |
0x406450 VZEROUPPER |
0x406453 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x406458 SUB 0x228(%RSP),%RAX |
0x406460 MOV $0x20c49ba5e353f7cf,%RCX |
0x40646a IMUL %RCX |
0x40646d MOV %RDX,%RAX |
0x406470 SHR $0x3f,%RAX |
0x406474 SAR $0x7,%RDX |
0x406478 ADD %RAX,%RDX |
0x40647b ADD %RDX,0x1e0(%RSP) |
0x406483 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x406488 MOV %RAX,0xa0(%RSP) |
0x406490 XOR %EAX,%EAX |
0x406492 XOR %ECX,%ECX |
0x406494 MOV 0x128(%RSP),%RSI |
0x40649c JMP 4064c2 |
0x4064a0 MOV 0xa8(%RSP),%RDX |
0x4064a8 LEA 0x1(%RDX),%ECX |
0x4064ab MOV 0x128(%RSP),%RSI |
0x4064b3 ADD %ESI,%EAX |
0x4064b5 CMP 0xbc(%RSP),%EDX |
0x4064bc JE 406890 |
0x4064c2 MOV %ECX,%EDX |
0x4064c4 IMUL %ESI,%EDX |
0x4064c7 MOV %RCX,0xa8(%RSP) |
0x4064cf MOV %ECX,%ESI |
0x4064d1 IMUL 0x90(%RSP),%ESI |
0x4064d9 MOV 0x2b8(%RSP),%RCX |
0x4064e1 LEA (%RCX,%RDX,1),%EDI |
0x4064e4 MOV %EDI,0x30(%RSP) |
0x4064e8 LEA (%RCX,%RDX,1),%EDI |
0x4064eb MOV %EDI,0x60(%RSP) |
0x4064ef LEA (%RCX,%RDX,1),%EDI |
0x4064f2 MOV %EDI,0x88(%RSP) |
0x4064f9 LEA (%RCX,%RDX,1),%EDI |
0x4064fc MOV %EDI,0x98(%RSP) |
0x406503 LEA (%RCX,%RDX,1),%EDI |
0x406506 MOV %EDI,0xb0(%RSP) |
0x40650d ADD %EDX,%ECX |
0x40650f MOV %RCX,0x28(%RSP) |
0x406514 ADD 0x244(%RSP),%EDX |
0x40651b MOV %RDX,0x18(%RSP) |
0x406520 XOR %R9D,%R9D |
0x406523 JMP 40655a |
0x406525 MOV %R9D,%R8D |
0x406528 NOPL (%RAX,%RAX,1) |
0x406530 ADD %ESI,%R8D |
0x406533 VCVTSD2SS %XMM0,%XMM0,%XMM0 |
0x406537 MOV 0xe8(%RSP),%RCX |
0x40653f VMOVSS %XMM0,(%RCX,%R8,4) |
0x406545 LEA 0x1(%R9),%RCX |
0x406549 CMP 0x198(%RSP),%R9 |
0x406551 MOV %RCX,%R9 |
0x406554 JE 4064a0 |
0x40655a VPXOR %XMM0,%XMM0,%XMM0 |
0x40655e CMPL $0x8,0xc0(%RSP) |
0x406566 VMOVDQU 0x300(%RSP),%YMM5 |
0x40656f VPMOVSXBD 0x8bf0(%RIP),%YMM6 |
0x406578 VPMOVSXBD 0x8bef(%RIP),%YMM7 |
0x406581 VPBROADCASTQ 0x8bee(%RIP),%YMM8 |
0x40658a VPMOVSXBQ 0x8bb1(%RIP),%YMM9 |
0x406593 VPBROADCASTD 0x8ba4(%RIP),%YMM10 |
0x40659c MOV 0x80(%RSP),%RDX |
0x4065a4 MOV 0x40(%RSP),%R10 |
0x4065a9 JB 4066a6 |
0x4065af MOV %R9D,%EDI |
0x4065b2 MOV %EAX,%R8D |
0x4065b5 MOV 0x2d8(%RSP),%R11 |
0x4065bd NOPL (%RAX) |
(20) 0x4065c0 LEA 0x5(%R8),%ECX |
(20) 0x4065c4 VPBROADCASTD %R8D,%XMM1 |
(20) 0x4065ca VPADDD %YMM6,%YMM1,%YMM2 |
(20) 0x4065ce VPERMT2D %YMM1,%YMM7,%YMM2 |
(20) 0x4065d4 VPBROADCASTD %ECX,%YMM3 |
(20) 0x4065da VPBLENDD $0x20,%YMM3,%YMM2,%YMM2 |
(20) 0x4065e0 VPADDD %YMM1,%YMM8,%YMM1 |
(20) 0x4065e4 VPERMT2Q %YMM1,%YMM9,%YMM2 |
(20) 0x4065ea VPSUBD %YMM10,%YMM2,%YMM1 |
(20) 0x4065ef LEA (%R10,%R14,1),%RCX |
(20) 0x4065f3 KXNORW %K0,%K0,%K1 |
(20) 0x4065f7 VPXOR %XMM2,%XMM2,%XMM2 |
(20) 0x4065fb VGATHERDPS (%RCX,%YMM1,4),%YMM2{%K1} |
(20) 0x406602 LEA (%R12,%RDI,1),%ECX |
(20) 0x406606 VPBROADCASTD %ECX,%YMM1 |
(20) 0x40660c LEA (%R13,%RDI,1),%ECX |
(20) 0x406611 VPBROADCASTD %EDI,%XMM3 |
(20) 0x406617 VPADDD %YMM5,%YMM3,%YMM4 |
(20) 0x40661b VPERMT2D %YMM3,%YMM7,%YMM4 |
(20) 0x406621 VPBLENDD $0x20,%YMM1,%YMM4,%YMM1 |
(20) 0x406627 VPBROADCASTD %ECX,%YMM3 |
(20) 0x40662d LEA (%R15,%RDI,1),%ECX |
(20) 0x406631 VPBLENDD $0x40,%YMM3,%YMM1,%YMM1 |
(20) 0x406637 VPBROADCASTD %ECX,%YMM3 |
(20) 0x40663d VPBLENDD $-0x80,%YMM3,%YMM1,%YMM1 |
(20) 0x406643 VPSUBD %YMM10,%YMM1,%YMM1 |
(20) 0x406648 LEA (%RDX,%R14,1),%RCX |
(20) 0x40664c KXNORW %K0,%K0,%K1 |
(20) 0x406650 VPXOR %XMM3,%XMM3,%XMM3 |
(20) 0x406654 VGATHERDPS (%RCX,%YMM1,4),%YMM3{%K1} |
(20) 0x40665b VCVTPS2PD %XMM2,%YMM1 |
(20) 0x40665f VEXTRACTF128 $0x1,%YMM2,%XMM2 |
(20) 0x406665 VCVTPS2PD %XMM2,%YMM2 |
(20) 0x406669 VCVTPS2PD %XMM3,%YMM4 |
(20) 0x40666d VEXTRACTF128 $0x1,%YMM3,%XMM3 |
(20) 0x406673 VCVTPS2PD %XMM3,%YMM3 |
(20) 0x406677 VMULPD %YMM2,%YMM3,%YMM2 |
(20) 0x40667b VFMADD231PD %YMM4,%YMM1,%YMM2 |
(20) 0x406680 VEXTRACTF128 $0x1,%YMM2,%XMM1 |
(20) 0x406686 VADDPD %XMM1,%XMM2,%XMM1 |
(20) 0x40668a VSHUFPD $0x1,%XMM1,%XMM1,%XMM2 |
(20) 0x40668f VADDSD %XMM2,%XMM1,%XMM1 |
(20) 0x406693 VADDSD %XMM1,%XMM0,%XMM0 |
(20) 0x406697 ADD $0x8,%R8D |
(20) 0x40669b ADD %EBX,%EDI |
(20) 0x40669d DEC %R11 |
(20) 0x4066a0 JNE 4065c0 |
0x4066a6 MOV 0x2f8(%RSP),%RCX |
0x4066ae CMP $0x6,%RCX |
0x4066b2 JA 406525 |
0x406890 VZEROUPPER |
0x406893 CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> |
0x406898 SUB 0xa0(%RSP),%RAX |
0x4068a0 MOV $0x20c49ba5e353f7cf,%RCX |
0x4068aa IMUL %RCX |
0x4068ad MOV %RDX,0x18(%RSP) |
0x4068b2 MOVB $0x1,0x28(%RSP) |
0x4068b7 MOV 0x220(%RSP),%RAX |
0x4068bf CMP 0x298(%RSP),%RAX |
0x4068c7 JNE 4069b9 |
0x4068cd MOV 0x50(%RSP),%RDI |
0x4068d2 MOV 0x40(%RSP),%RSI |
0x4068d7 MOV 0x110(%RSP),%RDX |
0x4068df MOV 0x128(%RSP),%RCX |
0x4068e7 VMOVSS 0x886d(%RIP),%XMM0 |
0x4068ef CALL 402f00 <_Z15ValidateSoftmaxPKfS0_S0_if> |
0x4068f4 MOV %AL,0x28(%RSP) |
0x4068f8 MOV $0x418280,%EDI |
0x4068fd MOV $0x40f3f0,%ESI |
0x406902 MOV $0x14,%EDX |
0x406907 CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x40690c MOV $0x418280,%EDI |
0x406911 MOV $0x40f405,%ESI |
0x406916 MOV $0x1b,%EDX |
0x40691b CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x406920 MOVZX 0x28(%RSP),%ECX |
0x406925 TEST %CL,%CL |
0x406927 MOV $0x40f424,%ESI |
0x40692c MOV $0x40f421,%EAX |
0x406931 CMOVNE %RAX,%RSI |
0x406935 MOV %ECX,%EAX |
0x406937 XOR $0x1,%AL |
0x406939 MOVZX %AL,%EAX |
0x40693c LEA 0x2(,%RAX,4),%RDX |
0x406944 MOV $0x418280,%EDI |
0x406949 CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x40694e MOV $0x418280,%EDI |
0x406953 MOV $0x40f392,%ESI |
0x406958 MOV $0x1,%EDX |
0x40695d CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x406962 MOV $0x418280,%EDI |
0x406967 MOV $0x40f42b,%ESI |
0x40696c MOV $0x15,%EDX |
0x406971 CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x406976 MOV $0x418280,%EDI |
0x40697b MOV $0x40f441,%ESI |
0x406980 MOV $0x3,%EDX |
0x406985 CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x40698a MOV $0x418280,%EDI |
0x40698f MOV $0x40f392,%ESI |
0x406994 MOV $0x1,%EDX |
0x406999 CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> |
0x40699e CMPB $0,0x28(%RSP) |
0x4069a3 MOV $0x1,%EAX |
0x4069a8 MOV 0xf4(%RSP),%ECX |
0x4069af CMOVE %EAX,%ECX |
0x4069b2 MOV %ECX,0xf4(%RSP) |
0x4069b9 LEA 0x1720(%RSP),%RDI |
0x4069c1 CALL 402100 <_ZNSt13random_device7_M_finiEv@plt> |
0x4069c6 MOV 0x110(%RSP),%RDI |
0x4069ce TEST %RDI,%RDI |
0x4069d1 JE 4069e3 |
0x4069d3 MOV 0x1e8(%RSP),%RSI |
0x4069db SUB %RDI,%RSI |
0x4069de CALL 402130 <_ZdlPvm@plt> |
0x4069e3 MOV 0x40(%RSP),%RDI |
0x4069e8 TEST %RDI,%RDI |
0x4069eb JE 4069fd |
0x4069ed MOV 0x1f0(%RSP),%RSI |
0x4069f5 SUB %RDI,%RSI |
0x4069f8 CALL 402130 <_ZdlPvm@plt> |
0x4069fd MOV 0x50(%RSP),%RDI |
0x406a02 TEST %RDI,%RDI |
0x406a05 JE 406a17 |
0x406a07 MOV 0x1f8(%RSP),%RSI |
0x406a0f SUB %RDI,%RSI |
0x406a12 CALL 402130 <_ZdlPvm@plt> |
0x406a17 MOV 0x80(%RSP),%RDI |
0x406a1f TEST %RDI,%RDI |
0x406a22 JE 406a34 |
0x406a24 MOV 0x130(%RSP),%RSI |
0x406a2c SUB %RDI,%RSI |
0x406a2f CALL 402130 <_ZdlPvm@plt> |
0x406a34 MOV 0x38(%RSP),%RDI |
0x406a39 TEST %RDI,%RDI |
0x406a3c JE 406a4e |
0x406a3e MOV 0x138(%RSP),%RSI |
0x406a46 SUB %RDI,%RSI |
0x406a49 CALL 402130 <_ZdlPvm@plt> |
0x406a4e MOV 0xd0(%RSP),%RDI |
0x406a56 TEST %RDI,%RDI |
0x406a59 JE 406a6b |
0x406a5b MOV 0x140(%RSP),%RSI |
0x406a63 SUB %RDI,%RSI |
0x406a66 CALL 402130 <_ZdlPvm@plt> |
0x406a6b MOV 0x58(%RSP),%RDI |
0x406a70 TEST %RDI,%RDI |
0x406a73 JE 406a85 |
0x406a75 MOV 0x148(%RSP),%RSI |
0x406a7d SUB %RDI,%RSI |
0x406a80 CALL 402130 <_ZdlPvm@plt> |
0x406a85 MOV 0xe8(%RSP),%RDI |
0x406a8d TEST %RDI,%RDI |
0x406a90 JE 406aa2 |
0x406a92 MOV 0x150(%RSP),%RSI |
0x406a9a SUB %RDI,%RSI |
0x406a9d CALL 402130 <_ZdlPvm@plt> |
0x406aa2 MOV 0x68(%RSP),%RDI |
0x406aa7 TEST %RDI,%RDI |
0x406aaa JE 406abc |
0x406aac MOV 0x200(%RSP),%RSI |
0x406ab4 SUB %RDI,%RSI |
0x406ab7 CALL 402130 <_ZdlPvm@plt> |
0x406abc MOV 0x70(%RSP),%RDI |
0x406ac1 TEST %RDI,%RDI |
0x406ac4 JE 406ad6 |
0x406ac6 MOV 0x208(%RSP),%RSI |
0x406ace SUB %RDI,%RSI |
0x406ad1 CALL 402130 <_ZdlPvm@plt> |
0x406ad6 MOV 0x78(%RSP),%RDI |
0x406adb TEST %RDI,%RDI |
0x406ade JE 406af0 |
0x406ae0 MOV 0x210(%RSP),%RSI |
0x406ae8 SUB %RDI,%RSI |
0x406aeb CALL 402130 <_ZdlPvm@plt> |
0x406af0 MOV 0x20(%RSP),%RDI |
0x406af5 TEST %RDI,%RDI |
0x406af8 JE 406b0a |
0x406afa MOV 0x120(%RSP),%RSI |
0x406b02 SUB %RDI,%RSI |
0x406b05 CALL 402130 <_ZdlPvm@plt> |
0x406b0a CMPB $0,0x28(%RSP) |
0x406b0f JE 406f85 |
0x406b15 MOV 0x18(%RSP),%RCX |
0x406b1a MOV %RCX,%RAX |
0x406b1d SHR $0x3f,%RAX |
0x406b21 SAR $0x7,%RCX |
0x406b25 ADD %RAX,%RCX |
0x406b28 ADD %RCX,0x1b0(%RSP) |
0x406b30 MOV 0x220(%RSP),%RCX |
0x406b38 INC %RCX |
0x406b3b MOV %RCX,0x220(%RSP) |
0x406b43 CMP 0x290(%RSP),%RCX |
0x406b4b JNE 403920 |
0x406b60 MOV %RDX,%RAX |
0x406b63 XOR %ECX,%ECX |
0x406b65 MOV 0x288(%RSP),%R8 |
0x406b6d MOV 0x280(%RSP),%R9 |
0x406b75 MOV 0x158(%RSP),%R10 |
0x406b7d JMP 406b9d |
(29) 0x406b80 LEA 0x1(%RCX),%RDX |
(29) 0x406b84 ADD 0x268(%RSP),%RAX |
(29) 0x406b8c CMP 0x170(%RSP),%RCX |
(29) 0x406b94 MOV %RDX,%RCX |
(29) 0x406b97 JE 405b51 |
(29) 0x406b9d TEST %R8,%R8 |
(29) 0x406ba0 JE 406ca0 |
(29) 0x406ba6 VPBROADCASTQ %RCX,%YMM0 |
(29) 0x406bac TEST %R9,%R9 |
(29) 0x406baf JE 406cb0 |
(29) 0x406bb5 XOR %EDX,%EDX |
(29) 0x406bb7 VMOVDQU 0x320(%RSP),%YMM9 |
(29) 0x406bc0 VPMOVSXBQ 0x8587(%RIP),%YMM10 |
(29) 0x406bc9 VPMOVSXBQ 0x858e(%RIP),%YMM11 |
(29) 0x406bd2 VPMOVSXBQ 0x8589(%RIP),%YMM12 |
(29) 0x406bdb VPMOVSXBQ 0x8570(%RIP),%YMM13 |
(29) 0x406be4 MOV 0x38(%RSP),%RSI |
(29) 0x406be9 NOPL (%RAX) |
(31) 0x406bf0 VPBROADCASTQ %RDX,%YMM1 |
(31) 0x406bf6 VPADDQ %YMM1,%YMM12,%YMM2 |
(31) 0x406bfa VPADDQ %YMM1,%YMM13,%YMM3 |
(31) 0x406bfe VPADDQ %YMM1,%YMM10,%YMM4 |
(31) 0x406c02 VPMULLQ %YMM4,%YMM9,%YMM4 |
(31) 0x406c08 VPMULLQ %YMM3,%YMM9,%YMM3 |
(31) 0x406c0e VPMULLQ %YMM2,%YMM9,%YMM2 |
(31) 0x406c14 VPADDQ %YMM1,%YMM11,%YMM1 |
(31) 0x406c18 VPMULLQ %YMM1,%YMM9,%YMM1 |
(31) 0x406c1e VPADDQ %YMM0,%YMM1,%YMM1 |
(31) 0x406c22 VPADDQ %YMM0,%YMM2,%YMM2 |
(31) 0x406c26 VPADDQ %YMM0,%YMM3,%YMM3 |
(31) 0x406c2a VPADDQ %YMM0,%YMM4,%YMM4 |
(31) 0x406c2e VMOVUPS (%RAX,%RDX,4),%XMM5 |
(31) 0x406c33 VMOVUPS 0x10(%RAX,%RDX,4),%XMM6 |
(31) 0x406c39 VMOVUPS 0x20(%RAX,%RDX,4),%XMM7 |
(31) 0x406c3f VMOVUPS 0x30(%RAX,%RDX,4),%XMM8 |
(31) 0x406c45 KXNORW %K0,%K0,%K1 |
(31) 0x406c49 VSCATTERQPS %XMM5,(%RSI,%YMM4,4){%K1} |
(31) 0x406c50 KXNORW %K0,%K0,%K1 |
(31) 0x406c54 VSCATTERQPS %XMM6,(%RSI,%YMM3,4){%K1} |
(31) 0x406c5b KXNORW %K0,%K0,%K1 |
(31) 0x406c5f VSCATTERQPS %XMM7,(%RSI,%YMM2,4){%K1} |
(31) 0x406c66 KXNORW %K0,%K0,%K1 |
(31) 0x406c6a VSCATTERQPS %XMM8,(%RSI,%YMM1,4){%K1} |
(31) 0x406c71 ADD $0x10,%RDX |
(31) 0x406c75 CMP %R9,%RDX |
(31) 0x406c78 JB 406bf0 |
(29) 0x406c7e MOV %R9,%RSI |
(29) 0x406c81 MOV %R9,%RDX |
(29) 0x406c84 CMP %R9D,%R8D |
(29) 0x406c87 JNE 406cb2 |
(29) 0x406c89 MOV 0xc8(%RSP),%RDI |
(29) 0x406c91 CMP %R8D,%EDI |
(29) 0x406c94 JE 406b80 |
(29) 0x406c9a JMP 406d11 |
(29) 0x406ca0 XOR %EDX,%EDX |
(29) 0x406ca2 MOV 0xc8(%RSP),%RDI |
(29) 0x406caa JMP 406d11 |
(29) 0x406cb0 XOR %ESI,%ESI |
(29) 0x406cb2 VMOVDQU 0x320(%RSP),%YMM3 |
(29) 0x406cbb VPMOVSXBQ 0x848c(%RIP),%YMM4 |
(29) 0x406cc4 MOV 0x38(%RSP),%RDX |
(29) 0x406cc9 NOPL (%RAX) |
(30) 0x406cd0 VMOVUPS (%RAX,%RSI,4),%XMM1 |
(30) 0x406cd5 VPBROADCASTQ %RSI,%YMM2 |
(30) 0x406cdb VPADDQ %YMM4,%YMM2,%YMM2 |
(30) 0x406cdf VPMULLQ %YMM2,%YMM3,%YMM2 |
(30) 0x406ce5 VPADDQ %YMM0,%YMM2,%YMM2 |
(30) 0x406ce9 KXNORW %K0,%K0,%K1 |
(30) 0x406ced VSCATTERQPS %XMM1,(%RDX,%YMM2,4){%K1} |
(30) 0x406cf4 ADD $0x4,%RSI |
(30) 0x406cf8 CMP %R8,%RSI |
(30) 0x406cfb JB 406cd0 |
(29) 0x406cfd MOV %R8,%RDX |
(29) 0x406d00 MOV 0xc8(%RSP),%RDI |
(29) 0x406d08 CMP %R8D,%EDI |
(29) 0x406d0b JE 406b80 |
(29) 0x406d11 MOV 0xc0(%RSP),%RSI |
(29) 0x406d19 IMUL %RDX,%RSI |
(29) 0x406d1d ADD %RCX,%RSI |
(29) 0x406d20 MOV 0x38(%RSP),%R11 |
(29) 0x406d25 LEA (%R11,%RSI,4),%RSI |
(29) 0x406d29 NOPL (%RAX) |
(18) 0x406d30 VMOVD (%RAX,%RDX,4),%XMM0 |
(18) 0x406d35 VMOVD %XMM0,(%RSI) |
(18) 0x406d39 INC %RDX |
(18) 0x406d3c ADD %R10,%RSI |
(18) 0x406d3f CMP %RDX,%RDI |
(18) 0x406d42 JNE 406d30 |
(29) 0x406d44 JMP 406b80 |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/cmath: 1661 - 1661 |
-------------------------------------------------------------------------------- |
1661: { return __builtin_nextafterf(__x, __y); } |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/random.h: 140 - 1648 |
-------------------------------------------------------------------------------- |
140: __res %= __m; |
[...] |
1618: random_device() { _M_init("default"); } |
[...] |
1625: { _M_fini(); } |
[...] |
1648: { return this->_M_getval(); } |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_construct.h: 119 - 119 |
-------------------------------------------------------------------------------- |
119: ::new((void*)__p) _Tp(std::forward<_Args>(__args)...); |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/chrono: 227 - 666 |
-------------------------------------------------------------------------------- |
227: static_cast<_CR>(__d.count()) / static_cast<_CR>(_CF::den))); |
[...] |
575: __r += __d.count(); |
[...] |
666: return __cd(__cd(__lhs).count() - __cd(__rhs).count()); |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ext/new_allocator.h: 127 - 145 |
-------------------------------------------------------------------------------- |
127: return static_cast<_Tp*>(::operator new(__n * sizeof(_Tp))); |
[...] |
145: ::operator delete(__p |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/char_traits.h: 357 - 437 |
-------------------------------------------------------------------------------- |
357: { __c1 = __c2; } |
[...] |
399: return __builtin_strlen(__s); |
[...] |
437: return static_cast<char_type*>(__builtin_memcpy(__s1, __s2, __n)); |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/basic_string.h: 165 - 245 |
-------------------------------------------------------------------------------- |
165: : allocator_type(__a), _M_p(__dat) { } |
[...] |
191: { _M_string_length = __length; } |
192: |
193: pointer |
194: _M_data() const |
195: { return _M_dataplus._M_p; } |
[...] |
230: { return _M_data() == _M_local_data(); } |
[...] |
239: if (!_M_is_local()) |
240: _M_destroy(_M_allocated_capacity); |
241: } |
242: |
243: void |
244: _M_destroy(size_type __size) throw() |
245: { _Alloc_traits::deallocate(_M_get_allocator(), _M_data(), __size + 1); } |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/random.tcc: 327 - 3370 |
-------------------------------------------------------------------------------- |
327: _M_x[0] = __detail::__mod<_UIntType, |
328: __detail::_Shift<_UIntType, __w>::__value>(__sd); |
329: |
330: for (size_t __i = 1; __i < state_size; ++__i) |
331: { |
332: _UIntType __x = _M_x[__i - 1]; |
333: __x ^= __x >> (__w - 2); |
334: __x *= __f; |
335: __x += __detail::__mod<_UIntType, __n>(__i); |
336: _M_x[__i] = __detail::__mod<_UIntType, |
337: __detail::_Shift<_UIntType, __w>::__value>(__x); |
338: } |
339: _M_p = state_size; |
[...] |
401: for (size_t __k = 0; __k < (__n - __m); ++__k) |
402: { |
403: _UIntType __y = ((_M_x[__k] & __upper_mask) |
404: | (_M_x[__k + 1] & __lower_mask)); |
405: _M_x[__k] = (_M_x[__k + __m] ^ (__y >> 1) |
406: ^ ((__y & 0x01) ? __a : 0)); |
407: } |
408: |
409: for (size_t __k = (__n - __m); __k < (__n - 1); ++__k) |
410: { |
411: _UIntType __y = ((_M_x[__k] & __upper_mask) |
412: | (_M_x[__k + 1] & __lower_mask)); |
413: _M_x[__k] = (_M_x[__k + (__m - __n)] ^ (__y >> 1) |
414: ^ ((__y & 0x01) ? __a : 0)); |
415: } |
416: |
417: _UIntType __y = ((_M_x[__n - 1] & __upper_mask) |
418: | (_M_x[0] & __lower_mask)); |
419: _M_x[__n - 1] = (_M_x[__m - 1] ^ (__y >> 1) |
420: ^ ((__y & 0x01) ? __a : 0)); |
[...] |
455: if (_M_p >= state_size) |
456: _M_gen_rand(); |
457: |
458: // Calculate o(x(i)). |
459: result_type __z = _M_x[_M_p++]; |
460: __z ^= (__z >> __u) & __d; |
461: __z ^= (__z << __s) & __b; |
462: __z ^= (__z << __t) & __c; |
463: __z ^= (__z >> __l); |
[...] |
3366: __sum += _RealType(__urng() - __urng.min()) * __tmp; |
3367: __tmp *= __r; |
3368: } |
3369: __ret = __sum / __tmp; |
3370: if (__builtin_expect(__ret >= _RealType(1), 0)) |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 336 - 1769 |
-------------------------------------------------------------------------------- |
336: _M_impl._M_end_of_storage - _M_impl._M_start); |
[...] |
346: return __n != 0 ? _Tr::allocate(_M_impl, __n) : pointer(); |
[...] |
353: if (__p) |
[...] |
363: this->_M_impl._M_end_of_storage = this->_M_impl._M_start + __n; |
[...] |
1046: return *(this->_M_impl._M_start + __n); |
[...] |
1769: if (__n > _S_max_size(_Tp_alloc_type(__a))) |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/ostream: 616 - 616 |
-------------------------------------------------------------------------------- |
616: __ostream_insert(__out, __s, |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_algobase.h: 924 - 1115 |
-------------------------------------------------------------------------------- |
924: *__first = __tmp; |
[...] |
1115: if (__n <= 0) |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_uninitialized.h: 602 - 602 |
-------------------------------------------------------------------------------- |
602: ++__first; |
/home/eoseret/llm-attention/attention_v2.cpp: 26 - 317 |
-------------------------------------------------------------------------------- |
26: for (unsigned int i = 0; i < M; ++i) { |
27: for (unsigned int j = 0; j < N; ++j) { //vectorized |
28: double sum = 0.0; |
29: #pragma clang loop vectorize(enable) |
30: for (unsigned int k = 0; k < K; ++k) { //vectorized |
31: sum += (double)A[i * K + k] * (double)B[k * N + j]; |
32: } |
33: C[i * N + j] = alpha * static_cast<float>(sum); |
[...] |
43: for (int row = 0; row < N; ++row) { |
44: const float *S_row = &S[row * N]; |
45: |
46: float max_val = -FLT_MAX; |
47: for (int idx = 0; idx <= row; ++idx) // vectorised |
48: if (S_row[idx] > max_val) max_val = S_row[idx]; |
49: |
50: float sum = 0.0f; |
51: #pragma clang loop vectorize(enable) |
52: for (int idx = 0; idx <= row; ++idx) // vectorised |
53: sum += expf(S_row[idx] - max_val); |
54: |
55: for (int idx = 0; idx <= row; ++idx) //vectorised |
56: P[row * N + idx] = expf(S_row[idx] - max_val) / sum; |
57: |
58: for (int idx = row + 1; idx < N; ++idx) |
59: P[row * N + idx] = 0.0f; |
60: |
61: D[row] = sum; |
[...] |
98: if (argc < 4) { |
[...] |
144: for (size_t r = 0; r < rept; r++) { |
[...] |
160: std::mt19937 rng(rd()); |
161: std::uniform_real_distribution<float> dist(0.0f, 1.0f); |
162: |
163: for (size_t i = 0; i < elemsX; ++i) h_X[i] = dist(rng); |
164: for (size_t i = 0; i < elemsW; ++i) { |
165: h_WQ[i] = dist(rng); |
166: h_WK[i] = dist(rng); |
167: h_WV[i] = dist(rng); |
[...] |
175: start = std::chrono::steady_clock::now(); |
[...] |
185: end = std::chrono::steady_clock::now(); |
[...] |
194: start = std::chrono::steady_clock::now(); |
[...] |
204: end = std::chrono::steady_clock::now(); |
[...] |
213: start = std::chrono::steady_clock::now(); |
[...] |
223: end = std::chrono::steady_clock::now(); |
[...] |
233: start = std::chrono::steady_clock::now(); |
234: #endif |
235: |
236: for (int i = 0; i < context_size; ++i) |
237: for (int j = 0; j < dim; ++j)// vectorized |
238: h_KT[j * context_size + i] = h_K[i * dim + j]; |
[...] |
245: end = std::chrono::steady_clock::now(); |
[...] |
254: start = std::chrono::steady_clock::now(); |
[...] |
264: end = std::chrono::steady_clock::now(); |
[...] |
273: start = std::chrono::steady_clock::now(); |
[...] |
283: end = std::chrono::steady_clock::now(); |
[...] |
292: start = std::chrono::steady_clock::now(); |
[...] |
302: end = std::chrono::steady_clock::now(); |
303: elapsed[6] += std::chrono::duration_cast<std::chrono::microseconds>(end - start); |
304: #endif |
305: |
306: if (r == rept - 1) { |
307: bool softmax_ok = ValidateSoftmax(h_S.data(), h_P.data(), h_D.data(), context_size); |
308: |
309: std::cout << "Validation results:\n"; |
310: std::cout << " Softmax (rows sum & D) : " << (softmax_ok ? "OK" : "FAILED") << "\n"; |
[...] |
317: if (!(softmax_ok && all_finite)) return 1; |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 5.13 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 22.44 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.45 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | cmath:1661-1661,random.h:140-140,random.h:1618-1618,random.h:1625-1625,random.h:1648-1648,stl_construct.h:119-119,chrono:227-227,chrono:575-575,chrono:666-666,new_allocator.h:127-127,new_allocator.h:145-145,char_traits.h:357-357,char_traits.h:399-399,char_traits.h:437-437,basic_string.h:165-165,basic_string.h:191-191,basic_string.h:195-195,basic_string.h:230-230,basic_string.h:239-240,basic_string.h:245-245,random.tcc:327-327,random.tcc:333-333,random.tcc:336-336,random.tcc:339-339,stl_vector.h:336-336,stl_vector.h:346-346,stl_vector.h:353-353,stl_vector.h:363-363,stl_vector.h:1046-1046,stl_vector.h:1769-1769,ostream:616-616,stl_algobase.h:924-924,stl_algobase.h:1115-1115,stl_uninitialized.h:602-602,attention_v2.cpp:26-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98,attention_v2.cpp:144-144,attention_v2.cpp:160-160,attention_v2.cpp:163-164,attention_v2.cpp:175-175,attention_v2.cpp:185-185,attention_v2.cpp:194-194,attention_v2.cpp:204-204,attention_v2.cpp:213-213,attention_v2.cpp:223-223,attention_v2.cpp:233-233,attention_v2.cpp:236-236,attention_v2.cpp:245-245,attention_v2.cpp:254-254,attention_v2.cpp:264-264,attention_v2.cpp:273-273,attention_v2.cpp:283-283,attention_v2.cpp:292-292,attention_v2.cpp:302-302,attention_v2.cpp:306-307,attention_v2.cpp:310-310,attention_v2.cpp:317-317 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 122.17 |
| CQA cycles if no scalar integer | 23.83 |
| CQA cycles if FP arith vectorized | 122.17 |
| CQA cycles if fully vectorized | 5.45 |
| Front-end cycles | 122.17 |
| P0 cycles | 47.40 |
| P1 cycles | 47.40 |
| P2 cycles | 51.00 |
| P3 cycles | 51.00 |
| P4 cycles | 84.00 |
| P5 cycles | 47.40 |
| P6 cycles | 47.40 |
| P7 cycles | 84.00 |
| P8 cycles | 84.00 |
| P9 cycles | 84.00 |
| P10 cycles | 47.40 |
| P11 cycles | 51.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 641.00 |
| Nb uops | 733.00 |
| Nb loads | 153.00 |
| Nb stores | 106.00 |
| Nb stack references | 86.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 15.80 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1191.00 |
| Bytes stored | 739.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 9.83 |
| Vectorization ratio load | 10.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 21.67 |
| Vector-efficiency ratio all | 11.45 |
| Vector-efficiency ratio load | 12.11 |
| Vector-efficiency ratio store | 9.43 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 14.43 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 5.13 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 22.44 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.45 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | cmath:1661-1661,random.h:140-140,random.h:1618-1618,random.h:1625-1625,random.h:1648-1648,stl_construct.h:119-119,chrono:227-227,chrono:575-575,chrono:666-666,new_allocator.h:127-127,new_allocator.h:145-145,char_traits.h:357-357,char_traits.h:399-399,char_traits.h:437-437,basic_string.h:165-165,basic_string.h:191-191,basic_string.h:195-195,basic_string.h:230-230,basic_string.h:239-240,basic_string.h:245-245,random.tcc:327-327,random.tcc:333-333,random.tcc:336-336,random.tcc:339-339,stl_vector.h:336-336,stl_vector.h:346-346,stl_vector.h:353-353,stl_vector.h:363-363,stl_vector.h:1046-1046,stl_vector.h:1769-1769,ostream:616-616,stl_algobase.h:924-924,stl_algobase.h:1115-1115,stl_uninitialized.h:602-602,attention_v2.cpp:26-27,attention_v2.cpp:30-33,attention_v2.cpp:98-98,attention_v2.cpp:144-144,attention_v2.cpp:160-160,attention_v2.cpp:163-164,attention_v2.cpp:175-175,attention_v2.cpp:185-185,attention_v2.cpp:194-194,attention_v2.cpp:204-204,attention_v2.cpp:213-213,attention_v2.cpp:223-223,attention_v2.cpp:233-233,attention_v2.cpp:236-236,attention_v2.cpp:245-245,attention_v2.cpp:254-254,attention_v2.cpp:264-264,attention_v2.cpp:273-273,attention_v2.cpp:283-283,attention_v2.cpp:292-292,attention_v2.cpp:302-302,attention_v2.cpp:306-307,attention_v2.cpp:310-310,attention_v2.cpp:317-317 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 122.17 |
| CQA cycles if no scalar integer | 23.83 |
| CQA cycles if FP arith vectorized | 122.17 |
| CQA cycles if fully vectorized | 5.45 |
| Front-end cycles | 122.17 |
| P0 cycles | 47.40 |
| P1 cycles | 47.40 |
| P2 cycles | 51.00 |
| P3 cycles | 51.00 |
| P4 cycles | 84.00 |
| P5 cycles | 47.40 |
| P6 cycles | 47.40 |
| P7 cycles | 84.00 |
| P8 cycles | 84.00 |
| P9 cycles | 84.00 |
| P10 cycles | 47.40 |
| P11 cycles | 51.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 641.00 |
| Nb uops | 733.00 |
| Nb loads | 153.00 |
| Nb stores | 106.00 |
| Nb stack references | 86.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 15.80 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1191.00 |
| Bytes stored | 739.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 9.83 |
| Vectorization ratio load | 10.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 21.67 |
| Vector-efficiency ratio all | 11.45 |
| Vector-efficiency ratio load | 12.11 |
| Vector-efficiency ratio store | 9.43 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 14.43 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:26-317 |
| Module | attention-gnr-256 |
| nb instructions | 641 |
| nb uops | 733 |
| loop length | 3456 |
| used x86 registers | 11 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 6 |
| used zmm registers | 0 |
| nb stack references | 86 |
| micro-operation queue | 122.17 cycles |
| front end | 122.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 47.40 | 47.40 | 51.00 | 51.00 | 84.00 | 47.40 | 47.40 | 84.00 | 84.00 | 84.00 | 47.40 | 51.00 |
| cycles | 47.40 | 47.40 | 51.00 | 51.00 | 84.00 | 47.40 | 47.40 | 84.00 | 84.00 | 84.00 | 47.40 | 51.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 122.17 |
| Dispatch | 84.00 |
| Overall L1 | 122.17 |
| all | 10% |
| load | 10% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 22% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 9% |
| load | 10% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 21% |
| all | 11% |
| load | 12% |
| store | 9% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 14% |
| all | 8% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| all | 11% |
| load | 12% |
| store | 9% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 14% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 403c20 <main+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RAX,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RDI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403976 <main+0x556> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403c44 <main+0x824> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4039c6 <main+0x5a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a18 <main+0x5f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x70(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a6a <main+0x64a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x68(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMPQ $0,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403c83 <main+0x863> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403acb <main+0x6ab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403b17 <main+0x6f7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403b69 <main+0x749> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403bb5 <main+0x795> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x38(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RAX,%RDX,4),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RCX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403cf5 <main+0x8d5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| JMP 403cf5 <main+0x8d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| MOVQ $0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 403985 <main+0x565> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOVQ $0,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV $0x1fffffffffffffff,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| CMP %RAX,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JA 406f91 <main+0x3b71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| CMPQ $0,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403e10 <main+0x9f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x258(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403d5d <main+0x93d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x250(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x50(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x258(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403daf <main+0x98f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x250(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x40(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x158(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDI,%RAX,4),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RCX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403e52 <main+0xa32> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x278(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| JMP 403e52 <main+0xa32> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOVQ $0,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x3a8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x398(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0x746c7561,0x3(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVL $0x61666564,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0x7,0x3a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVB $0,0x3af(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (1.6%) |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| LEA 0x398(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402220 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x398(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA 0x3a8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JE 403ec0 <main+0xaa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x3a8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CALL 4021b0 <_ZNSt13random_device9_M_getvalEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| MOV %R10,0x398(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| SHR $0x1e,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| XOR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x269,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RCX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26a,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26b,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EDX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26c,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26d,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%R8,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26e,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %R8D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%R9D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x1700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x1708(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD $0x26f,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %R9,0x1710(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVQ $0x270,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 404470 <main+0x1050> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV $0x270,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xf8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV $-0x66f74f21,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x7fffffffc0000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 404450 <main+0x1030> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %RDX,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 40449b <main+0x107b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| JMP 404e68 <main+0x1a48> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| MOV $0x270,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0xf8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV $-0x66f74f21,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x7fffffffc0000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 404e68 <main+0x1a48> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 404e60 <main+0x1a40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %RDX,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 404eb2 <main+0x1a92> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1b8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 4052d2 <main+0x1eb2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1c0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 4056f2 <main+0x22d2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x260(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x38(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JB 406b60 <main+0x3740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA (%RSI,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JB 406b60 <main+0x3740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x158(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RCX,0x1c8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x28(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1d0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x2a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x90(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 405be6 <main+0x27c6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x2a0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1d8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| LEA 0x1c(%RBX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x240(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 4060b3 <main+0x2c93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x228(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1e0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x128(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 4064c2 <main+0x30a2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV 0xa8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA 0x1(%RDX),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0x128(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP 0xbc(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| JE 406890 <main+0x3470> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %ESI,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ECX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL 0x90(%RSP),%ESI | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| MOV 0x2b8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD 0x244(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 40655a <main+0x313a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %R9D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| MOV 0xe8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1(%R9),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP 0x198(%RSP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RCX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 4064a0 <main+0x3080> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMPL $0x8,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| VMOVDQU 0x300(%RSP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPMOVSXBD 0x8bf0(%RIP),%YMM6 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x8bef(%RIP),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPBROADCASTQ 0x8bee(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (12.5%) |
| VPMOVSXBQ 0x8bb1(%RIP),%YMM9 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (6.3%) |
| VPBROADCASTD 0x8ba4(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x40(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JB 4066a6 <main+0x3286> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %R9D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x2d8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x2f8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP $0x6,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JA 406525 <main+0x3105> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVB $0x1,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (1.6%) |
| MOV 0x220(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP 0x298(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 4069b9 <main+0x3599> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x40(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x110(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x128(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS 0x886d(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| CALL 402f00 <_Z15ValidateSoftmaxPKfS0_S0_if> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %AL,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f3f0,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x14,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f405,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1b,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOVZX 0x28(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %CL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | N/A |
| MOV $0x40f424,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f421,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMOVNE %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.25 | N/A |
| MOVZX %AL,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| LEA 0x2(,%RAX,4),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f392,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f42b,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x15,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f441,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x3,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f392,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPB $0,0x28(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (1.6%) |
| MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0xf4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMOVE %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CALL 402100 <_ZNSt13random_device7_M_finiEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x110(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4069e3 <main+0x35c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1e8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x40(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4069fd <main+0x35dd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1f0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a17 <main+0x35f7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1f8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x80(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a34 <main+0x3614> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x130(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a4e <main+0x362e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x138(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a6b <main+0x364b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x140(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x58(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a85 <main+0x3665> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x148(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406aa2 <main+0x3682> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x150(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406abc <main+0x369c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x200(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x70(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406ad6 <main+0x36b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x208(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406af0 <main+0x36d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x210(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x20(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406b0a <main+0x36ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x120(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPB $0,0x28(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (1.6%) |
| JE 406f85 <main+0x3b65> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RCX,0x1b0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| MOV 0x220(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RCX,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMP 0x290(%RSP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JNE 403920 <main+0x500> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x288(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x280(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x158(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JMP 406b9d <main+0x377d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:26-317 |
| Module | attention-gnr-256 |
| nb instructions | 641 |
| nb uops | 733 |
| loop length | 3456 |
| used x86 registers | 11 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 6 |
| used zmm registers | 0 |
| nb stack references | 86 |
| micro-operation queue | 122.17 cycles |
| front end | 122.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 47.40 | 47.40 | 51.00 | 51.00 | 84.00 | 47.40 | 47.40 | 84.00 | 84.00 | 84.00 | 47.40 | 51.00 |
| cycles | 47.40 | 47.40 | 51.00 | 51.00 | 84.00 | 47.40 | 47.40 | 84.00 | 84.00 | 84.00 | 47.40 | 51.00 |
| Cycles executing div or sqrt instructions | NA |
| Front-end | 122.17 |
| Dispatch | 84.00 |
| Overall L1 | 122.17 |
| all | 10% |
| load | 10% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 22% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 9% |
| load | 10% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 21% |
| all | 11% |
| load | 12% |
| store | 9% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 14% |
| all | 8% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| all | 11% |
| load | 12% |
| store | 9% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 14% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 403c20 <main+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RAX,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RDI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403976 <main+0x556> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403c44 <main+0x824> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 4039c6 <main+0x5a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a18 <main+0x5f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x70(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x218(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x108(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403a6a <main+0x64a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x1a8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x68(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x108(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMPQ $0,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403c83 <main+0x863> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403acb <main+0x6ab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403b17 <main+0x6f7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403b69 <main+0x749> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403bb5 <main+0x795> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x38(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RAX,%RDX,4),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RCX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403cf5 <main+0x8d5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| JMP 403cf5 <main+0x8d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| MOVQ $0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 403985 <main+0x565> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOVQ $0,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOV $0x1fffffffffffffff,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| CMP %RAX,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JA 406f91 <main+0x3b71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| CMPQ $0,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 403e10 <main+0x9f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x258(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403d5d <main+0x93d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x250(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x50(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x258(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOVL $0,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0x1,0x100(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403daf <main+0x98f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA 0x4(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x250(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x40(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RAX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x158(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 402120 <_Znwm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDI,%RAX,4),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RCX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,(%RDI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMP $0x1,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| JE 403e52 <main+0xa32> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| ADD $0x4,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x278(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CALL 4097a0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| JMP 403e52 <main+0xa32> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOVQ $0,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x3a8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %RAX,0x398(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0x746c7561,0x3(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVL $0x61666564,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVQ $0x7,0x3a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| MOVB $0,0x3af(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (1.6%) |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| LEA 0x398(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 402220 <_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x398(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA 0x3a8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JE 403ec0 <main+0xaa0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x3a8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CALL 4021b0 <_ZNSt13random_device9_M_getvalEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %EAX,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (6.3%) |
| MOV %R10,0x398(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| SHR $0x1e,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| XOR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x269,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RCX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26a,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26b,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EDX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RSI,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26c,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%RDI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26d,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%R8,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| ADD $0x26e,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x1e,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| XOR %R8D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| IMUL $0x6c078965,%R9D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %EDX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x16f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x1700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RAX,0x1708(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD $0x26f,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %R9,0x1710(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVQ $0x270,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| CMPQ $0,0x48(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 404470 <main+0x1050> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV $0x270,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0xf8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV $-0x66f74f21,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x7fffffffc0000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 404450 <main+0x1030> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %RDX,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 40449b <main+0x107b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| JMP 404e68 <main+0x1a48> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
| MOV $0x270,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0xf8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV $-0x66f74f21,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x7fffffffc0000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| CMPQ $0,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JE 404e68 <main+0x1a48> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 404e60 <main+0x1a40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %RDX,0x1718(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 404eb2 <main+0x1a92> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1b8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 4052d2 <main+0x1eb2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1c0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 4056f2 <main+0x22d2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV 0x260(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RDX,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x38(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JB 406b60 <main+0x3740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| LEA (%RSI,%RCX,4),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JB 406b60 <main+0x3740> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x158(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RCX,0x1c8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x28(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1d0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x2a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVL $0,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x90(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 405be6 <main+0x27c6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x2a0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1d8(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| LEA 0x1c(%RBX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x240(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 4060b3 <main+0x2c93> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0x228(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RDX,0x1e0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x128(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| JMP 4064c2 <main+0x30a2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV 0xa8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA 0x1(%RDX),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV 0x128(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP 0xbc(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| JE 406890 <main+0x3470> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL %ESI,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOV %ECX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| IMUL 0x90(%RSP),%ESI | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | N/A |
| MOV 0x2b8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA (%RCX,%RDX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
| MOV %EDI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| ADD 0x244(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| JMP 40655a <main+0x313a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |
| MOV %R9D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| VCVTSD2SS %XMM0,%XMM0,%XMM0 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
| MOV 0xe8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS %XMM0,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1(%R9),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CMP 0x198(%RSP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| MOV %RCX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JE 4064a0 <main+0x3080> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
| CMPL $0x8,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (6.3%) |
| VMOVDQU 0x300(%RSP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VPMOVSXBD 0x8bf0(%RIP),%YMM6 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPMOVSXBD 0x8bef(%RIP),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (12.5%) |
| VPBROADCASTQ 0x8bee(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (12.5%) |
| VPMOVSXBQ 0x8bb1(%RIP),%YMM9 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 | vect (6.3%) |
| VPBROADCASTD 0x8ba4(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | scal (6.3%) |
| MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x40(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JB 4066a6 <main+0x3286> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %R9D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV 0x2d8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x2f8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP $0x6,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
| JA 406525 <main+0x3105> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 4021a0 <_ZNSt6chrono3_V212steady_clock3nowEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| SUB 0xa0(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| MOV $0x20c49ba5e353f7cf,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 | N/A |
| IMUL %RCX | 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| MOVB $0x1,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (1.6%) |
| MOV 0x220(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMP 0x298(%RSP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JNE 4069b9 <main+0x3599> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x40(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x110(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x128(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVSS 0x886d(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (6.3%) |
| CALL 402f00 <_Z15ValidateSoftmaxPKfS0_S0_if> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV %AL,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f3f0,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x14,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f405,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1b,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOVZX 0x28(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %CL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | N/A |
| MOV $0x40f424,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f421,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMOVNE %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR $0x1,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.25 | N/A |
| MOVZX %AL,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| LEA 0x2(,%RAX,4),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f392,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f42b,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x15,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f441,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x3,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV $0x418280,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x40f392,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402170 <_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPB $0,0x28(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (1.6%) |
| MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| MOV 0xf4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| CMOVE %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOV %ECX,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
| LEA 0x1720(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| CALL 402100 <_ZNSt13random_device7_M_finiEv@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x110(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4069e3 <main+0x35c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1e8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x40(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 4069fd <main+0x35dd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1f0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x50(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a17 <main+0x35f7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x1f8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x80(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a34 <main+0x3614> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x130(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a4e <main+0x362e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x138(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xd0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a6b <main+0x364b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x140(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x58(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406a85 <main+0x3665> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x148(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406aa2 <main+0x3682> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x150(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406abc <main+0x369c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x200(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x70(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406ad6 <main+0x36b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x208(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406af0 <main+0x36d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x210(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x20(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
| JE 406b0a <main+0x36ea> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x120(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CALL 402130 <_ZdlPvm@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| CMPB $0,0x28(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | scal (1.6%) |
| JE 406f85 <main+0x3b65> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| SHR $0x3f,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| SAR $0x7,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
| ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| ADD %RCX,0x1b0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 | scal (12.5%) |
| MOV 0x220(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| MOV %RCX,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
| CMP 0x290(%RSP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JNE 403920 <main+0x500> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
| MOV 0x288(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x280(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x158(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
| JMP 406b9d <main+0x377d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 | N/A |