| Loop Id: 49 | Module: attention-clang-gnr256 | Source: attention_v2.cpp:55-56 | Coverage: 2.66% |
|---|
| Loop Id: 49 | Module: attention-clang-gnr256 | Source: attention_v2.cpp:55-56 | Coverage: 2.66% |
|---|
0x6045 VMOVUPS (%R8,%R13,4),%YMM0 [2] |
0x604b VSUBPS 0x3a0(%RSP),%YMM0,%YMM0 [1] |
0x6054 VMOVAPS %YMM0,0x60(%RSP) [1] |
0x605a VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x6060 VMOVAPS %XMM0,0xa0(%RSP) [1] |
0x6069 VZEROUPPER |
0x606c CALL 1160 <expf@plt> |
0x6071 VMOVAPS %XMM0,0x100(%RSP) [1] |
0x607a VMOVSHDUP 0xa0(%RSP),%XMM0 [1] |
0x6083 CALL 1160 <expf@plt> |
0x6088 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x6091 VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 |
0x6097 VMOVAPS %XMM0,0x100(%RSP) [1] |
0x60a0 VPERMILPD $0x1,0xa0(%RSP),%XMM0 [1] |
0x60ab CALL 1160 <expf@plt> |
0x60b0 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x60b9 VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 |
0x60bf VMOVAPS %XMM0,0x100(%RSP) [1] |
0x60c8 VPSHUFD $-0x1,0xa0(%RSP),%XMM0 [1] |
0x60d2 CALL 1160 <expf@plt> |
0x60d7 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x60e0 VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 |
0x60e6 VMOVAPS %XMM0,0xa0(%RSP) [1] |
0x60ef VMOVAPS 0x60(%RSP),%YMM0 [1] |
0x60f5 VZEROUPPER |
0x60f8 CALL 1160 <expf@plt> |
0x60fd VMOVAPS %XMM0,0x100(%RSP) [1] |
0x6106 VMOVSHDUP 0x60(%RSP),%XMM0 [1] |
0x610c CALL 1160 <expf@plt> |
0x6111 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x611a VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 |
0x6120 VMOVAPS %XMM0,0x100(%RSP) [1] |
0x6129 VPERMILPD $0x1,0x60(%RSP),%XMM0 [1] |
0x6131 CALL 1160 <expf@plt> |
0x6136 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x613f VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 |
0x6145 VMOVAPS %XMM0,0x100(%RSP) [1] |
0x614e VPSHUFD $-0x1,0x60(%RSP),%XMM0 [1] |
0x6155 CALL 1160 <expf@plt> |
0x615a MOV 0x230(%RSP),%RAX [1] |
0x6162 MOV 0x20(%RSP),%R8 [1] |
0x6167 VMOVAPS 0x100(%RSP),%XMM1 [1] |
0x6170 VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 |
0x6176 VINSERTF128 $0x1,0xa0(%RSP),%YMM0,%YMM0 [1] |
0x6181 VDIVPS 0x3c0(%RSP),%YMM0,%YMM0 [1] |
0x618a VMOVUPS %YMM0,(%RAX,%R13,4) [3] |
0x6190 ADD $0x8,%R13 |
0x6194 CMP %R13,0xe0(%RSP) [1] |
0x619c JNE 6045 |
/home/eoseret/llm-attention/attention_v2.cpp: 55 - 56 |
-------------------------------------------------------------------------------- |
55: for (int idx = 0; idx <= row; ++idx) //vectorised |
56: P[row * N + idx] = expf(S_row[idx] - max_val) / sum; |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.17 |
| CQA speedup if FP arith vectorized | 1.17 |
| CQA speedup if fully vectorized | 2.10 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.17 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:55-56 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 10.50 |
| CQA cycles if no scalar integer | 9.00 |
| CQA cycles if FP arith vectorized | 9.00 |
| CQA cycles if fully vectorized | 5.00 |
| Front-end cycles | 10.50 |
| P0 cycles | 2.00 |
| P1 cycles | 3.00 |
| P2 cycles | 6.67 |
| P3 cycles | 6.67 |
| P4 cycles | 9.00 |
| P5 cycles | 9.00 |
| P6 cycles | 1.00 |
| P7 cycles | 9.00 |
| P8 cycles | 9.00 |
| P9 cycles | 9.00 |
| P10 cycles | 0.00 |
| P11 cycles | 6.67 |
| DIV/SQRT cycles | 5.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 49.00 |
| Nb uops | 63.00 |
| Nb loads | 20.00 |
| Nb stores | 10.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 1.52 |
| Nb FLOP add-sub | 8.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 52.57 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 360.00 |
| Bytes stored | 192.00 |
| Stride 0 | 1.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 83.33 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 57.14 |
| Vector-efficiency ratio all | 25.35 |
| Vector-efficiency ratio load | 29.41 |
| Vector-efficiency ratio store | 30.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | 16.96 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.17 |
| CQA speedup if FP arith vectorized | 1.17 |
| CQA speedup if fully vectorized | 2.10 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.17 |
| Bottlenecks | micro-operation queue, |
| Function | main |
| Source | attention_v2.cpp:55-56 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 10.50 |
| CQA cycles if no scalar integer | 9.00 |
| CQA cycles if FP arith vectorized | 9.00 |
| CQA cycles if fully vectorized | 5.00 |
| Front-end cycles | 10.50 |
| P0 cycles | 2.00 |
| P1 cycles | 3.00 |
| P2 cycles | 6.67 |
| P3 cycles | 6.67 |
| P4 cycles | 9.00 |
| P5 cycles | 9.00 |
| P6 cycles | 1.00 |
| P7 cycles | 9.00 |
| P8 cycles | 9.00 |
| P9 cycles | 9.00 |
| P10 cycles | 0.00 |
| P11 cycles | 6.67 |
| DIV/SQRT cycles | 5.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 49.00 |
| Nb uops | 63.00 |
| Nb loads | 20.00 |
| Nb stores | 10.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 1.52 |
| Nb FLOP add-sub | 8.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 52.57 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 360.00 |
| Bytes stored | 192.00 |
| Stride 0 | 1.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 83.33 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 57.14 |
| Vector-efficiency ratio all | 25.35 |
| Vector-efficiency ratio load | 29.41 |
| Vector-efficiency ratio store | 30.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | 16.96 |
| Path / |
| Function | main |
| Source file and lines | attention_v2.cpp:55-56 |
| Module | attention-clang-gnr256 |
| nb instructions | 49 |
| nb uops | 63 |
| loop length | 349 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 10.50 cycles |
| front end | 10.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 3.00 | 6.67 | 6.67 | 9.00 | 9.00 | 1.00 | 9.00 | 9.00 | 9.00 | 0.00 | 6.67 |
| cycles | 2.00 | 3.00 | 6.67 | 6.67 | 9.00 | 9.00 | 1.00 | 9.00 | 9.00 | 9.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | 5.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 10.50 |
| Dispatch | 9.00 |
| DIV/SQRT | 5.00 |
| Data deps. | 1.00 |
| Overall L1 | 10.50 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 81% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | 40% |
| all | 83% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | 57% |
| all | 25% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 25% |
| all | 25% |
| load | 30% |
| store | 30% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 50% |
| other | 13% |
| all | 25% |
| load | 29% |
| store | 30% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 50% |
| other | 16% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPS (%R8,%R13,4),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VSUBPS 0x3a0(%RSP),%YMM0,%YMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMOVAPS %YMM0,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VMOVAPS %XMM0,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVSHDUP 0xa0(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | vect (12.5%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPERMILPD $0x1,0xa0(%RSP),%XMM0 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPSHUFD $-0x1,0xa0(%RSP),%XMM0 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVAPS 0x60(%RSP),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVSHDUP 0x60(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | vect (12.5%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPERMILPD $0x1,0x60(%RSP),%XMM0 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPSHUFD $-0x1,0x60(%RSP),%XMM0 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x230(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x20(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VINSERTF128 $0x1,0xa0(%RSP),%YMM0,%YMM0 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | vect (25.0%) |
| VDIVPS 0x3c0(%RSP),%YMM0,%YMM0 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-12 | 5 | vect (50.0%) |
| VMOVUPS %YMM0,(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0x8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,0xe0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JNE 6045 <main+0x3335> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | main |
| Source file and lines | attention_v2.cpp:55-56 |
| Module | attention-clang-gnr256 |
| nb instructions | 49 |
| nb uops | 63 |
| loop length | 349 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 10.50 cycles |
| front end | 10.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 3.00 | 6.67 | 6.67 | 9.00 | 9.00 | 1.00 | 9.00 | 9.00 | 9.00 | 0.00 | 6.67 |
| cycles | 2.00 | 3.00 | 6.67 | 6.67 | 9.00 | 9.00 | 1.00 | 9.00 | 9.00 | 9.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | 5.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 10.50 |
| Dispatch | 9.00 |
| DIV/SQRT | 5.00 |
| Data deps. | 1.00 |
| Overall L1 | 10.50 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 81% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | 40% |
| all | 83% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | 57% |
| all | 25% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 25% |
| all | 25% |
| load | 30% |
| store | 30% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 50% |
| other | 13% |
| all | 25% |
| load | 29% |
| store | 30% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 50% |
| other | 16% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPS (%R8,%R13,4),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VSUBPS 0x3a0(%RSP),%YMM0,%YMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMOVAPS %YMM0,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (25.0%) |
| VMOVAPS %XMM0,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVSHDUP 0xa0(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | vect (12.5%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPERMILPD $0x1,0xa0(%RSP),%XMM0 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPSHUFD $-0x1,0xa0(%RSP),%XMM0 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVAPS 0x60(%RSP),%YMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VMOVSHDUP 0x60(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | vect (12.5%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x10,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPERMILPD $0x1,0x60(%RSP),%XMM0 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 1 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x20,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VMOVAPS %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (25.0%) |
| VPSHUFD $-0x1,0x60(%RSP),%XMM0 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 | vect (25.0%) |
| CALL 1160 <expf@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
| MOV 0x230(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x20(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVAPS 0x100(%RSP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (25.0%) |
| VINSERTPS $0x30,%XMM0,%XMM1,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
| VINSERTF128 $0x1,0xa0(%RSP),%YMM0,%YMM0 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 | vect (25.0%) |
| VDIVPS 0x3c0(%RSP),%YMM0,%YMM0 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-12 | 5 | vect (50.0%) |
| VMOVUPS %YMM0,(%RAX,%R13,4) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0x8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,0xe0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JNE 6045 <main+0x3335> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
